1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	compatible = "ti,am335x-bone\0ti,am33xx";
15	interrupt-parent = < 0x01 >;
16	#address-cells = < 0x01 >;
17	#size-cells = < 0x01 >;
18	model = "TI AM335x BeagleBone";
19
20	chosen {
21		stdout-path = "/ocp/serial@44e09000";
22	};
23
24	aliases {
25		i2c0 = "/ocp/i2c@44e0b000";
26		i2c1 = "/ocp/i2c@4802a000";
27		i2c2 = "/ocp/i2c@4819c000";
28		serial0 = "/ocp/serial@44e09000";
29		serial1 = "/ocp/serial@48022000";
30		serial2 = "/ocp/serial@48024000";
31		serial3 = "/ocp/serial@481a6000";
32		serial4 = "/ocp/serial@481a8000";
33		serial5 = "/ocp/serial@481aa000";
34		d-can0 = "/ocp/can@481cc000";
35		d-can1 = "/ocp/can@481d0000";
36		usb0 = "/ocp/usb@47400000/usb@47401000";
37		usb1 = "/ocp/usb@47400000/usb@47401800";
38		phy0 = "/ocp/usb@47400000/usb-phy@47401300";
39		phy1 = "/ocp/usb@47400000/usb-phy@47401b00";
40		ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200";
41		ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300";
42		spi0 = "/ocp/spi@48030000";
43		spi1 = "/ocp/spi@481a0000";
44	};
45
46	cpus {
47		#address-cells = < 0x01 >;
48		#size-cells = < 0x00 >;
49
50		cpu@0 {
51			compatible = "arm,cortex-a8";
52			device_type = "cpu";
53			reg = < 0x00 >;
54			operating-points-v2 = < 0x02 >;
55			clocks = < 0x03 >;
56			clock-names = "cpu";
57			clock-latency = < 0x493e0 >;
58			cpu0-supply = < 0x04 >;
59		};
60	};
61
62	opp-table {
63		compatible = "operating-points-v2-ti-cpu";
64		syscon = < 0x05 >;
65		phandle = < 0x02 >;
66
67		opp50-300000000 {
68			opp-hz = < 0x00 0x11e1a300 >;
69			opp-microvolt = < 0xe7ef0 0xe34b8 0xec928 >;
70			opp-supported-hw = < 0x06 0x10 >;
71			opp-suspend;
72		};
73
74		opp100-275000000 {
75			opp-hz = < 0x00 0x10642ac0 >;
76			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
77			opp-supported-hw = < 0x01 0xff >;
78			opp-suspend;
79		};
80
81		opp100-300000000 {
82			opp-hz = < 0x00 0x11e1a300 >;
83			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
84			opp-supported-hw = < 0x06 0x20 >;
85			opp-suspend;
86		};
87
88		opp100-500000000 {
89			opp-hz = < 0x00 0x1dcd6500 >;
90			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
91			opp-supported-hw = < 0x01 0xffff >;
92		};
93
94		opp100-600000000 {
95			opp-hz = < 0x00 0x23c34600 >;
96			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
97			opp-supported-hw = < 0x06 0x40 >;
98		};
99
100		opp120-600000000 {
101			opp-hz = < 0x00 0x23c34600 >;
102			opp-microvolt = < 0x124f80 0x11f1c0 0x12ad40 >;
103			opp-supported-hw = < 0x01 0xffff >;
104		};
105
106		opp120-720000000 {
107			opp-hz = < 0x00 0x2aea5400 >;
108			opp-microvolt = < 0x124f80 0x11f1c0 0x12ad40 >;
109			opp-supported-hw = < 0x06 0x80 >;
110		};
111
112		oppturbo-720000000 {
113			opp-hz = < 0x00 0x2aea5400 >;
114			opp-microvolt = < 0x1339e0 0x12d770 0x139c50 >;
115			opp-supported-hw = < 0x01 0xffff >;
116		};
117
118		oppturbo-800000000 {
119			opp-hz = < 0x00 0x2faf0800 >;
120			opp-microvolt = < 0x1339e0 0x12d770 0x139c50 >;
121			opp-supported-hw = < 0x06 0x100 >;
122		};
123
124		oppnitro-1000000000 {
125			opp-hz = < 0x00 0x3b9aca00 >;
126			opp-microvolt = < 0x1437c8 0x13d044 0x149f4c >;
127			opp-supported-hw = < 0x04 0x200 >;
128		};
129	};
130
131	pmu@4b000000 {
132		compatible = "arm,cortex-a8-pmu";
133		interrupts = < 0x03 >;
134		reg = < 0x4b000000 0x1000000 >;
135		ti,hwmods = "debugss";
136	};
137
138	soc {
139		compatible = "ti,omap-infra";
140
141		mpu {
142			compatible = "ti,omap3-mpu";
143			ti,hwmods = "mpu";
144			pm-sram = < 0x06 0x07 >;
145		};
146	};
147
148	ocp {
149		compatible = "simple-bus";
150		#address-cells = < 0x01 >;
151		#size-cells = < 0x01 >;
152		ranges;
153		ti,hwmods = "l3_main";
154
155		l4_wkup@44c00000 {
156			compatible = "ti,am3-l4-wkup\0simple-bus";
157			#address-cells = < 0x01 >;
158			#size-cells = < 0x01 >;
159			ranges = < 0x00 0x44c00000 0x280000 >;
160
161			wkup_m3@100000 {
162				compatible = "ti,am3352-wkup-m3";
163				reg = < 0x100000 0x4000 0x180000 0x2000 >;
164				reg-names = "umem\0dmem";
165				ti,hwmods = "wkup_m3";
166				ti,pm-firmware = "am335x-pm-firmware.elf";
167				phandle = < 0x24 >;
168			};
169
170			prcm@200000 {
171				compatible = "ti,am3-prcm\0simple-bus";
172				reg = < 0x200000 0x4000 >;
173				#address-cells = < 0x01 >;
174				#size-cells = < 0x01 >;
175				ranges = < 0x00 0x200000 0x4000 >;
176
177				clocks {
178					#address-cells = < 0x01 >;
179					#size-cells = < 0x00 >;
180
181					clk_32768_ck {
182						#clock-cells = < 0x00 >;
183						compatible = "fixed-clock";
184						clock-frequency = < 0x8000 >;
185						phandle = < 0x17 >;
186					};
187
188					clk_rc32k_ck {
189						#clock-cells = < 0x00 >;
190						compatible = "fixed-clock";
191						clock-frequency = < 0x7d00 >;
192						phandle = < 0x16 >;
193					};
194
195					virt_19200000_ck {
196						#clock-cells = < 0x00 >;
197						compatible = "fixed-clock";
198						clock-frequency = < 0x124f800 >;
199						phandle = < 0x1f >;
200					};
201
202					virt_24000000_ck {
203						#clock-cells = < 0x00 >;
204						compatible = "fixed-clock";
205						clock-frequency = < 0x16e3600 >;
206						phandle = < 0x20 >;
207					};
208
209					virt_25000000_ck {
210						#clock-cells = < 0x00 >;
211						compatible = "fixed-clock";
212						clock-frequency = < 0x17d7840 >;
213						phandle = < 0x21 >;
214					};
215
216					virt_26000000_ck {
217						#clock-cells = < 0x00 >;
218						compatible = "fixed-clock";
219						clock-frequency = < 0x18cba80 >;
220						phandle = < 0x22 >;
221					};
222
223					tclkin_ck {
224						#clock-cells = < 0x00 >;
225						compatible = "fixed-clock";
226						clock-frequency = < 0xb71b00 >;
227						phandle = < 0x15 >;
228					};
229
230					dpll_core_ck@490 {
231						#clock-cells = < 0x00 >;
232						compatible = "ti,am3-dpll-core-clock";
233						clocks = < 0x08 0x08 >;
234						reg = < 0x490 0x45c 0x468 >;
235						phandle = < 0x09 >;
236					};
237
238					dpll_core_x2_ck {
239						#clock-cells = < 0x00 >;
240						compatible = "ti,am3-dpll-x2-clock";
241						clocks = < 0x09 >;
242						phandle = < 0x0a >;
243					};
244
245					dpll_core_m4_ck@480 {
246						#clock-cells = < 0x00 >;
247						compatible = "ti,divider-clock";
248						clocks = < 0x0a >;
249						ti,max-div = < 0x1f >;
250						reg = < 0x480 >;
251						ti,index-starts-at-one;
252						phandle = < 0x11 >;
253					};
254
255					dpll_core_m5_ck@484 {
256						#clock-cells = < 0x00 >;
257						compatible = "ti,divider-clock";
258						clocks = < 0x0a >;
259						ti,max-div = < 0x1f >;
260						reg = < 0x484 >;
261						ti,index-starts-at-one;
262						phandle = < 0x19 >;
263					};
264
265					dpll_core_m6_ck@4d8 {
266						#clock-cells = < 0x00 >;
267						compatible = "ti,divider-clock";
268						clocks = < 0x0a >;
269						ti,max-div = < 0x1f >;
270						reg = < 0x4d8 >;
271						ti,index-starts-at-one;
272					};
273
274					dpll_mpu_ck@488 {
275						#clock-cells = < 0x00 >;
276						compatible = "ti,am3-dpll-clock";
277						clocks = < 0x08 0x08 >;
278						reg = < 0x488 0x420 0x42c >;
279						phandle = < 0x03 >;
280					};
281
282					dpll_mpu_m2_ck@4a8 {
283						#clock-cells = < 0x00 >;
284						compatible = "ti,divider-clock";
285						clocks = < 0x03 >;
286						ti,max-div = < 0x1f >;
287						reg = < 0x4a8 >;
288						ti,index-starts-at-one;
289					};
290
291					dpll_ddr_ck@494 {
292						#clock-cells = < 0x00 >;
293						compatible = "ti,am3-dpll-no-gate-clock";
294						clocks = < 0x08 0x08 >;
295						reg = < 0x494 0x434 0x440 >;
296						phandle = < 0x0b >;
297					};
298
299					dpll_ddr_m2_ck@4a0 {
300						#clock-cells = < 0x00 >;
301						compatible = "ti,divider-clock";
302						clocks = < 0x0b >;
303						ti,max-div = < 0x1f >;
304						reg = < 0x4a0 >;
305						ti,index-starts-at-one;
306						phandle = < 0x0c >;
307					};
308
309					dpll_ddr_m2_div2_ck {
310						#clock-cells = < 0x00 >;
311						compatible = "fixed-factor-clock";
312						clocks = < 0x0c >;
313						clock-mult = < 0x01 >;
314						clock-div = < 0x02 >;
315					};
316
317					dpll_disp_ck@498 {
318						#clock-cells = < 0x00 >;
319						compatible = "ti,am3-dpll-no-gate-clock";
320						clocks = < 0x08 0x08 >;
321						reg = < 0x498 0x448 0x454 >;
322						phandle = < 0x0d >;
323					};
324
325					dpll_disp_m2_ck@4a4 {
326						#clock-cells = < 0x00 >;
327						compatible = "ti,divider-clock";
328						clocks = < 0x0d >;
329						ti,max-div = < 0x1f >;
330						reg = < 0x4a4 >;
331						ti,index-starts-at-one;
332						ti,set-rate-parent;
333						phandle = < 0x13 >;
334					};
335
336					dpll_per_ck@48c {
337						#clock-cells = < 0x00 >;
338						compatible = "ti,am3-dpll-no-gate-j-type-clock";
339						clocks = < 0x08 0x08 >;
340						reg = < 0x48c 0x470 0x49c >;
341						phandle = < 0x0e >;
342					};
343
344					dpll_per_m2_ck@4ac {
345						#clock-cells = < 0x00 >;
346						compatible = "ti,divider-clock";
347						clocks = < 0x0e >;
348						ti,max-div = < 0x1f >;
349						reg = < 0x4ac >;
350						ti,index-starts-at-one;
351						phandle = < 0x0f >;
352					};
353
354					dpll_per_m2_div4_wkupdm_ck {
355						#clock-cells = < 0x00 >;
356						compatible = "fixed-factor-clock";
357						clocks = < 0x0f >;
358						clock-mult = < 0x01 >;
359						clock-div = < 0x04 >;
360					};
361
362					dpll_per_m2_div4_ck {
363						#clock-cells = < 0x00 >;
364						compatible = "fixed-factor-clock";
365						clocks = < 0x0f >;
366						clock-mult = < 0x01 >;
367						clock-div = < 0x04 >;
368					};
369
370					clk_24mhz {
371						#clock-cells = < 0x00 >;
372						compatible = "fixed-factor-clock";
373						clocks = < 0x0f >;
374						clock-mult = < 0x01 >;
375						clock-div = < 0x08 >;
376						phandle = < 0x10 >;
377					};
378
379					clkdiv32k_ck {
380						#clock-cells = < 0x00 >;
381						compatible = "fixed-factor-clock";
382						clocks = < 0x10 >;
383						clock-mult = < 0x01 >;
384						clock-div = < 0x2dc >;
385					};
386
387					l3_gclk {
388						#clock-cells = < 0x00 >;
389						compatible = "fixed-factor-clock";
390						clocks = < 0x11 >;
391						clock-mult = < 0x01 >;
392						clock-div = < 0x01 >;
393						phandle = < 0x12 >;
394					};
395
396					pruss_ocp_gclk@530 {
397						#clock-cells = < 0x00 >;
398						compatible = "ti,mux-clock";
399						clocks = < 0x12 0x13 >;
400						reg = < 0x530 >;
401					};
402
403					mmu_fck@914 {
404						#clock-cells = < 0x00 >;
405						compatible = "ti,gate-clock";
406						clocks = < 0x11 >;
407						ti,bit-shift = < 0x01 >;
408						reg = < 0x914 >;
409					};
410
411					timer1_fck@528 {
412						#clock-cells = < 0x00 >;
413						compatible = "ti,mux-clock";
414						clocks = < 0x08 0x14 0x138 0x00 0x15 0x16 0x17 >;
415						reg = < 0x528 >;
416						phandle = < 0x34 >;
417					};
418
419					timer2_fck@508 {
420						#clock-cells = < 0x00 >;
421						compatible = "ti,mux-clock";
422						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
423						reg = < 0x508 >;
424						phandle = < 0x35 >;
425					};
426
427					timer3_fck@50c {
428						#clock-cells = < 0x00 >;
429						compatible = "ti,mux-clock";
430						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
431						reg = < 0x50c >;
432					};
433
434					timer4_fck@510 {
435						#clock-cells = < 0x00 >;
436						compatible = "ti,mux-clock";
437						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
438						reg = < 0x510 >;
439					};
440
441					timer5_fck@518 {
442						#clock-cells = < 0x00 >;
443						compatible = "ti,mux-clock";
444						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
445						reg = < 0x518 >;
446					};
447
448					timer6_fck@51c {
449						#clock-cells = < 0x00 >;
450						compatible = "ti,mux-clock";
451						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
452						reg = < 0x51c >;
453					};
454
455					timer7_fck@504 {
456						#clock-cells = < 0x00 >;
457						compatible = "ti,mux-clock";
458						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
459						reg = < 0x504 >;
460					};
461
462					usbotg_fck@47c {
463						#clock-cells = < 0x00 >;
464						compatible = "ti,gate-clock";
465						clocks = < 0x0e >;
466						ti,bit-shift = < 0x08 >;
467						reg = < 0x47c >;
468					};
469
470					dpll_core_m4_div2_ck {
471						#clock-cells = < 0x00 >;
472						compatible = "fixed-factor-clock";
473						clocks = < 0x11 >;
474						clock-mult = < 0x01 >;
475						clock-div = < 0x02 >;
476						phandle = < 0x18 >;
477					};
478
479					ieee5000_fck@e4 {
480						#clock-cells = < 0x00 >;
481						compatible = "ti,gate-clock";
482						clocks = < 0x18 >;
483						ti,bit-shift = < 0x01 >;
484						reg = < 0xe4 >;
485					};
486
487					wdt1_fck@538 {
488						#clock-cells = < 0x00 >;
489						compatible = "ti,mux-clock";
490						clocks = < 0x16 0x14 0x138 0x00 >;
491						reg = < 0x538 >;
492					};
493
494					l4_rtc_gclk {
495						#clock-cells = < 0x00 >;
496						compatible = "fixed-factor-clock";
497						clocks = < 0x11 >;
498						clock-mult = < 0x01 >;
499						clock-div = < 0x02 >;
500					};
501
502					l4hs_gclk {
503						#clock-cells = < 0x00 >;
504						compatible = "fixed-factor-clock";
505						clocks = < 0x11 >;
506						clock-mult = < 0x01 >;
507						clock-div = < 0x01 >;
508					};
509
510					l3s_gclk {
511						#clock-cells = < 0x00 >;
512						compatible = "fixed-factor-clock";
513						clocks = < 0x18 >;
514						clock-mult = < 0x01 >;
515						clock-div = < 0x01 >;
516					};
517
518					l4fw_gclk {
519						#clock-cells = < 0x00 >;
520						compatible = "fixed-factor-clock";
521						clocks = < 0x18 >;
522						clock-mult = < 0x01 >;
523						clock-div = < 0x01 >;
524					};
525
526					l4ls_gclk {
527						#clock-cells = < 0x00 >;
528						compatible = "fixed-factor-clock";
529						clocks = < 0x18 >;
530						clock-mult = < 0x01 >;
531						clock-div = < 0x01 >;
532						phandle = < 0x23 >;
533					};
534
535					sysclk_div_ck {
536						#clock-cells = < 0x00 >;
537						compatible = "fixed-factor-clock";
538						clocks = < 0x11 >;
539						clock-mult = < 0x01 >;
540						clock-div = < 0x01 >;
541					};
542
543					cpsw_125mhz_gclk {
544						#clock-cells = < 0x00 >;
545						compatible = "fixed-factor-clock";
546						clocks = < 0x19 >;
547						clock-mult = < 0x01 >;
548						clock-div = < 0x02 >;
549						phandle = < 0x3e >;
550					};
551
552					cpsw_cpts_rft_clk@520 {
553						#clock-cells = < 0x00 >;
554						compatible = "ti,mux-clock";
555						clocks = < 0x19 0x11 >;
556						reg = < 0x520 >;
557						phandle = < 0x3f >;
558					};
559
560					gpio0_dbclk_mux_ck@53c {
561						#clock-cells = < 0x00 >;
562						compatible = "ti,mux-clock";
563						clocks = < 0x16 0x17 0x14 0x138 0x00 >;
564						reg = < 0x53c >;
565					};
566
567					lcd_gclk@534 {
568						#clock-cells = < 0x00 >;
569						compatible = "ti,mux-clock";
570						clocks = < 0x13 0x19 0x0f >;
571						reg = < 0x534 >;
572						ti,set-rate-parent;
573						phandle = < 0x1b >;
574					};
575
576					mmc_clk {
577						#clock-cells = < 0x00 >;
578						compatible = "fixed-factor-clock";
579						clocks = < 0x0f >;
580						clock-mult = < 0x01 >;
581						clock-div = < 0x02 >;
582					};
583
584					gfx_fclk_clksel_ck@52c {
585						#clock-cells = < 0x00 >;
586						compatible = "ti,mux-clock";
587						clocks = < 0x11 0x0f >;
588						ti,bit-shift = < 0x01 >;
589						reg = < 0x52c >;
590						phandle = < 0x1a >;
591					};
592
593					gfx_fck_div_ck@52c {
594						#clock-cells = < 0x00 >;
595						compatible = "ti,divider-clock";
596						clocks = < 0x1a >;
597						reg = < 0x52c >;
598						ti,max-div = < 0x02 >;
599					};
600
601					sysclkout_pre_ck@700 {
602						#clock-cells = < 0x00 >;
603						compatible = "ti,mux-clock";
604						clocks = < 0x17 0x12 0x0c 0x0f 0x1b >;
605						reg = < 0x700 >;
606						phandle = < 0x1c >;
607					};
608
609					clkout2_div_ck@700 {
610						#clock-cells = < 0x00 >;
611						compatible = "ti,divider-clock";
612						clocks = < 0x1c >;
613						ti,bit-shift = < 0x03 >;
614						ti,max-div = < 0x08 >;
615						reg = < 0x700 >;
616						phandle = < 0x1d >;
617					};
618
619					clkout2_ck@700 {
620						#clock-cells = < 0x00 >;
621						compatible = "ti,gate-clock";
622						clocks = < 0x1d >;
623						ti,bit-shift = < 0x07 >;
624						reg = < 0x700 >;
625					};
626				};
627
628				clockdomains {
629				};
630
631				l4_per_cm@0 {
632					compatible = "ti,omap4-cm";
633					reg = < 0x00 0x200 >;
634					#address-cells = < 0x01 >;
635					#size-cells = < 0x01 >;
636					ranges = < 0x00 0x00 0x200 >;
637
638					clk@14 {
639						compatible = "ti,clkctrl";
640						reg = < 0x14 0x13c >;
641						#clock-cells = < 0x02 >;
642						phandle = < 0x14 >;
643					};
644				};
645
646				l4_wkup_cm@400 {
647					compatible = "ti,omap4-cm";
648					reg = < 0x400 0x100 >;
649					#address-cells = < 0x01 >;
650					#size-cells = < 0x01 >;
651					ranges = < 0x00 0x400 0x100 >;
652
653					clk@4 {
654						compatible = "ti,clkctrl";
655						reg = < 0x04 0xd4 >;
656						#clock-cells = < 0x02 >;
657					};
658				};
659
660				mpu_cm@600 {
661					compatible = "ti,omap4-cm";
662					reg = < 0x600 0x100 >;
663					#address-cells = < 0x01 >;
664					#size-cells = < 0x01 >;
665					ranges = < 0x00 0x600 0x100 >;
666
667					clk@4 {
668						compatible = "ti,clkctrl";
669						reg = < 0x04 0x04 >;
670						#clock-cells = < 0x02 >;
671					};
672				};
673
674				l4_rtc_cm@800 {
675					compatible = "ti,omap4-cm";
676					reg = < 0x800 0x100 >;
677					#address-cells = < 0x01 >;
678					#size-cells = < 0x01 >;
679					ranges = < 0x00 0x800 0x100 >;
680
681					clk@0 {
682						compatible = "ti,clkctrl";
683						reg = < 0x00 0x04 >;
684						#clock-cells = < 0x02 >;
685					};
686				};
687
688				gfx_l3_cm@900 {
689					compatible = "ti,omap4-cm";
690					reg = < 0x900 0x100 >;
691					#address-cells = < 0x01 >;
692					#size-cells = < 0x01 >;
693					ranges = < 0x00 0x900 0x100 >;
694
695					clk@4 {
696						compatible = "ti,clkctrl";
697						reg = < 0x04 0x04 >;
698						#clock-cells = < 0x02 >;
699					};
700				};
701
702				l4_cefuse_cm@a00 {
703					compatible = "ti,omap4-cm";
704					reg = < 0xa00 0x100 >;
705					#address-cells = < 0x01 >;
706					#size-cells = < 0x01 >;
707					ranges = < 0x00 0xa00 0x100 >;
708
709					clk@20 {
710						compatible = "ti,clkctrl";
711						reg = < 0x20 0x04 >;
712						#clock-cells = < 0x02 >;
713					};
714				};
715			};
716
717			scm@210000 {
718				compatible = "ti,am3-scm\0simple-bus";
719				reg = < 0x210000 0x2000 >;
720				#address-cells = < 0x01 >;
721				#size-cells = < 0x01 >;
722				#pinctrl-cells = < 0x01 >;
723				ranges = < 0x00 0x210000 0x2000 >;
724
725				pinmux@800 {
726					compatible = "pinctrl-single";
727					reg = < 0x800 0x238 >;
728					#address-cells = < 0x01 >;
729					#size-cells = < 0x00 >;
730					#pinctrl-cells = < 0x01 >;
731					pinctrl-single,register-width = < 0x20 >;
732					pinctrl-single,function-mask = < 0x7f >;
733					pinctrl-names = "default";
734					pinctrl-0 = < 0x1e >;
735
736					user_leds_s0 {
737						pinctrl-single,pins = < 0x54 0x07 0x58 0x17 0x5c 0x07 0x60 0x17 >;
738						phandle = < 0x45 >;
739					};
740
741					pinmux_i2c0_pins {
742						pinctrl-single,pins = < 0x188 0x30 0x18c 0x30 >;
743						phandle = < 0x2c >;
744					};
745
746					pinmux_i2c2_pins {
747						pinctrl-single,pins = < 0x178 0x33 0x17c 0x33 >;
748						phandle = < 0x2d >;
749					};
750
751					pinmux_uart0_pins {
752						pinctrl-single,pins = < 0x170 0x30 0x174 0x00 >;
753						phandle = < 0x2b >;
754					};
755
756					pinmux_clkout2_pin {
757						pinctrl-single,pins = < 0x1b4 0x03 >;
758						phandle = < 0x1e >;
759					};
760
761					cpsw_default {
762						pinctrl-single,pins = < 0x110 0x30 0x114 0x00 0x118 0x30 0x11c 0x00 0x120 0x00 0x124 0x00 0x128 0x00 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30 >;
763						phandle = < 0x40 >;
764					};
765
766					cpsw_sleep {
767						pinctrl-single,pins = < 0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27 >;
768						phandle = < 0x41 >;
769					};
770
771					davinci_mdio_default {
772						pinctrl-single,pins = < 0x148 0x30 0x14c 0x10 >;
773						phandle = < 0x42 >;
774					};
775
776					davinci_mdio_sleep {
777						pinctrl-single,pins = < 0x148 0x27 0x14c 0x27 >;
778						phandle = < 0x43 >;
779					};
780
781					pinmux_mmc1_pins {
782						pinctrl-single,pins = < 0x160 0x2f 0xfc 0x30 0xf8 0x30 0xf4 0x30 0xf0 0x30 0x104 0x30 0x100 0x30 >;
783						phandle = < 0x2f >;
784					};
785
786					pinmux_emmc_pins {
787						pinctrl-single,pins = < 0x80 0x32 0x84 0x32 0x00 0x31 0x04 0x31 0x08 0x31 0x0c 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31 >;
788					};
789				};
790
791				scm_conf@0 {
792					compatible = "syscon\0simple-bus";
793					reg = < 0x00 0x800 >;
794					#address-cells = < 0x01 >;
795					#size-cells = < 0x01 >;
796					ranges = < 0x00 0x00 0x800 >;
797					phandle = < 0x05 >;
798
799					clocks {
800						#address-cells = < 0x01 >;
801						#size-cells = < 0x00 >;
802
803						sys_clkin_ck@40 {
804							#clock-cells = < 0x00 >;
805							compatible = "ti,mux-clock";
806							clocks = < 0x1f 0x20 0x21 0x22 >;
807							ti,bit-shift = < 0x16 >;
808							reg = < 0x40 >;
809							phandle = < 0x08 >;
810						};
811
812						adc_tsc_fck {
813							#clock-cells = < 0x00 >;
814							compatible = "fixed-factor-clock";
815							clocks = < 0x08 >;
816							clock-mult = < 0x01 >;
817							clock-div = < 0x01 >;
818						};
819
820						dcan0_fck {
821							#clock-cells = < 0x00 >;
822							compatible = "fixed-factor-clock";
823							clocks = < 0x08 >;
824							clock-mult = < 0x01 >;
825							clock-div = < 0x01 >;
826							phandle = < 0x32 >;
827						};
828
829						dcan1_fck {
830							#clock-cells = < 0x00 >;
831							compatible = "fixed-factor-clock";
832							clocks = < 0x08 >;
833							clock-mult = < 0x01 >;
834							clock-div = < 0x01 >;
835							phandle = < 0x33 >;
836						};
837
838						mcasp0_fck {
839							#clock-cells = < 0x00 >;
840							compatible = "fixed-factor-clock";
841							clocks = < 0x08 >;
842							clock-mult = < 0x01 >;
843							clock-div = < 0x01 >;
844						};
845
846						mcasp1_fck {
847							#clock-cells = < 0x00 >;
848							compatible = "fixed-factor-clock";
849							clocks = < 0x08 >;
850							clock-mult = < 0x01 >;
851							clock-div = < 0x01 >;
852						};
853
854						smartreflex0_fck {
855							#clock-cells = < 0x00 >;
856							compatible = "fixed-factor-clock";
857							clocks = < 0x08 >;
858							clock-mult = < 0x01 >;
859							clock-div = < 0x01 >;
860						};
861
862						smartreflex1_fck {
863							#clock-cells = < 0x00 >;
864							compatible = "fixed-factor-clock";
865							clocks = < 0x08 >;
866							clock-mult = < 0x01 >;
867							clock-div = < 0x01 >;
868						};
869
870						sha0_fck {
871							#clock-cells = < 0x00 >;
872							compatible = "fixed-factor-clock";
873							clocks = < 0x08 >;
874							clock-mult = < 0x01 >;
875							clock-div = < 0x01 >;
876						};
877
878						aes0_fck {
879							#clock-cells = < 0x00 >;
880							compatible = "fixed-factor-clock";
881							clocks = < 0x08 >;
882							clock-mult = < 0x01 >;
883							clock-div = < 0x01 >;
884						};
885
886						rng_fck {
887							#clock-cells = < 0x00 >;
888							compatible = "fixed-factor-clock";
889							clocks = < 0x08 >;
890							clock-mult = < 0x01 >;
891							clock-div = < 0x01 >;
892						};
893
894						ehrpwm0_tbclk@44e10664 {
895							#clock-cells = < 0x00 >;
896							compatible = "ti,gate-clock";
897							clocks = < 0x23 >;
898							ti,bit-shift = < 0x00 >;
899							reg = < 0x664 >;
900							phandle = < 0x3b >;
901						};
902
903						ehrpwm1_tbclk@44e10664 {
904							#clock-cells = < 0x00 >;
905							compatible = "ti,gate-clock";
906							clocks = < 0x23 >;
907							ti,bit-shift = < 0x01 >;
908							reg = < 0x664 >;
909							phandle = < 0x3c >;
910						};
911
912						ehrpwm2_tbclk@44e10664 {
913							#clock-cells = < 0x00 >;
914							compatible = "ti,gate-clock";
915							clocks = < 0x23 >;
916							ti,bit-shift = < 0x02 >;
917							reg = < 0x664 >;
918							phandle = < 0x3d >;
919						};
920					};
921				};
922
923				wkup_m3_ipc@1324 {
924					compatible = "ti,am3352-wkup-m3-ipc";
925					reg = < 0x1324 0x24 >;
926					interrupts = < 0x4e >;
927					ti,rproc = < 0x24 >;
928					mboxes = < 0x25 0x26 >;
929				};
930
931				dma-router@f90 {
932					compatible = "ti,am335x-edma-crossbar";
933					reg = < 0xf90 0x40 >;
934					#dma-cells = < 0x03 >;
935					dma-requests = < 0x20 >;
936					dma-masters = < 0x27 >;
937					phandle = < 0x2e >;
938				};
939
940				clockdomains {
941				};
942			};
943		};
944
945		interrupt-controller@48200000 {
946			compatible = "ti,am33xx-intc";
947			interrupt-controller;
948			#interrupt-cells = < 0x01 >;
949			reg = < 0x48200000 0x1000 >;
950			phandle = < 0x01 >;
951		};
952
953		edma@49000000 {
954			compatible = "ti,edma3-tpcc";
955			ti,hwmods = "tpcc";
956			reg = < 0x49000000 0x10000 >;
957			reg-names = "edma3_cc";
958			interrupts = < 0x0c 0x0d 0x0e >;
959			interrupt-names = "edma3_ccint\0edma3_mperr\0edma3_ccerrint";
960			dma-requests = < 0x40 >;
961			#dma-cells = < 0x02 >;
962			ti,tptcs = < 0x28 0x07 0x29 0x05 0x2a 0x00 >;
963			ti,edma-memcpy-channels = < 0x14 0x15 >;
964			phandle = < 0x27 >;
965		};
966
967		tptc@49800000 {
968			compatible = "ti,edma3-tptc";
969			ti,hwmods = "tptc0";
970			reg = < 0x49800000 0x100000 >;
971			interrupts = < 0x70 >;
972			interrupt-names = "edma3_tcerrint";
973			phandle = < 0x28 >;
974		};
975
976		tptc@49900000 {
977			compatible = "ti,edma3-tptc";
978			ti,hwmods = "tptc1";
979			reg = < 0x49900000 0x100000 >;
980			interrupts = < 0x71 >;
981			interrupt-names = "edma3_tcerrint";
982			phandle = < 0x29 >;
983		};
984
985		tptc@49a00000 {
986			compatible = "ti,edma3-tptc";
987			ti,hwmods = "tptc2";
988			reg = < 0x49a00000 0x100000 >;
989			interrupts = < 0x72 >;
990			interrupt-names = "edma3_tcerrint";
991			phandle = < 0x2a >;
992		};
993
994		gpio@44e07000 {
995			compatible = "ti,omap4-gpio";
996			ti,hwmods = "gpio1";
997			gpio-controller;
998			#gpio-cells = < 0x02 >;
999			interrupt-controller;
1000			#interrupt-cells = < 0x02 >;
1001			reg = < 0x44e07000 0x1000 >;
1002			interrupts = < 0x60 >;
1003			phandle = < 0x30 >;
1004		};
1005
1006		gpio@4804c000 {
1007			compatible = "ti,omap4-gpio";
1008			ti,hwmods = "gpio2";
1009			gpio-controller;
1010			#gpio-cells = < 0x02 >;
1011			interrupt-controller;
1012			#interrupt-cells = < 0x02 >;
1013			reg = < 0x4804c000 0x1000 >;
1014			interrupts = < 0x62 >;
1015			phandle = < 0x46 >;
1016		};
1017
1018		gpio@481ac000 {
1019			compatible = "ti,omap4-gpio";
1020			ti,hwmods = "gpio3";
1021			gpio-controller;
1022			#gpio-cells = < 0x02 >;
1023			interrupt-controller;
1024			#interrupt-cells = < 0x02 >;
1025			reg = < 0x481ac000 0x1000 >;
1026			interrupts = < 0x20 >;
1027		};
1028
1029		gpio@481ae000 {
1030			compatible = "ti,omap4-gpio";
1031			ti,hwmods = "gpio4";
1032			gpio-controller;
1033			#gpio-cells = < 0x02 >;
1034			interrupt-controller;
1035			#interrupt-cells = < 0x02 >;
1036			reg = < 0x481ae000 0x1000 >;
1037			interrupts = < 0x3e >;
1038		};
1039
1040		serial@44e09000 {
1041			compatible = "ti,am3352-uart\0ti,omap3-uart";
1042			ti,hwmods = "uart1";
1043			clock-frequency = < 0x2dc6c00 >;
1044			reg = < 0x44e09000 0x2000 >;
1045			interrupts = < 0x48 >;
1046			status = "okay";
1047			dmas = < 0x27 0x1a 0x00 0x27 0x1b 0x00 >;
1048			dma-names = "tx\0rx";
1049			pinctrl-names = "default";
1050			pinctrl-0 = < 0x2b >;
1051		};
1052
1053		serial@48022000 {
1054			compatible = "ti,am3352-uart\0ti,omap3-uart";
1055			ti,hwmods = "uart2";
1056			clock-frequency = < 0x2dc6c00 >;
1057			reg = < 0x48022000 0x2000 >;
1058			interrupts = < 0x49 >;
1059			status = "disabled";
1060			dmas = < 0x27 0x1c 0x00 0x27 0x1d 0x00 >;
1061			dma-names = "tx\0rx";
1062		};
1063
1064		serial@48024000 {
1065			compatible = "ti,am3352-uart\0ti,omap3-uart";
1066			ti,hwmods = "uart3";
1067			clock-frequency = < 0x2dc6c00 >;
1068			reg = < 0x48024000 0x2000 >;
1069			interrupts = < 0x4a >;
1070			status = "disabled";
1071			dmas = < 0x27 0x1e 0x00 0x27 0x1f 0x00 >;
1072			dma-names = "tx\0rx";
1073		};
1074
1075		serial@481a6000 {
1076			compatible = "ti,am3352-uart\0ti,omap3-uart";
1077			ti,hwmods = "uart4";
1078			clock-frequency = < 0x2dc6c00 >;
1079			reg = < 0x481a6000 0x2000 >;
1080			interrupts = < 0x2c >;
1081			status = "disabled";
1082		};
1083
1084		serial@481a8000 {
1085			compatible = "ti,am3352-uart\0ti,omap3-uart";
1086			ti,hwmods = "uart5";
1087			clock-frequency = < 0x2dc6c00 >;
1088			reg = < 0x481a8000 0x2000 >;
1089			interrupts = < 0x2d >;
1090			status = "disabled";
1091		};
1092
1093		serial@481aa000 {
1094			compatible = "ti,am3352-uart\0ti,omap3-uart";
1095			ti,hwmods = "uart6";
1096			clock-frequency = < 0x2dc6c00 >;
1097			reg = < 0x481aa000 0x2000 >;
1098			interrupts = < 0x2e >;
1099			status = "disabled";
1100		};
1101
1102		i2c@44e0b000 {
1103			compatible = "ti,omap4-i2c";
1104			#address-cells = < 0x01 >;
1105			#size-cells = < 0x00 >;
1106			ti,hwmods = "i2c1";
1107			reg = < 0x44e0b000 0x1000 >;
1108			interrupts = < 0x46 >;
1109			status = "okay";
1110			pinctrl-names = "default";
1111			pinctrl-0 = < 0x2c >;
1112			clock-frequency = < 0x61a80 >;
1113
1114			tps@24 {
1115				reg = < 0x24 >;
1116				compatible = "ti,tps65217";
1117				interrupt-controller;
1118				#interrupt-cells = < 0x01 >;
1119				interrupts = < 0x07 >;
1120				interrupt-parent = < 0x01 >;
1121				ti,pmic-shutdown-controller;
1122				phandle = < 0x39 >;
1123
1124				charger {
1125					compatible = "ti,tps65217-charger";
1126					interrupts = < 0x00 0x01 >;
1127					interrupt-names = "USB\0AC";
1128					status = "okay";
1129				};
1130
1131				pwrbutton {
1132					compatible = "ti,tps65217-pwrbutton";
1133					interrupts = < 0x02 >;
1134					status = "okay";
1135				};
1136
1137				regulators {
1138					#address-cells = < 0x01 >;
1139					#size-cells = < 0x00 >;
1140
1141					regulator@0 {
1142						reg = < 0x00 >;
1143						regulator-compatible = "dcdc1";
1144						regulator-name = "vdds_dpr";
1145						regulator-always-on;
1146					};
1147
1148					regulator@1 {
1149						reg = < 0x01 >;
1150						regulator-compatible = "dcdc2";
1151						regulator-name = "vdd_mpu";
1152						regulator-min-microvolt = < 0xe1d48 >;
1153						regulator-max-microvolt = < 0x149f4c >;
1154						regulator-boot-on;
1155						regulator-always-on;
1156						phandle = < 0x04 >;
1157					};
1158
1159					regulator@2 {
1160						reg = < 0x02 >;
1161						regulator-compatible = "dcdc3";
1162						regulator-name = "vdd_core";
1163						regulator-min-microvolt = < 0xe1d48 >;
1164						regulator-max-microvolt = < 0x118c30 >;
1165						regulator-boot-on;
1166						regulator-always-on;
1167					};
1168
1169					regulator@3 {
1170						reg = < 0x03 >;
1171						regulator-compatible = "ldo1";
1172						regulator-name = "vio,vrtc,vdds";
1173						regulator-always-on;
1174					};
1175
1176					regulator@4 {
1177						reg = < 0x04 >;
1178						regulator-compatible = "ldo2";
1179						regulator-name = "vdd_3v3aux";
1180						regulator-always-on;
1181					};
1182
1183					regulator@5 {
1184						reg = < 0x05 >;
1185						regulator-compatible = "ldo3";
1186						regulator-name = "vdd_1v8";
1187						regulator-always-on;
1188						regulator-min-microvolt = < 0x1b7740 >;
1189						regulator-max-microvolt = < 0x325aa0 >;
1190						phandle = < 0x31 >;
1191					};
1192
1193					regulator@6 {
1194						reg = < 0x06 >;
1195						regulator-compatible = "ldo4";
1196						regulator-name = "vdd_3v3a";
1197						regulator-always-on;
1198					};
1199				};
1200			};
1201
1202			baseboard_eeprom@50 {
1203				compatible = "atmel,24c256";
1204				reg = < 0x50 >;
1205				#address-cells = < 0x01 >;
1206				#size-cells = < 0x01 >;
1207
1208				baseboard_data@0 {
1209					reg = < 0x00 0x100 >;
1210				};
1211			};
1212		};
1213
1214		i2c@4802a000 {
1215			compatible = "ti,omap4-i2c";
1216			#address-cells = < 0x01 >;
1217			#size-cells = < 0x00 >;
1218			ti,hwmods = "i2c2";
1219			reg = < 0x4802a000 0x1000 >;
1220			interrupts = < 0x47 >;
1221			status = "disabled";
1222		};
1223
1224		i2c@4819c000 {
1225			compatible = "ti,omap4-i2c";
1226			#address-cells = < 0x01 >;
1227			#size-cells = < 0x00 >;
1228			ti,hwmods = "i2c3";
1229			reg = < 0x4819c000 0x1000 >;
1230			interrupts = < 0x1e >;
1231			status = "okay";
1232			pinctrl-names = "default";
1233			pinctrl-0 = < 0x2d >;
1234			clock-frequency = < 0x186a0 >;
1235
1236			cape_eeprom0@54 {
1237				compatible = "atmel,24c256";
1238				reg = < 0x54 >;
1239				#address-cells = < 0x01 >;
1240				#size-cells = < 0x01 >;
1241
1242				cape_data@0 {
1243					reg = < 0x00 0x100 >;
1244				};
1245			};
1246
1247			cape_eeprom1@55 {
1248				compatible = "atmel,24c256";
1249				reg = < 0x55 >;
1250				#address-cells = < 0x01 >;
1251				#size-cells = < 0x01 >;
1252
1253				cape_data@0 {
1254					reg = < 0x00 0x100 >;
1255				};
1256			};
1257
1258			cape_eeprom2@56 {
1259				compatible = "atmel,24c256";
1260				reg = < 0x56 >;
1261				#address-cells = < 0x01 >;
1262				#size-cells = < 0x01 >;
1263
1264				cape_data@0 {
1265					reg = < 0x00 0x100 >;
1266				};
1267			};
1268
1269			cape_eeprom3@57 {
1270				compatible = "atmel,24c256";
1271				reg = < 0x57 >;
1272				#address-cells = < 0x01 >;
1273				#size-cells = < 0x01 >;
1274
1275				cape_data@0 {
1276					reg = < 0x00 0x100 >;
1277				};
1278			};
1279		};
1280
1281		mmc@48060000 {
1282			compatible = "ti,omap4-hsmmc";
1283			ti,hwmods = "mmc1";
1284			ti,dual-volt;
1285			ti,needs-special-reset;
1286			ti,needs-special-hs-handling;
1287			dmas = < 0x2e 0x18 0x00 0x00 0x2e 0x19 0x00 0x00 >;
1288			dma-names = "tx\0rx";
1289			interrupts = < 0x40 >;
1290			reg = < 0x48060000 0x1000 >;
1291			status = "okay";
1292			bus-width = < 0x04 >;
1293			pinctrl-names = "default";
1294			pinctrl-0 = < 0x2f >;
1295			cd-gpios = < 0x30 0x06 0x01 >;
1296			vmmc-supply = < 0x31 >;
1297		};
1298
1299		mmc@481d8000 {
1300			compatible = "ti,omap4-hsmmc";
1301			ti,hwmods = "mmc2";
1302			ti,needs-special-reset;
1303			dmas = < 0x27 0x02 0x00 0x27 0x03 0x00 >;
1304			dma-names = "tx\0rx";
1305			interrupts = < 0x1c >;
1306			reg = < 0x481d8000 0x1000 >;
1307			status = "disabled";
1308		};
1309
1310		mmc@47810000 {
1311			compatible = "ti,omap4-hsmmc";
1312			ti,hwmods = "mmc3";
1313			ti,needs-special-reset;
1314			interrupts = < 0x1d >;
1315			reg = < 0x47810000 0x1000 >;
1316			status = "disabled";
1317		};
1318
1319		spinlock@480ca000 {
1320			compatible = "ti,omap4-hwspinlock";
1321			reg = < 0x480ca000 0x1000 >;
1322			ti,hwmods = "spinlock";
1323			#hwlock-cells = < 0x01 >;
1324		};
1325
1326		wdt@44e35000 {
1327			compatible = "ti,omap3-wdt";
1328			ti,hwmods = "wd_timer2";
1329			reg = < 0x44e35000 0x1000 >;
1330			interrupts = < 0x5b >;
1331		};
1332
1333		can@481cc000 {
1334			compatible = "ti,am3352-d_can";
1335			ti,hwmods = "d_can0";
1336			reg = < 0x481cc000 0x2000 >;
1337			clocks = < 0x32 >;
1338			clock-names = "fck";
1339			syscon-raminit = < 0x05 0x644 0x00 >;
1340			interrupts = < 0x34 >;
1341			status = "disabled";
1342		};
1343
1344		can@481d0000 {
1345			compatible = "ti,am3352-d_can";
1346			ti,hwmods = "d_can1";
1347			reg = < 0x481d0000 0x2000 >;
1348			clocks = < 0x33 >;
1349			clock-names = "fck";
1350			syscon-raminit = < 0x05 0x644 0x01 >;
1351			interrupts = < 0x37 >;
1352			status = "disabled";
1353		};
1354
1355		mailbox@480c8000 {
1356			compatible = "ti,omap4-mailbox";
1357			reg = < 0x480c8000 0x200 >;
1358			interrupts = < 0x4d >;
1359			ti,hwmods = "mailbox";
1360			#mbox-cells = < 0x01 >;
1361			ti,mbox-num-users = < 0x04 >;
1362			ti,mbox-num-fifos = < 0x08 >;
1363			phandle = < 0x25 >;
1364
1365			wkup_m3 {
1366				ti,mbox-send-noirq;
1367				ti,mbox-tx = < 0x00 0x00 0x00 >;
1368				ti,mbox-rx = < 0x00 0x00 0x03 >;
1369				phandle = < 0x26 >;
1370			};
1371		};
1372
1373		timer@44e31000 {
1374			compatible = "ti,am335x-timer-1ms";
1375			reg = < 0x44e31000 0x400 >;
1376			interrupts = < 0x43 >;
1377			ti,hwmods = "timer1";
1378			ti,timer-alwon;
1379			clocks = < 0x34 >;
1380			clock-names = "fck";
1381		};
1382
1383		timer@48040000 {
1384			compatible = "ti,am335x-timer";
1385			reg = < 0x48040000 0x400 >;
1386			interrupts = < 0x44 >;
1387			ti,hwmods = "timer2";
1388			clocks = < 0x35 >;
1389			clock-names = "fck";
1390		};
1391
1392		timer@48042000 {
1393			compatible = "ti,am335x-timer";
1394			reg = < 0x48042000 0x400 >;
1395			interrupts = < 0x45 >;
1396			ti,hwmods = "timer3";
1397		};
1398
1399		timer@48044000 {
1400			compatible = "ti,am335x-timer";
1401			reg = < 0x48044000 0x400 >;
1402			interrupts = < 0x5c >;
1403			ti,hwmods = "timer4";
1404			ti,timer-pwm;
1405		};
1406
1407		timer@48046000 {
1408			compatible = "ti,am335x-timer";
1409			reg = < 0x48046000 0x400 >;
1410			interrupts = < 0x5d >;
1411			ti,hwmods = "timer5";
1412			ti,timer-pwm;
1413		};
1414
1415		timer@48048000 {
1416			compatible = "ti,am335x-timer";
1417			reg = < 0x48048000 0x400 >;
1418			interrupts = < 0x5e >;
1419			ti,hwmods = "timer6";
1420			ti,timer-pwm;
1421		};
1422
1423		timer@4804a000 {
1424			compatible = "ti,am335x-timer";
1425			reg = < 0x4804a000 0x400 >;
1426			interrupts = < 0x5f >;
1427			ti,hwmods = "timer7";
1428			ti,timer-pwm;
1429		};
1430
1431		rtc@44e3e000 {
1432			compatible = "ti,am3352-rtc\0ti,da830-rtc";
1433			reg = < 0x44e3e000 0x1000 >;
1434			interrupts = < 0x4b 0x4c >;
1435			ti,hwmods = "rtc";
1436			clocks = < 0x17 0x14 0x138 0x00 >;
1437			clock-names = "ext-clk\0int-clk";
1438		};
1439
1440		spi@48030000 {
1441			compatible = "ti,omap4-mcspi";
1442			#address-cells = < 0x01 >;
1443			#size-cells = < 0x00 >;
1444			reg = < 0x48030000 0x400 >;
1445			interrupts = < 0x41 >;
1446			ti,spi-num-cs = < 0x02 >;
1447			ti,hwmods = "spi0";
1448			dmas = < 0x27 0x10 0x00 0x27 0x11 0x00 0x27 0x12 0x00 0x27 0x13 0x00 >;
1449			dma-names = "tx0\0rx0\0tx1\0rx1";
1450			status = "disabled";
1451		};
1452
1453		spi@481a0000 {
1454			compatible = "ti,omap4-mcspi";
1455			#address-cells = < 0x01 >;
1456			#size-cells = < 0x00 >;
1457			reg = < 0x481a0000 0x400 >;
1458			interrupts = < 0x7d >;
1459			ti,spi-num-cs = < 0x02 >;
1460			ti,hwmods = "spi1";
1461			dmas = < 0x27 0x2a 0x00 0x27 0x2b 0x00 0x27 0x2c 0x00 0x27 0x2d 0x00 >;
1462			dma-names = "tx0\0rx0\0tx1\0rx1";
1463			status = "disabled";
1464		};
1465
1466		usb@47400000 {
1467			compatible = "ti,am33xx-usb";
1468			reg = < 0x47400000 0x1000 >;
1469			ranges;
1470			#address-cells = < 0x01 >;
1471			#size-cells = < 0x01 >;
1472			ti,hwmods = "usb_otg_hs";
1473			status = "okay";
1474
1475			control@44e10620 {
1476				compatible = "ti,am335x-usb-ctrl-module";
1477				reg = < 0x44e10620 0x10 0x44e10648 0x04 >;
1478				reg-names = "phy_ctrl\0wakeup";
1479				status = "okay";
1480				phandle = < 0x36 >;
1481			};
1482
1483			usb-phy@47401300 {
1484				compatible = "ti,am335x-usb-phy";
1485				reg = < 0x47401300 0x100 >;
1486				reg-names = "phy";
1487				status = "okay";
1488				ti,ctrl_mod = < 0x36 >;
1489				#phy-cells = < 0x00 >;
1490				phandle = < 0x37 >;
1491			};
1492
1493			usb@47401000 {
1494				compatible = "ti,musb-am33xx";
1495				status = "okay";
1496				reg = < 0x47401400 0x400 0x47401000 0x200 >;
1497				reg-names = "mc\0control";
1498				interrupts = < 0x12 >;
1499				interrupt-names = "mc\0vbus";
1500				dr_mode = "peripheral";
1501				mentor,multipoint = < 0x01 >;
1502				mentor,num-eps = < 0x10 >;
1503				mentor,ram-bits = < 0x0c >;
1504				mentor,power = < 0x1f4 >;
1505				phys = < 0x37 >;
1506				dmas = < 0x38 0x00 0x00 0x38 0x01 0x00 0x38 0x02 0x00 0x38 0x03 0x00 0x38 0x04 0x00 0x38 0x05 0x00 0x38 0x06 0x00 0x38 0x07 0x00 0x38 0x08 0x00 0x38 0x09 0x00 0x38 0x0a 0x00 0x38 0x0b 0x00 0x38 0x0c 0x00 0x38 0x0d 0x00 0x38 0x0e 0x00 0x38 0x00 0x01 0x38 0x01 0x01 0x38 0x02 0x01 0x38 0x03 0x01 0x38 0x04 0x01 0x38 0x05 0x01 0x38 0x06 0x01 0x38 0x07 0x01 0x38 0x08 0x01 0x38 0x09 0x01 0x38 0x0a 0x01 0x38 0x0b 0x01 0x38 0x0c 0x01 0x38 0x0d 0x01 0x38 0x0e 0x01 >;
1507				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
1508				interrupts-extended = < 0x01 0x12 0x39 0x00 >;
1509			};
1510
1511			usb-phy@47401b00 {
1512				compatible = "ti,am335x-usb-phy";
1513				reg = < 0x47401b00 0x100 >;
1514				reg-names = "phy";
1515				status = "okay";
1516				ti,ctrl_mod = < 0x36 >;
1517				#phy-cells = < 0x00 >;
1518				phandle = < 0x3a >;
1519			};
1520
1521			usb@47401800 {
1522				compatible = "ti,musb-am33xx";
1523				status = "okay";
1524				reg = < 0x47401c00 0x400 0x47401800 0x200 >;
1525				reg-names = "mc\0control";
1526				interrupts = < 0x13 >;
1527				interrupt-names = "mc";
1528				dr_mode = "host";
1529				mentor,multipoint = < 0x01 >;
1530				mentor,num-eps = < 0x10 >;
1531				mentor,ram-bits = < 0x0c >;
1532				mentor,power = < 0x1f4 >;
1533				phys = < 0x3a >;
1534				dmas = < 0x38 0x0f 0x00 0x38 0x10 0x00 0x38 0x11 0x00 0x38 0x12 0x00 0x38 0x13 0x00 0x38 0x14 0x00 0x38 0x15 0x00 0x38 0x16 0x00 0x38 0x17 0x00 0x38 0x18 0x00 0x38 0x19 0x00 0x38 0x1a 0x00 0x38 0x1b 0x00 0x38 0x1c 0x00 0x38 0x1d 0x00 0x38 0x0f 0x01 0x38 0x10 0x01 0x38 0x11 0x01 0x38 0x12 0x01 0x38 0x13 0x01 0x38 0x14 0x01 0x38 0x15 0x01 0x38 0x16 0x01 0x38 0x17 0x01 0x38 0x18 0x01 0x38 0x19 0x01 0x38 0x1a 0x01 0x38 0x1b 0x01 0x38 0x1c 0x01 0x38 0x1d 0x01 >;
1535				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
1536			};
1537
1538			dma-controller@47402000 {
1539				compatible = "ti,am3359-cppi41";
1540				reg = < 0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000 >;
1541				reg-names = "glue\0controller\0scheduler\0queuemgr";
1542				interrupts = < 0x11 >;
1543				interrupt-names = "glue";
1544				#dma-cells = < 0x02 >;
1545				#dma-channels = < 0x1e >;
1546				#dma-requests = < 0x100 >;
1547				status = "okay";
1548				phandle = < 0x38 >;
1549			};
1550		};
1551
1552		epwmss@48300000 {
1553			compatible = "ti,am33xx-pwmss";
1554			reg = < 0x48300000 0x10 >;
1555			ti,hwmods = "epwmss0";
1556			#address-cells = < 0x01 >;
1557			#size-cells = < 0x01 >;
1558			status = "disabled";
1559			ranges = < 0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80 >;
1560
1561			ecap@48300100 {
1562				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1563				#pwm-cells = < 0x03 >;
1564				reg = < 0x48300100 0x80 >;
1565				clocks = < 0x23 >;
1566				clock-names = "fck";
1567				interrupts = < 0x1f >;
1568				interrupt-names = "ecap0";
1569				status = "disabled";
1570			};
1571
1572			pwm@48300200 {
1573				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1574				#pwm-cells = < 0x03 >;
1575				reg = < 0x48300200 0x80 >;
1576				clocks = < 0x3b 0x23 >;
1577				clock-names = "tbclk\0fck";
1578				status = "disabled";
1579			};
1580		};
1581
1582		epwmss@48302000 {
1583			compatible = "ti,am33xx-pwmss";
1584			reg = < 0x48302000 0x10 >;
1585			ti,hwmods = "epwmss1";
1586			#address-cells = < 0x01 >;
1587			#size-cells = < 0x01 >;
1588			status = "disabled";
1589			ranges = < 0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80 >;
1590
1591			ecap@48302100 {
1592				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1593				#pwm-cells = < 0x03 >;
1594				reg = < 0x48302100 0x80 >;
1595				clocks = < 0x23 >;
1596				clock-names = "fck";
1597				interrupts = < 0x2f >;
1598				interrupt-names = "ecap1";
1599				status = "disabled";
1600			};
1601
1602			pwm@48302200 {
1603				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1604				#pwm-cells = < 0x03 >;
1605				reg = < 0x48302200 0x80 >;
1606				clocks = < 0x3c 0x23 >;
1607				clock-names = "tbclk\0fck";
1608				status = "disabled";
1609			};
1610		};
1611
1612		epwmss@48304000 {
1613			compatible = "ti,am33xx-pwmss";
1614			reg = < 0x48304000 0x10 >;
1615			ti,hwmods = "epwmss2";
1616			#address-cells = < 0x01 >;
1617			#size-cells = < 0x01 >;
1618			status = "disabled";
1619			ranges = < 0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80 >;
1620
1621			ecap@48304100 {
1622				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1623				#pwm-cells = < 0x03 >;
1624				reg = < 0x48304100 0x80 >;
1625				clocks = < 0x23 >;
1626				clock-names = "fck";
1627				interrupts = < 0x3d >;
1628				interrupt-names = "ecap2";
1629				status = "disabled";
1630			};
1631
1632			pwm@48304200 {
1633				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1634				#pwm-cells = < 0x03 >;
1635				reg = < 0x48304200 0x80 >;
1636				clocks = < 0x3d 0x23 >;
1637				clock-names = "tbclk\0fck";
1638				status = "disabled";
1639			};
1640		};
1641
1642		ethernet@4a100000 {
1643			compatible = "ti,am335x-cpsw\0ti,cpsw";
1644			ti,hwmods = "cpgmac0";
1645			clocks = < 0x3e 0x3f >;
1646			clock-names = "fck\0cpts";
1647			cpdma_channels = < 0x08 >;
1648			ale_entries = < 0x400 >;
1649			bd_ram_size = < 0x2000 >;
1650			mac_control = < 0x20 >;
1651			slaves = < 0x01 >;
1652			active_slave = < 0x00 >;
1653			cpts_clock_mult = < 0x80000000 >;
1654			cpts_clock_shift = < 0x1d >;
1655			reg = < 0x4a100000 0x800 0x4a101200 0x100 >;
1656			#address-cells = < 0x01 >;
1657			#size-cells = < 0x01 >;
1658			interrupts = < 0x28 0x29 0x2a 0x2b >;
1659			ranges;
1660			syscon = < 0x05 >;
1661			status = "okay";
1662			pinctrl-names = "default\0sleep";
1663			pinctrl-0 = < 0x40 >;
1664			pinctrl-1 = < 0x41 >;
1665
1666			mdio@4a101000 {
1667				compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
1668				#address-cells = < 0x01 >;
1669				#size-cells = < 0x00 >;
1670				ti,hwmods = "davinci_mdio";
1671				bus_freq = < 0xf4240 >;
1672				reg = < 0x4a101000 0x100 >;
1673				status = "okay";
1674				pinctrl-names = "default\0sleep";
1675				pinctrl-0 = < 0x42 >;
1676				pinctrl-1 = < 0x43 >;
1677
1678				ethernet-phy@0 {
1679					reg = < 0x00 >;
1680					phandle = < 0x44 >;
1681				};
1682			};
1683
1684			slave@4a100200 {
1685				mac-address = [00 00 00 00 00 00];
1686				phy-handle = < 0x44 >;
1687				phy-mode = "mii";
1688			};
1689
1690			slave@4a100300 {
1691				mac-address = [00 00 00 00 00 00];
1692			};
1693
1694			cpsw-phy-sel@44e10650 {
1695				compatible = "ti,am3352-cpsw-phy-sel";
1696				reg = < 0x44e10650 0x04 >;
1697				reg-names = "gmii-sel";
1698			};
1699		};
1700
1701		ocmcram@40300000 {
1702			compatible = "mmio-sram";
1703			reg = < 0x40300000 0x10000 >;
1704			ranges = < 0x00 0x40300000 0x10000 >;
1705			#address-cells = < 0x01 >;
1706			#size-cells = < 0x01 >;
1707
1708			pm-sram-code@0 {
1709				compatible = "ti,sram";
1710				reg = < 0x00 0x1000 >;
1711				protect-exec;
1712				phandle = < 0x06 >;
1713			};
1714
1715			pm-sram-data@1000 {
1716				compatible = "ti,sram";
1717				reg = < 0x1000 0x1000 >;
1718				pool;
1719				phandle = < 0x07 >;
1720			};
1721		};
1722
1723		elm@48080000 {
1724			compatible = "ti,am3352-elm";
1725			reg = < 0x48080000 0x2000 >;
1726			interrupts = < 0x04 >;
1727			ti,hwmods = "elm";
1728			status = "disabled";
1729		};
1730
1731		lcdc@4830e000 {
1732			compatible = "ti,am33xx-tilcdc";
1733			reg = < 0x4830e000 0x1000 >;
1734			interrupts = < 0x24 >;
1735			ti,hwmods = "lcdc";
1736			status = "disabled";
1737		};
1738
1739		tscadc@44e0d000 {
1740			compatible = "ti,am3359-tscadc";
1741			reg = < 0x44e0d000 0x1000 >;
1742			interrupts = < 0x10 >;
1743			ti,hwmods = "adc_tsc";
1744			status = "disabled";
1745			dmas = < 0x27 0x35 0x00 0x27 0x39 0x00 >;
1746			dma-names = "fifo0\0fifo1";
1747
1748			tsc {
1749				compatible = "ti,am3359-tsc";
1750			};
1751
1752			adc {
1753				#io-channel-cells = < 0x01 >;
1754				compatible = "ti,am3359-adc";
1755			};
1756		};
1757
1758		emif@4c000000 {
1759			compatible = "ti,emif-am3352";
1760			reg = < 0x4c000000 0x1000000 >;
1761			ti,hwmods = "emif";
1762			interrupts = < 0x65 >;
1763			sram = < 0x06 0x07 >;
1764			ti,no-idle;
1765		};
1766
1767		gpmc@50000000 {
1768			compatible = "ti,am3352-gpmc";
1769			ti,hwmods = "gpmc";
1770			ti,no-idle-on-init;
1771			reg = < 0x50000000 0x2000 >;
1772			interrupts = < 0x64 >;
1773			dmas = < 0x27 0x34 0x00 >;
1774			dma-names = "rxtx";
1775			gpmc,num-cs = < 0x07 >;
1776			gpmc,num-waitpins = < 0x02 >;
1777			#address-cells = < 0x02 >;
1778			#size-cells = < 0x01 >;
1779			interrupt-controller;
1780			#interrupt-cells = < 0x02 >;
1781			gpio-controller;
1782			#gpio-cells = < 0x02 >;
1783			status = "disabled";
1784		};
1785
1786		sham@53100000 {
1787			compatible = "ti,omap4-sham";
1788			ti,hwmods = "sham";
1789			reg = < 0x53100000 0x200 >;
1790			interrupts = < 0x6d >;
1791			dmas = < 0x27 0x24 0x00 >;
1792			dma-names = "rx";
1793			status = "okay";
1794		};
1795
1796		aes@53500000 {
1797			compatible = "ti,omap4-aes";
1798			ti,hwmods = "aes";
1799			reg = < 0x53500000 0xa0 >;
1800			interrupts = < 0x67 >;
1801			dmas = < 0x27 0x06 0x00 0x27 0x05 0x00 >;
1802			dma-names = "tx\0rx";
1803			status = "okay";
1804		};
1805
1806		mcasp@48038000 {
1807			compatible = "ti,am33xx-mcasp-audio";
1808			ti,hwmods = "mcasp0";
1809			reg = < 0x48038000 0x2000 0x46000000 0x400000 >;
1810			reg-names = "mpu\0dat";
1811			interrupts = < 0x50 0x51 >;
1812			interrupt-names = "tx\0rx";
1813			status = "disabled";
1814			dmas = < 0x27 0x08 0x02 0x27 0x09 0x02 >;
1815			dma-names = "tx\0rx";
1816		};
1817
1818		mcasp@4803c000 {
1819			compatible = "ti,am33xx-mcasp-audio";
1820			ti,hwmods = "mcasp1";
1821			reg = < 0x4803c000 0x2000 0x46400000 0x400000 >;
1822			reg-names = "mpu\0dat";
1823			interrupts = < 0x52 0x53 >;
1824			interrupt-names = "tx\0rx";
1825			status = "disabled";
1826			dmas = < 0x27 0x0a 0x02 0x27 0x0b 0x02 >;
1827			dma-names = "tx\0rx";
1828		};
1829
1830		rng@48310000 {
1831			compatible = "ti,omap4-rng";
1832			ti,hwmods = "rng";
1833			reg = < 0x48310000 0x2000 >;
1834			interrupts = < 0x6f >;
1835		};
1836	};
1837
1838	memory@80000000 {
1839		device_type = "memory";
1840		reg = < 0x80000000 0x10000000 >;
1841	};
1842
1843	leds {
1844		pinctrl-names = "default";
1845		pinctrl-0 = < 0x45 >;
1846		compatible = "gpio-leds";
1847
1848		led2 {
1849			label = "beaglebone:green:heartbeat";
1850			gpios = < 0x46 0x15 0x00 >;
1851			linux,default-trigger = "heartbeat";
1852			default-state = "off";
1853		};
1854
1855		led3 {
1856			label = "beaglebone:green:mmc0";
1857			gpios = < 0x46 0x16 0x00 >;
1858			linux,default-trigger = "mmc0";
1859			default-state = "off";
1860		};
1861
1862		led4 {
1863			label = "beaglebone:green:usr2";
1864			gpios = < 0x46 0x17 0x00 >;
1865			linux,default-trigger = "cpu0";
1866			default-state = "off";
1867		};
1868
1869		led5 {
1870			label = "beaglebone:green:usr3";
1871			gpios = < 0x46 0x18 0x00 >;
1872			linux,default-trigger = "mmc1";
1873			default-state = "off";
1874		};
1875	};
1876
1877	fixedregulator0 {
1878		compatible = "regulator-fixed";
1879		regulator-name = "vmmcsd_fixed";
1880		regulator-min-microvolt = < 0x325aa0 >;
1881		regulator-max-microvolt = < 0x325aa0 >;
1882	};
1883};
1884