1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	compatible = "ti,am335x-bone-blue\0ti,am33xx";
15	interrupt-parent = < 0x01 >;
16	#address-cells = < 0x01 >;
17	#size-cells = < 0x01 >;
18	model = "TI AM335x BeagleBone Blue";
19
20	chosen {
21		stdout-path = "/ocp/serial@44e09000";
22	};
23
24	aliases {
25		i2c0 = "/ocp/i2c@44e0b000";
26		i2c1 = "/ocp/i2c@4802a000";
27		i2c2 = "/ocp/i2c@4819c000";
28		serial0 = "/ocp/serial@44e09000";
29		serial1 = "/ocp/serial@48022000";
30		serial2 = "/ocp/serial@48024000";
31		serial3 = "/ocp/serial@481a6000";
32		serial4 = "/ocp/serial@481a8000";
33		serial5 = "/ocp/serial@481aa000";
34		d-can0 = "/ocp/can@481cc000";
35		d-can1 = "/ocp/can@481d0000";
36		usb0 = "/ocp/usb@47400000/usb@47401000";
37		usb1 = "/ocp/usb@47400000/usb@47401800";
38		phy0 = "/ocp/usb@47400000/usb-phy@47401300";
39		phy1 = "/ocp/usb@47400000/usb-phy@47401b00";
40		ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200";
41		ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300";
42		spi0 = "/ocp/spi@48030000";
43		spi1 = "/ocp/spi@481a0000";
44	};
45
46	cpus {
47		#address-cells = < 0x01 >;
48		#size-cells = < 0x00 >;
49
50		cpu@0 {
51			compatible = "arm,cortex-a8";
52			device_type = "cpu";
53			reg = < 0x00 >;
54			operating-points-v2 = < 0x02 >;
55			clocks = < 0x03 >;
56			clock-names = "cpu";
57			clock-latency = < 0x493e0 >;
58			cpu0-supply = < 0x04 >;
59		};
60	};
61
62	opp-table {
63		compatible = "operating-points-v2-ti-cpu";
64		syscon = < 0x05 >;
65		phandle = < 0x02 >;
66
67		opp50-300000000 {
68			opp-hz = < 0x00 0x11e1a300 >;
69			opp-microvolt = < 0xe7ef0 0xe34b8 0xec928 >;
70			opp-supported-hw = < 0x06 0x10 >;
71			opp-suspend;
72		};
73
74		opp100-275000000 {
75			opp-hz = < 0x00 0x10642ac0 >;
76			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
77			opp-supported-hw = < 0x01 0xff >;
78			opp-suspend;
79		};
80
81		opp100-300000000 {
82			opp-hz = < 0x00 0x11e1a300 >;
83			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
84			opp-supported-hw = < 0x06 0x20 >;
85			opp-suspend;
86		};
87
88		opp100-500000000 {
89			opp-hz = < 0x00 0x1dcd6500 >;
90			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
91			opp-supported-hw = < 0x01 0xffff >;
92		};
93
94		opp100-600000000 {
95			opp-hz = < 0x00 0x23c34600 >;
96			opp-microvolt = < 0x10c8e0 0x1072f0 0x111ed0 >;
97			opp-supported-hw = < 0x06 0x40 >;
98		};
99
100		opp120-600000000 {
101			opp-hz = < 0x00 0x23c34600 >;
102			opp-microvolt = < 0x124f80 0x11f1c0 0x12ad40 >;
103			opp-supported-hw = < 0x01 0xffff >;
104		};
105
106		opp120-720000000 {
107			opp-hz = < 0x00 0x2aea5400 >;
108			opp-microvolt = < 0x124f80 0x11f1c0 0x12ad40 >;
109			opp-supported-hw = < 0x06 0x80 >;
110		};
111
112		oppturbo-720000000 {
113			opp-hz = < 0x00 0x2aea5400 >;
114			opp-microvolt = < 0x1339e0 0x12d770 0x139c50 >;
115			opp-supported-hw = < 0x01 0xffff >;
116		};
117
118		oppturbo-800000000 {
119			opp-hz = < 0x00 0x2faf0800 >;
120			opp-microvolt = < 0x1339e0 0x12d770 0x139c50 >;
121			opp-supported-hw = < 0x06 0x100 >;
122		};
123
124		oppnitro-1000000000 {
125			opp-hz = < 0x00 0x3b9aca00 >;
126			opp-microvolt = < 0x1437c8 0x13d044 0x149f4c >;
127			opp-supported-hw = < 0x04 0x200 >;
128		};
129	};
130
131	pmu@4b000000 {
132		compatible = "arm,cortex-a8-pmu";
133		interrupts = < 0x03 >;
134		reg = < 0x4b000000 0x1000000 >;
135		ti,hwmods = "debugss";
136	};
137
138	soc {
139		compatible = "ti,omap-infra";
140
141		mpu {
142			compatible = "ti,omap3-mpu";
143			ti,hwmods = "mpu";
144			pm-sram = < 0x06 0x07 >;
145		};
146	};
147
148	ocp {
149		compatible = "simple-bus";
150		#address-cells = < 0x01 >;
151		#size-cells = < 0x01 >;
152		ranges;
153		ti,hwmods = "l3_main";
154
155		l4_wkup@44c00000 {
156			compatible = "ti,am3-l4-wkup\0simple-bus";
157			#address-cells = < 0x01 >;
158			#size-cells = < 0x01 >;
159			ranges = < 0x00 0x44c00000 0x280000 >;
160
161			wkup_m3@100000 {
162				compatible = "ti,am3352-wkup-m3";
163				reg = < 0x100000 0x4000 0x180000 0x2000 >;
164				reg-names = "umem\0dmem";
165				ti,hwmods = "wkup_m3";
166				ti,pm-firmware = "am335x-pm-firmware.elf";
167				phandle = < 0x23 >;
168			};
169
170			prcm@200000 {
171				compatible = "ti,am3-prcm\0simple-bus";
172				reg = < 0x200000 0x4000 >;
173				#address-cells = < 0x01 >;
174				#size-cells = < 0x01 >;
175				ranges = < 0x00 0x200000 0x4000 >;
176
177				clocks {
178					#address-cells = < 0x01 >;
179					#size-cells = < 0x00 >;
180
181					clk_32768_ck {
182						#clock-cells = < 0x00 >;
183						compatible = "fixed-clock";
184						clock-frequency = < 0x8000 >;
185						phandle = < 0x17 >;
186					};
187
188					clk_rc32k_ck {
189						#clock-cells = < 0x00 >;
190						compatible = "fixed-clock";
191						clock-frequency = < 0x7d00 >;
192						phandle = < 0x16 >;
193					};
194
195					virt_19200000_ck {
196						#clock-cells = < 0x00 >;
197						compatible = "fixed-clock";
198						clock-frequency = < 0x124f800 >;
199						phandle = < 0x1e >;
200					};
201
202					virt_24000000_ck {
203						#clock-cells = < 0x00 >;
204						compatible = "fixed-clock";
205						clock-frequency = < 0x16e3600 >;
206						phandle = < 0x1f >;
207					};
208
209					virt_25000000_ck {
210						#clock-cells = < 0x00 >;
211						compatible = "fixed-clock";
212						clock-frequency = < 0x17d7840 >;
213						phandle = < 0x20 >;
214					};
215
216					virt_26000000_ck {
217						#clock-cells = < 0x00 >;
218						compatible = "fixed-clock";
219						clock-frequency = < 0x18cba80 >;
220						phandle = < 0x21 >;
221					};
222
223					tclkin_ck {
224						#clock-cells = < 0x00 >;
225						compatible = "fixed-clock";
226						clock-frequency = < 0xb71b00 >;
227						phandle = < 0x15 >;
228					};
229
230					dpll_core_ck@490 {
231						#clock-cells = < 0x00 >;
232						compatible = "ti,am3-dpll-core-clock";
233						clocks = < 0x08 0x08 >;
234						reg = < 0x490 0x45c 0x468 >;
235						phandle = < 0x09 >;
236					};
237
238					dpll_core_x2_ck {
239						#clock-cells = < 0x00 >;
240						compatible = "ti,am3-dpll-x2-clock";
241						clocks = < 0x09 >;
242						phandle = < 0x0a >;
243					};
244
245					dpll_core_m4_ck@480 {
246						#clock-cells = < 0x00 >;
247						compatible = "ti,divider-clock";
248						clocks = < 0x0a >;
249						ti,max-div = < 0x1f >;
250						reg = < 0x480 >;
251						ti,index-starts-at-one;
252						phandle = < 0x11 >;
253					};
254
255					dpll_core_m5_ck@484 {
256						#clock-cells = < 0x00 >;
257						compatible = "ti,divider-clock";
258						clocks = < 0x0a >;
259						ti,max-div = < 0x1f >;
260						reg = < 0x484 >;
261						ti,index-starts-at-one;
262						phandle = < 0x19 >;
263					};
264
265					dpll_core_m6_ck@4d8 {
266						#clock-cells = < 0x00 >;
267						compatible = "ti,divider-clock";
268						clocks = < 0x0a >;
269						ti,max-div = < 0x1f >;
270						reg = < 0x4d8 >;
271						ti,index-starts-at-one;
272					};
273
274					dpll_mpu_ck@488 {
275						#clock-cells = < 0x00 >;
276						compatible = "ti,am3-dpll-clock";
277						clocks = < 0x08 0x08 >;
278						reg = < 0x488 0x420 0x42c >;
279						phandle = < 0x03 >;
280					};
281
282					dpll_mpu_m2_ck@4a8 {
283						#clock-cells = < 0x00 >;
284						compatible = "ti,divider-clock";
285						clocks = < 0x03 >;
286						ti,max-div = < 0x1f >;
287						reg = < 0x4a8 >;
288						ti,index-starts-at-one;
289					};
290
291					dpll_ddr_ck@494 {
292						#clock-cells = < 0x00 >;
293						compatible = "ti,am3-dpll-no-gate-clock";
294						clocks = < 0x08 0x08 >;
295						reg = < 0x494 0x434 0x440 >;
296						phandle = < 0x0b >;
297					};
298
299					dpll_ddr_m2_ck@4a0 {
300						#clock-cells = < 0x00 >;
301						compatible = "ti,divider-clock";
302						clocks = < 0x0b >;
303						ti,max-div = < 0x1f >;
304						reg = < 0x4a0 >;
305						ti,index-starts-at-one;
306						phandle = < 0x0c >;
307					};
308
309					dpll_ddr_m2_div2_ck {
310						#clock-cells = < 0x00 >;
311						compatible = "fixed-factor-clock";
312						clocks = < 0x0c >;
313						clock-mult = < 0x01 >;
314						clock-div = < 0x02 >;
315					};
316
317					dpll_disp_ck@498 {
318						#clock-cells = < 0x00 >;
319						compatible = "ti,am3-dpll-no-gate-clock";
320						clocks = < 0x08 0x08 >;
321						reg = < 0x498 0x448 0x454 >;
322						phandle = < 0x0d >;
323					};
324
325					dpll_disp_m2_ck@4a4 {
326						#clock-cells = < 0x00 >;
327						compatible = "ti,divider-clock";
328						clocks = < 0x0d >;
329						ti,max-div = < 0x1f >;
330						reg = < 0x4a4 >;
331						ti,index-starts-at-one;
332						ti,set-rate-parent;
333						phandle = < 0x13 >;
334					};
335
336					dpll_per_ck@48c {
337						#clock-cells = < 0x00 >;
338						compatible = "ti,am3-dpll-no-gate-j-type-clock";
339						clocks = < 0x08 0x08 >;
340						reg = < 0x48c 0x470 0x49c >;
341						phandle = < 0x0e >;
342					};
343
344					dpll_per_m2_ck@4ac {
345						#clock-cells = < 0x00 >;
346						compatible = "ti,divider-clock";
347						clocks = < 0x0e >;
348						ti,max-div = < 0x1f >;
349						reg = < 0x4ac >;
350						ti,index-starts-at-one;
351						phandle = < 0x0f >;
352					};
353
354					dpll_per_m2_div4_wkupdm_ck {
355						#clock-cells = < 0x00 >;
356						compatible = "fixed-factor-clock";
357						clocks = < 0x0f >;
358						clock-mult = < 0x01 >;
359						clock-div = < 0x04 >;
360					};
361
362					dpll_per_m2_div4_ck {
363						#clock-cells = < 0x00 >;
364						compatible = "fixed-factor-clock";
365						clocks = < 0x0f >;
366						clock-mult = < 0x01 >;
367						clock-div = < 0x04 >;
368					};
369
370					clk_24mhz {
371						#clock-cells = < 0x00 >;
372						compatible = "fixed-factor-clock";
373						clocks = < 0x0f >;
374						clock-mult = < 0x01 >;
375						clock-div = < 0x08 >;
376						phandle = < 0x10 >;
377					};
378
379					clkdiv32k_ck {
380						#clock-cells = < 0x00 >;
381						compatible = "fixed-factor-clock";
382						clocks = < 0x10 >;
383						clock-mult = < 0x01 >;
384						clock-div = < 0x2dc >;
385					};
386
387					l3_gclk {
388						#clock-cells = < 0x00 >;
389						compatible = "fixed-factor-clock";
390						clocks = < 0x11 >;
391						clock-mult = < 0x01 >;
392						clock-div = < 0x01 >;
393						phandle = < 0x12 >;
394					};
395
396					pruss_ocp_gclk@530 {
397						#clock-cells = < 0x00 >;
398						compatible = "ti,mux-clock";
399						clocks = < 0x12 0x13 >;
400						reg = < 0x530 >;
401					};
402
403					mmu_fck@914 {
404						#clock-cells = < 0x00 >;
405						compatible = "ti,gate-clock";
406						clocks = < 0x11 >;
407						ti,bit-shift = < 0x01 >;
408						reg = < 0x914 >;
409					};
410
411					timer1_fck@528 {
412						#clock-cells = < 0x00 >;
413						compatible = "ti,mux-clock";
414						clocks = < 0x08 0x14 0x138 0x00 0x15 0x16 0x17 >;
415						reg = < 0x528 >;
416						phandle = < 0x3f >;
417					};
418
419					timer2_fck@508 {
420						#clock-cells = < 0x00 >;
421						compatible = "ti,mux-clock";
422						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
423						reg = < 0x508 >;
424						phandle = < 0x40 >;
425					};
426
427					timer3_fck@50c {
428						#clock-cells = < 0x00 >;
429						compatible = "ti,mux-clock";
430						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
431						reg = < 0x50c >;
432					};
433
434					timer4_fck@510 {
435						#clock-cells = < 0x00 >;
436						compatible = "ti,mux-clock";
437						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
438						reg = < 0x510 >;
439					};
440
441					timer5_fck@518 {
442						#clock-cells = < 0x00 >;
443						compatible = "ti,mux-clock";
444						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
445						reg = < 0x518 >;
446					};
447
448					timer6_fck@51c {
449						#clock-cells = < 0x00 >;
450						compatible = "ti,mux-clock";
451						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
452						reg = < 0x51c >;
453					};
454
455					timer7_fck@504 {
456						#clock-cells = < 0x00 >;
457						compatible = "ti,mux-clock";
458						clocks = < 0x15 0x08 0x14 0x138 0x00 >;
459						reg = < 0x504 >;
460					};
461
462					usbotg_fck@47c {
463						#clock-cells = < 0x00 >;
464						compatible = "ti,gate-clock";
465						clocks = < 0x0e >;
466						ti,bit-shift = < 0x08 >;
467						reg = < 0x47c >;
468					};
469
470					dpll_core_m4_div2_ck {
471						#clock-cells = < 0x00 >;
472						compatible = "fixed-factor-clock";
473						clocks = < 0x11 >;
474						clock-mult = < 0x01 >;
475						clock-div = < 0x02 >;
476						phandle = < 0x18 >;
477					};
478
479					ieee5000_fck@e4 {
480						#clock-cells = < 0x00 >;
481						compatible = "ti,gate-clock";
482						clocks = < 0x18 >;
483						ti,bit-shift = < 0x01 >;
484						reg = < 0xe4 >;
485					};
486
487					wdt1_fck@538 {
488						#clock-cells = < 0x00 >;
489						compatible = "ti,mux-clock";
490						clocks = < 0x16 0x14 0x138 0x00 >;
491						reg = < 0x538 >;
492					};
493
494					l4_rtc_gclk {
495						#clock-cells = < 0x00 >;
496						compatible = "fixed-factor-clock";
497						clocks = < 0x11 >;
498						clock-mult = < 0x01 >;
499						clock-div = < 0x02 >;
500					};
501
502					l4hs_gclk {
503						#clock-cells = < 0x00 >;
504						compatible = "fixed-factor-clock";
505						clocks = < 0x11 >;
506						clock-mult = < 0x01 >;
507						clock-div = < 0x01 >;
508					};
509
510					l3s_gclk {
511						#clock-cells = < 0x00 >;
512						compatible = "fixed-factor-clock";
513						clocks = < 0x18 >;
514						clock-mult = < 0x01 >;
515						clock-div = < 0x01 >;
516					};
517
518					l4fw_gclk {
519						#clock-cells = < 0x00 >;
520						compatible = "fixed-factor-clock";
521						clocks = < 0x18 >;
522						clock-mult = < 0x01 >;
523						clock-div = < 0x01 >;
524					};
525
526					l4ls_gclk {
527						#clock-cells = < 0x00 >;
528						compatible = "fixed-factor-clock";
529						clocks = < 0x18 >;
530						clock-mult = < 0x01 >;
531						clock-div = < 0x01 >;
532						phandle = < 0x22 >;
533					};
534
535					sysclk_div_ck {
536						#clock-cells = < 0x00 >;
537						compatible = "fixed-factor-clock";
538						clocks = < 0x11 >;
539						clock-mult = < 0x01 >;
540						clock-div = < 0x01 >;
541					};
542
543					cpsw_125mhz_gclk {
544						#clock-cells = < 0x00 >;
545						compatible = "fixed-factor-clock";
546						clocks = < 0x19 >;
547						clock-mult = < 0x01 >;
548						clock-div = < 0x02 >;
549						phandle = < 0x49 >;
550					};
551
552					cpsw_cpts_rft_clk@520 {
553						#clock-cells = < 0x00 >;
554						compatible = "ti,mux-clock";
555						clocks = < 0x19 0x11 >;
556						reg = < 0x520 >;
557						phandle = < 0x4a >;
558					};
559
560					gpio0_dbclk_mux_ck@53c {
561						#clock-cells = < 0x00 >;
562						compatible = "ti,mux-clock";
563						clocks = < 0x16 0x17 0x14 0x138 0x00 >;
564						reg = < 0x53c >;
565					};
566
567					lcd_gclk@534 {
568						#clock-cells = < 0x00 >;
569						compatible = "ti,mux-clock";
570						clocks = < 0x13 0x19 0x0f >;
571						reg = < 0x534 >;
572						ti,set-rate-parent;
573						phandle = < 0x1b >;
574					};
575
576					mmc_clk {
577						#clock-cells = < 0x00 >;
578						compatible = "fixed-factor-clock";
579						clocks = < 0x0f >;
580						clock-mult = < 0x01 >;
581						clock-div = < 0x02 >;
582					};
583
584					gfx_fclk_clksel_ck@52c {
585						#clock-cells = < 0x00 >;
586						compatible = "ti,mux-clock";
587						clocks = < 0x11 0x0f >;
588						ti,bit-shift = < 0x01 >;
589						reg = < 0x52c >;
590						phandle = < 0x1a >;
591					};
592
593					gfx_fck_div_ck@52c {
594						#clock-cells = < 0x00 >;
595						compatible = "ti,divider-clock";
596						clocks = < 0x1a >;
597						reg = < 0x52c >;
598						ti,max-div = < 0x02 >;
599					};
600
601					sysclkout_pre_ck@700 {
602						#clock-cells = < 0x00 >;
603						compatible = "ti,mux-clock";
604						clocks = < 0x17 0x12 0x0c 0x0f 0x1b >;
605						reg = < 0x700 >;
606						phandle = < 0x1c >;
607					};
608
609					clkout2_div_ck@700 {
610						#clock-cells = < 0x00 >;
611						compatible = "ti,divider-clock";
612						clocks = < 0x1c >;
613						ti,bit-shift = < 0x03 >;
614						ti,max-div = < 0x08 >;
615						reg = < 0x700 >;
616						phandle = < 0x1d >;
617					};
618
619					clkout2_ck@700 {
620						#clock-cells = < 0x00 >;
621						compatible = "ti,gate-clock";
622						clocks = < 0x1d >;
623						ti,bit-shift = < 0x07 >;
624						reg = < 0x700 >;
625					};
626				};
627
628				clockdomains {
629				};
630
631				l4_per_cm@0 {
632					compatible = "ti,omap4-cm";
633					reg = < 0x00 0x200 >;
634					#address-cells = < 0x01 >;
635					#size-cells = < 0x01 >;
636					ranges = < 0x00 0x00 0x200 >;
637
638					clk@14 {
639						compatible = "ti,clkctrl";
640						reg = < 0x14 0x13c >;
641						#clock-cells = < 0x02 >;
642						phandle = < 0x14 >;
643					};
644				};
645
646				l4_wkup_cm@400 {
647					compatible = "ti,omap4-cm";
648					reg = < 0x400 0x100 >;
649					#address-cells = < 0x01 >;
650					#size-cells = < 0x01 >;
651					ranges = < 0x00 0x400 0x100 >;
652
653					clk@4 {
654						compatible = "ti,clkctrl";
655						reg = < 0x04 0xd4 >;
656						#clock-cells = < 0x02 >;
657					};
658				};
659
660				mpu_cm@600 {
661					compatible = "ti,omap4-cm";
662					reg = < 0x600 0x100 >;
663					#address-cells = < 0x01 >;
664					#size-cells = < 0x01 >;
665					ranges = < 0x00 0x600 0x100 >;
666
667					clk@4 {
668						compatible = "ti,clkctrl";
669						reg = < 0x04 0x04 >;
670						#clock-cells = < 0x02 >;
671					};
672				};
673
674				l4_rtc_cm@800 {
675					compatible = "ti,omap4-cm";
676					reg = < 0x800 0x100 >;
677					#address-cells = < 0x01 >;
678					#size-cells = < 0x01 >;
679					ranges = < 0x00 0x800 0x100 >;
680
681					clk@0 {
682						compatible = "ti,clkctrl";
683						reg = < 0x00 0x04 >;
684						#clock-cells = < 0x02 >;
685					};
686				};
687
688				gfx_l3_cm@900 {
689					compatible = "ti,omap4-cm";
690					reg = < 0x900 0x100 >;
691					#address-cells = < 0x01 >;
692					#size-cells = < 0x01 >;
693					ranges = < 0x00 0x900 0x100 >;
694
695					clk@4 {
696						compatible = "ti,clkctrl";
697						reg = < 0x04 0x04 >;
698						#clock-cells = < 0x02 >;
699					};
700				};
701
702				l4_cefuse_cm@a00 {
703					compatible = "ti,omap4-cm";
704					reg = < 0xa00 0x100 >;
705					#address-cells = < 0x01 >;
706					#size-cells = < 0x01 >;
707					ranges = < 0x00 0xa00 0x100 >;
708
709					clk@20 {
710						compatible = "ti,clkctrl";
711						reg = < 0x20 0x04 >;
712						#clock-cells = < 0x02 >;
713					};
714				};
715			};
716
717			scm@210000 {
718				compatible = "ti,am3-scm\0simple-bus";
719				reg = < 0x210000 0x2000 >;
720				#address-cells = < 0x01 >;
721				#size-cells = < 0x01 >;
722				#pinctrl-cells = < 0x01 >;
723				ranges = < 0x00 0x210000 0x2000 >;
724
725				pinmux@800 {
726					compatible = "pinctrl-single";
727					reg = < 0x800 0x238 >;
728					#address-cells = < 0x01 >;
729					#size-cells = < 0x00 >;
730					#pinctrl-cells = < 0x01 >;
731					pinctrl-single,register-width = < 0x20 >;
732					pinctrl-single,function-mask = < 0x7f >;
733
734					user_leds_s0 {
735						pinctrl-single,pins = < 0x54 0x0f 0x58 0x0f 0x5c 0x0f 0x60 0x0f 0x1b0 0x0f 0x90 0x0f 0x94 0x0f 0x2c 0x0f 0xdc 0x0f 0x7c 0x0f 0x28 0x0f >;
736						phandle = < 0x4b >;
737					};
738
739					pinmux_i2c0_pins {
740						pinctrl-single,pins = < 0x188 0x30 0x18c 0x30 >;
741						phandle = < 0x32 >;
742					};
743
744					pinmux_i2c2_pins {
745						pinctrl-single,pins = < 0x178 0x33 0x17c 0x33 >;
746						phandle = < 0x33 >;
747					};
748
749					pinmux_uart0_pins {
750						pinctrl-single,pins = < 0x170 0x30 0x174 0x00 >;
751						phandle = < 0x2a >;
752					};
753
754					pinmux_uart1_pins {
755						pinctrl-single,pins = < 0x180 0x30 0x184 0x00 >;
756						phandle = < 0x2b >;
757					};
758
759					pinmux_uart2_pins {
760						pinctrl-single,pins = < 0x150 0x31 0x154 0x01 >;
761						phandle = < 0x2c >;
762					};
763
764					pinmux_uart4_pins {
765						pinctrl-single,pins = < 0x70 0x36 >;
766						phandle = < 0x30 >;
767					};
768
769					pinmux_uart5_pins {
770						pinctrl-single,pins = < 0xc4 0x34 0xc0 0x04 >;
771						phandle = < 0x31 >;
772					};
773
774					pinmux_mmc1_pins {
775						pinctrl-single,pins = < 0x160 0x2f >;
776						phandle = < 0x37 >;
777					};
778
779					pinmux_mmc2_pins {
780						pinctrl-single,pins = < 0x80 0x32 0x84 0x32 0x00 0x31 0x04 0x31 0x08 0x31 0x0c 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31 >;
781						phandle = < 0x38 >;
782					};
783
784					pinmux_mmc3_pins {
785						pinctrl-single,pins = < 0x13c 0x36 0x114 0x36 0x118 0x35 0x11c 0x35 0x120 0x35 0x108 0x35 >;
786						phandle = < 0x3a >;
787					};
788
789					pinmux_bt_pins {
790						pinctrl-single,pins = < 0x128 0x17 >;
791						phandle = < 0x2e >;
792					};
793
794					pinmux_uart3_pins {
795						pinctrl-single,pins = < 0x134 0x31 0x138 0x01 0x148 0x2b 0x14c 0x03 >;
796						phandle = < 0x2d >;
797					};
798
799					pinmux_wl18xx_pins {
800						pinctrl-single,pins = < 0x12c 0x07 0x124 0x27 0x130 0x17 >;
801						phandle = < 0x3b >;
802					};
803
804					pinmux_dcan1_pins {
805						pinctrl-single,pins = < 0x16c 0x2a 0x168 0x0a 0x140 0x0f >;
806						phandle = < 0x3e >;
807					};
808				};
809
810				scm_conf@0 {
811					compatible = "syscon\0simple-bus";
812					reg = < 0x00 0x800 >;
813					#address-cells = < 0x01 >;
814					#size-cells = < 0x01 >;
815					ranges = < 0x00 0x00 0x800 >;
816					phandle = < 0x05 >;
817
818					clocks {
819						#address-cells = < 0x01 >;
820						#size-cells = < 0x00 >;
821
822						sys_clkin_ck@40 {
823							#clock-cells = < 0x00 >;
824							compatible = "ti,mux-clock";
825							clocks = < 0x1e 0x1f 0x20 0x21 >;
826							ti,bit-shift = < 0x16 >;
827							reg = < 0x40 >;
828							phandle = < 0x08 >;
829						};
830
831						adc_tsc_fck {
832							#clock-cells = < 0x00 >;
833							compatible = "fixed-factor-clock";
834							clocks = < 0x08 >;
835							clock-mult = < 0x01 >;
836							clock-div = < 0x01 >;
837						};
838
839						dcan0_fck {
840							#clock-cells = < 0x00 >;
841							compatible = "fixed-factor-clock";
842							clocks = < 0x08 >;
843							clock-mult = < 0x01 >;
844							clock-div = < 0x01 >;
845							phandle = < 0x3c >;
846						};
847
848						dcan1_fck {
849							#clock-cells = < 0x00 >;
850							compatible = "fixed-factor-clock";
851							clocks = < 0x08 >;
852							clock-mult = < 0x01 >;
853							clock-div = < 0x01 >;
854							phandle = < 0x3d >;
855						};
856
857						mcasp0_fck {
858							#clock-cells = < 0x00 >;
859							compatible = "fixed-factor-clock";
860							clocks = < 0x08 >;
861							clock-mult = < 0x01 >;
862							clock-div = < 0x01 >;
863						};
864
865						mcasp1_fck {
866							#clock-cells = < 0x00 >;
867							compatible = "fixed-factor-clock";
868							clocks = < 0x08 >;
869							clock-mult = < 0x01 >;
870							clock-div = < 0x01 >;
871						};
872
873						smartreflex0_fck {
874							#clock-cells = < 0x00 >;
875							compatible = "fixed-factor-clock";
876							clocks = < 0x08 >;
877							clock-mult = < 0x01 >;
878							clock-div = < 0x01 >;
879						};
880
881						smartreflex1_fck {
882							#clock-cells = < 0x00 >;
883							compatible = "fixed-factor-clock";
884							clocks = < 0x08 >;
885							clock-mult = < 0x01 >;
886							clock-div = < 0x01 >;
887						};
888
889						sha0_fck {
890							#clock-cells = < 0x00 >;
891							compatible = "fixed-factor-clock";
892							clocks = < 0x08 >;
893							clock-mult = < 0x01 >;
894							clock-div = < 0x01 >;
895						};
896
897						aes0_fck {
898							#clock-cells = < 0x00 >;
899							compatible = "fixed-factor-clock";
900							clocks = < 0x08 >;
901							clock-mult = < 0x01 >;
902							clock-div = < 0x01 >;
903						};
904
905						rng_fck {
906							#clock-cells = < 0x00 >;
907							compatible = "fixed-factor-clock";
908							clocks = < 0x08 >;
909							clock-mult = < 0x01 >;
910							clock-div = < 0x01 >;
911						};
912
913						ehrpwm0_tbclk@44e10664 {
914							#clock-cells = < 0x00 >;
915							compatible = "ti,gate-clock";
916							clocks = < 0x22 >;
917							ti,bit-shift = < 0x00 >;
918							reg = < 0x664 >;
919							phandle = < 0x46 >;
920						};
921
922						ehrpwm1_tbclk@44e10664 {
923							#clock-cells = < 0x00 >;
924							compatible = "ti,gate-clock";
925							clocks = < 0x22 >;
926							ti,bit-shift = < 0x01 >;
927							reg = < 0x664 >;
928							phandle = < 0x47 >;
929						};
930
931						ehrpwm2_tbclk@44e10664 {
932							#clock-cells = < 0x00 >;
933							compatible = "ti,gate-clock";
934							clocks = < 0x22 >;
935							ti,bit-shift = < 0x02 >;
936							reg = < 0x664 >;
937							phandle = < 0x48 >;
938						};
939					};
940				};
941
942				wkup_m3_ipc@1324 {
943					compatible = "ti,am3352-wkup-m3-ipc";
944					reg = < 0x1324 0x24 >;
945					interrupts = < 0x4e >;
946					ti,rproc = < 0x23 >;
947					mboxes = < 0x24 0x25 >;
948				};
949
950				dma-router@f90 {
951					compatible = "ti,am335x-edma-crossbar";
952					reg = < 0xf90 0x40 >;
953					#dma-cells = < 0x03 >;
954					dma-requests = < 0x20 >;
955					dma-masters = < 0x26 >;
956					phandle = < 0x35 >;
957				};
958
959				clockdomains {
960				};
961			};
962		};
963
964		interrupt-controller@48200000 {
965			compatible = "ti,am33xx-intc";
966			interrupt-controller;
967			#interrupt-cells = < 0x01 >;
968			reg = < 0x48200000 0x1000 >;
969			phandle = < 0x01 >;
970		};
971
972		edma@49000000 {
973			compatible = "ti,edma3-tpcc";
974			ti,hwmods = "tpcc";
975			reg = < 0x49000000 0x10000 >;
976			reg-names = "edma3_cc";
977			interrupts = < 0x0c 0x0d 0x0e >;
978			interrupt-names = "edma3_ccint\0edma3_mperr\0edma3_ccerrint";
979			dma-requests = < 0x40 >;
980			#dma-cells = < 0x02 >;
981			ti,tptcs = < 0x27 0x07 0x28 0x05 0x29 0x00 >;
982			ti,edma-memcpy-channels = < 0x14 0x15 >;
983			phandle = < 0x26 >;
984		};
985
986		tptc@49800000 {
987			compatible = "ti,edma3-tptc";
988			ti,hwmods = "tptc0";
989			reg = < 0x49800000 0x100000 >;
990			interrupts = < 0x70 >;
991			interrupt-names = "edma3_tcerrint";
992			phandle = < 0x27 >;
993		};
994
995		tptc@49900000 {
996			compatible = "ti,edma3-tptc";
997			ti,hwmods = "tptc1";
998			reg = < 0x49900000 0x100000 >;
999			interrupts = < 0x71 >;
1000			interrupt-names = "edma3_tcerrint";
1001			phandle = < 0x28 >;
1002		};
1003
1004		tptc@49a00000 {
1005			compatible = "ti,edma3-tptc";
1006			ti,hwmods = "tptc2";
1007			reg = < 0x49a00000 0x100000 >;
1008			interrupts = < 0x72 >;
1009			interrupt-names = "edma3_tcerrint";
1010			phandle = < 0x29 >;
1011		};
1012
1013		gpio@44e07000 {
1014			compatible = "ti,omap4-gpio";
1015			ti,hwmods = "gpio1";
1016			gpio-controller;
1017			#gpio-cells = < 0x02 >;
1018			interrupt-controller;
1019			#interrupt-cells = < 0x02 >;
1020			reg = < 0x44e07000 0x1000 >;
1021			interrupts = < 0x60 >;
1022			phandle = < 0x2f >;
1023		};
1024
1025		gpio@4804c000 {
1026			compatible = "ti,omap4-gpio";
1027			ti,hwmods = "gpio2";
1028			gpio-controller;
1029			#gpio-cells = < 0x02 >;
1030			interrupt-controller;
1031			#interrupt-cells = < 0x02 >;
1032			reg = < 0x4804c000 0x1000 >;
1033			interrupts = < 0x62 >;
1034			phandle = < 0x4c >;
1035		};
1036
1037		gpio@481ac000 {
1038			compatible = "ti,omap4-gpio";
1039			ti,hwmods = "gpio3";
1040			gpio-controller;
1041			#gpio-cells = < 0x02 >;
1042			interrupt-controller;
1043			#interrupt-cells = < 0x02 >;
1044			reg = < 0x481ac000 0x1000 >;
1045			interrupts = < 0x20 >;
1046			phandle = < 0x4d >;
1047		};
1048
1049		gpio@481ae000 {
1050			compatible = "ti,omap4-gpio";
1051			ti,hwmods = "gpio4";
1052			gpio-controller;
1053			#gpio-cells = < 0x02 >;
1054			interrupt-controller;
1055			#interrupt-cells = < 0x02 >;
1056			reg = < 0x481ae000 0x1000 >;
1057			interrupts = < 0x3e >;
1058			phandle = < 0x34 >;
1059
1060			ls_buf_en {
1061				gpio-hog;
1062				gpios = < 0x0a 0x00 >;
1063				output-high;
1064				line-name = "LS_BUF_EN";
1065			};
1066		};
1067
1068		serial@44e09000 {
1069			compatible = "ti,am3352-uart\0ti,omap3-uart";
1070			ti,hwmods = "uart1";
1071			clock-frequency = < 0x2dc6c00 >;
1072			reg = < 0x44e09000 0x2000 >;
1073			interrupts = < 0x48 >;
1074			status = "okay";
1075			dmas = < 0x26 0x1a 0x00 0x26 0x1b 0x00 >;
1076			dma-names = "tx\0rx";
1077			pinctrl-names = "default";
1078			pinctrl-0 = < 0x2a >;
1079		};
1080
1081		serial@48022000 {
1082			compatible = "ti,am3352-uart\0ti,omap3-uart";
1083			ti,hwmods = "uart2";
1084			clock-frequency = < 0x2dc6c00 >;
1085			reg = < 0x48022000 0x2000 >;
1086			interrupts = < 0x49 >;
1087			status = "okay";
1088			dmas = < 0x26 0x1c 0x00 0x26 0x1d 0x00 >;
1089			dma-names = "tx\0rx";
1090			pinctrl-names = "default";
1091			pinctrl-0 = < 0x2b >;
1092		};
1093
1094		serial@48024000 {
1095			compatible = "ti,am3352-uart\0ti,omap3-uart";
1096			ti,hwmods = "uart3";
1097			clock-frequency = < 0x2dc6c00 >;
1098			reg = < 0x48024000 0x2000 >;
1099			interrupts = < 0x4a >;
1100			status = "okay";
1101			dmas = < 0x26 0x1e 0x00 0x26 0x1f 0x00 >;
1102			dma-names = "tx\0rx";
1103			pinctrl-names = "default";
1104			pinctrl-0 = < 0x2c >;
1105		};
1106
1107		serial@481a6000 {
1108			compatible = "ti,am3352-uart\0ti,omap3-uart";
1109			ti,hwmods = "uart4";
1110			clock-frequency = < 0x2dc6c00 >;
1111			reg = < 0x481a6000 0x2000 >;
1112			interrupts = < 0x2c >;
1113			status = "okay";
1114			pinctrl-names = "default";
1115			pinctrl-0 = < 0x2d 0x2e >;
1116
1117			bluetooth {
1118				compatible = "ti,wl1835-st";
1119				enable-gpios = < 0x2f 0x1c 0x00 >;
1120			};
1121		};
1122
1123		serial@481a8000 {
1124			compatible = "ti,am3352-uart\0ti,omap3-uart";
1125			ti,hwmods = "uart5";
1126			clock-frequency = < 0x2dc6c00 >;
1127			reg = < 0x481a8000 0x2000 >;
1128			interrupts = < 0x2d >;
1129			status = "okay";
1130			pinctrl-names = "default";
1131			pinctrl-0 = < 0x30 >;
1132		};
1133
1134		serial@481aa000 {
1135			compatible = "ti,am3352-uart\0ti,omap3-uart";
1136			ti,hwmods = "uart6";
1137			clock-frequency = < 0x2dc6c00 >;
1138			reg = < 0x481aa000 0x2000 >;
1139			interrupts = < 0x2e >;
1140			status = "okay";
1141			pinctrl-names = "default";
1142			pinctrl-0 = < 0x31 >;
1143		};
1144
1145		i2c@44e0b000 {
1146			compatible = "ti,omap4-i2c";
1147			#address-cells = < 0x01 >;
1148			#size-cells = < 0x00 >;
1149			ti,hwmods = "i2c1";
1150			reg = < 0x44e0b000 0x1000 >;
1151			interrupts = < 0x46 >;
1152			status = "okay";
1153			pinctrl-names = "default";
1154			pinctrl-0 = < 0x32 >;
1155			clock-frequency = < 0x61a80 >;
1156
1157			tps@24 {
1158				reg = < 0x24 >;
1159				compatible = "ti,tps65217";
1160				interrupt-controller;
1161				#interrupt-cells = < 0x01 >;
1162				interrupts = < 0x07 >;
1163				interrupt-parent = < 0x01 >;
1164				phandle = < 0x44 >;
1165
1166				charger {
1167					compatible = "ti,tps65217-charger";
1168					interrupts = < 0x00 0x01 >;
1169					interrupt-names = "USB\0AC";
1170					status = "okay";
1171				};
1172
1173				pwrbutton {
1174					compatible = "ti,tps65217-pwrbutton";
1175					interrupts = < 0x02 >;
1176					status = "okay";
1177				};
1178
1179				regulators {
1180					#address-cells = < 0x01 >;
1181					#size-cells = < 0x00 >;
1182
1183					regulator@0 {
1184						reg = < 0x00 >;
1185						regulator-compatible = "dcdc1";
1186						regulator-name = "vdds_dpr";
1187						regulator-always-on;
1188					};
1189
1190					regulator@1 {
1191						reg = < 0x01 >;
1192						regulator-compatible = "dcdc2";
1193						regulator-name = "vdd_mpu";
1194						regulator-min-microvolt = < 0xe1d48 >;
1195						regulator-max-microvolt = < 0x149f4c >;
1196						regulator-boot-on;
1197						regulator-always-on;
1198						phandle = < 0x04 >;
1199					};
1200
1201					regulator@2 {
1202						reg = < 0x02 >;
1203						regulator-compatible = "dcdc3";
1204						regulator-name = "vdd_core";
1205						regulator-min-microvolt = < 0xe1d48 >;
1206						regulator-max-microvolt = < 0x118c30 >;
1207						regulator-boot-on;
1208						regulator-always-on;
1209					};
1210
1211					regulator@3 {
1212						reg = < 0x03 >;
1213						regulator-compatible = "ldo1";
1214						regulator-name = "vio,vrtc,vdds";
1215						regulator-always-on;
1216					};
1217
1218					regulator@4 {
1219						reg = < 0x04 >;
1220						regulator-compatible = "ldo2";
1221						regulator-name = "vdd_3v3aux";
1222						regulator-always-on;
1223					};
1224
1225					regulator@5 {
1226						reg = < 0x05 >;
1227						regulator-compatible = "ldo3";
1228						regulator-name = "vdd_1v8";
1229						regulator-min-microvolt = < 0x1b7740 >;
1230						regulator-max-microvolt = < 0x1b7740 >;
1231						regulator-always-on;
1232					};
1233
1234					regulator@6 {
1235						reg = < 0x06 >;
1236						regulator-compatible = "ldo4";
1237						regulator-name = "vdd_3v3a";
1238						regulator-always-on;
1239					};
1240				};
1241			};
1242
1243			baseboard_eeprom@50 {
1244				compatible = "atmel,24c256";
1245				reg = < 0x50 >;
1246				#address-cells = < 0x01 >;
1247				#size-cells = < 0x01 >;
1248
1249				baseboard_data@0 {
1250					reg = < 0x00 0x100 >;
1251				};
1252			};
1253		};
1254
1255		i2c@4802a000 {
1256			compatible = "ti,omap4-i2c";
1257			#address-cells = < 0x01 >;
1258			#size-cells = < 0x00 >;
1259			ti,hwmods = "i2c2";
1260			reg = < 0x4802a000 0x1000 >;
1261			interrupts = < 0x47 >;
1262			status = "disabled";
1263		};
1264
1265		i2c@4819c000 {
1266			compatible = "ti,omap4-i2c";
1267			#address-cells = < 0x01 >;
1268			#size-cells = < 0x00 >;
1269			ti,hwmods = "i2c3";
1270			reg = < 0x4819c000 0x1000 >;
1271			interrupts = < 0x1e >;
1272			status = "okay";
1273			pinctrl-names = "default";
1274			pinctrl-0 = < 0x33 >;
1275			clock-frequency = < 0x61a80 >;
1276
1277			mpu9250@68 {
1278				compatible = "invensense,mpu9250";
1279				reg = < 0x68 >;
1280				interrupt-parent = < 0x34 >;
1281				interrupts = < 0x15 0x01 >;
1282
1283				i2c-gate {
1284					#address-cells = < 0x01 >;
1285					#size-cells = < 0x00 >;
1286
1287					ax8975@c {
1288						compatible = "ak,ak8975";
1289						reg = < 0x0c >;
1290					};
1291				};
1292			};
1293
1294			pressure@76 {
1295				compatible = "bosch,bmp280";
1296				reg = < 0x76 >;
1297			};
1298		};
1299
1300		mmc@48060000 {
1301			compatible = "ti,omap4-hsmmc";
1302			ti,hwmods = "mmc1";
1303			ti,dual-volt;
1304			ti,needs-special-reset;
1305			ti,needs-special-hs-handling;
1306			dmas = < 0x35 0x18 0x00 0x00 0x35 0x19 0x00 0x00 >;
1307			dma-names = "tx\0rx";
1308			interrupts = < 0x40 >;
1309			reg = < 0x48060000 0x1000 >;
1310			status = "okay";
1311			vmmc-supply = < 0x36 >;
1312			bus-width = < 0x04 >;
1313			pinctrl-names = "default";
1314			pinctrl-0 = < 0x37 >;
1315			cd-gpios = < 0x2f 0x06 0x01 >;
1316		};
1317
1318		mmc@481d8000 {
1319			compatible = "ti,omap4-hsmmc";
1320			ti,hwmods = "mmc2";
1321			ti,needs-special-reset;
1322			dmas = < 0x26 0x02 0x00 0x26 0x03 0x00 >;
1323			dma-names = "tx\0rx";
1324			interrupts = < 0x1c >;
1325			reg = < 0x481d8000 0x1000 >;
1326			status = "okay";
1327			vmmc-supply = < 0x36 >;
1328			bus-width = < 0x08 >;
1329			pinctrl-names = "default";
1330			pinctrl-0 = < 0x38 >;
1331		};
1332
1333		mmc@47810000 {
1334			compatible = "ti,omap4-hsmmc";
1335			ti,hwmods = "mmc3";
1336			ti,needs-special-reset;
1337			interrupts = < 0x1d >;
1338			reg = < 0x47810000 0x1000 >;
1339			status = "okay";
1340			dmas = < 0x35 0x0c 0x00 0x01 0x35 0x0d 0x00 0x02 >;
1341			dma-names = "tx\0rx";
1342			vmmc-supply = < 0x39 >;
1343			bus-width = < 0x04 >;
1344			non-removable;
1345			cap-power-off-card;
1346			ti,needs-special-hs-handling;
1347			keep-power-in-suspend;
1348			pinctrl-names = "default";
1349			pinctrl-0 = < 0x3a 0x3b >;
1350			#address-cells = < 0x01 >;
1351			#size-cells = < 0x00 >;
1352
1353			wlcore@2 {
1354				compatible = "ti,wl1835";
1355				reg = < 0x02 >;
1356				interrupt-parent = < 0x2f >;
1357				interrupts = < 0x15 0x01 >;
1358			};
1359		};
1360
1361		spinlock@480ca000 {
1362			compatible = "ti,omap4-hwspinlock";
1363			reg = < 0x480ca000 0x1000 >;
1364			ti,hwmods = "spinlock";
1365			#hwlock-cells = < 0x01 >;
1366		};
1367
1368		wdt@44e35000 {
1369			compatible = "ti,omap3-wdt";
1370			ti,hwmods = "wd_timer2";
1371			reg = < 0x44e35000 0x1000 >;
1372			interrupts = < 0x5b >;
1373		};
1374
1375		can@481cc000 {
1376			compatible = "ti,am3352-d_can";
1377			ti,hwmods = "d_can0";
1378			reg = < 0x481cc000 0x2000 >;
1379			clocks = < 0x3c >;
1380			clock-names = "fck";
1381			syscon-raminit = < 0x05 0x644 0x00 >;
1382			interrupts = < 0x34 >;
1383			status = "disabled";
1384		};
1385
1386		can@481d0000 {
1387			compatible = "ti,am3352-d_can";
1388			ti,hwmods = "d_can1";
1389			reg = < 0x481d0000 0x2000 >;
1390			clocks = < 0x3d >;
1391			clock-names = "fck";
1392			syscon-raminit = < 0x05 0x644 0x01 >;
1393			interrupts = < 0x37 >;
1394			status = "okay";
1395			pinctrl-names = "default";
1396			pinctrl-0 = < 0x3e >;
1397		};
1398
1399		mailbox@480c8000 {
1400			compatible = "ti,omap4-mailbox";
1401			reg = < 0x480c8000 0x200 >;
1402			interrupts = < 0x4d >;
1403			ti,hwmods = "mailbox";
1404			#mbox-cells = < 0x01 >;
1405			ti,mbox-num-users = < 0x04 >;
1406			ti,mbox-num-fifos = < 0x08 >;
1407			phandle = < 0x24 >;
1408
1409			wkup_m3 {
1410				ti,mbox-send-noirq;
1411				ti,mbox-tx = < 0x00 0x00 0x00 >;
1412				ti,mbox-rx = < 0x00 0x00 0x03 >;
1413				phandle = < 0x25 >;
1414			};
1415		};
1416
1417		timer@44e31000 {
1418			compatible = "ti,am335x-timer-1ms";
1419			reg = < 0x44e31000 0x400 >;
1420			interrupts = < 0x43 >;
1421			ti,hwmods = "timer1";
1422			ti,timer-alwon;
1423			clocks = < 0x3f >;
1424			clock-names = "fck";
1425		};
1426
1427		timer@48040000 {
1428			compatible = "ti,am335x-timer";
1429			reg = < 0x48040000 0x400 >;
1430			interrupts = < 0x44 >;
1431			ti,hwmods = "timer2";
1432			clocks = < 0x40 >;
1433			clock-names = "fck";
1434		};
1435
1436		timer@48042000 {
1437			compatible = "ti,am335x-timer";
1438			reg = < 0x48042000 0x400 >;
1439			interrupts = < 0x45 >;
1440			ti,hwmods = "timer3";
1441		};
1442
1443		timer@48044000 {
1444			compatible = "ti,am335x-timer";
1445			reg = < 0x48044000 0x400 >;
1446			interrupts = < 0x5c >;
1447			ti,hwmods = "timer4";
1448			ti,timer-pwm;
1449		};
1450
1451		timer@48046000 {
1452			compatible = "ti,am335x-timer";
1453			reg = < 0x48046000 0x400 >;
1454			interrupts = < 0x5d >;
1455			ti,hwmods = "timer5";
1456			ti,timer-pwm;
1457		};
1458
1459		timer@48048000 {
1460			compatible = "ti,am335x-timer";
1461			reg = < 0x48048000 0x400 >;
1462			interrupts = < 0x5e >;
1463			ti,hwmods = "timer6";
1464			ti,timer-pwm;
1465		};
1466
1467		timer@4804a000 {
1468			compatible = "ti,am335x-timer";
1469			reg = < 0x4804a000 0x400 >;
1470			interrupts = < 0x5f >;
1471			ti,hwmods = "timer7";
1472			ti,timer-pwm;
1473		};
1474
1475		rtc@44e3e000 {
1476			compatible = "ti,am3352-rtc\0ti,da830-rtc";
1477			reg = < 0x44e3e000 0x1000 >;
1478			interrupts = < 0x4b 0x4c >;
1479			ti,hwmods = "rtc";
1480			clocks = < 0x17 0x14 0x138 0x00 >;
1481			clock-names = "ext-clk\0int-clk";
1482			system-power-controller;
1483		};
1484
1485		spi@48030000 {
1486			compatible = "ti,omap4-mcspi";
1487			#address-cells = < 0x01 >;
1488			#size-cells = < 0x00 >;
1489			reg = < 0x48030000 0x400 >;
1490			interrupts = < 0x41 >;
1491			ti,spi-num-cs = < 0x02 >;
1492			ti,hwmods = "spi0";
1493			dmas = < 0x26 0x10 0x00 0x26 0x11 0x00 0x26 0x12 0x00 0x26 0x13 0x00 >;
1494			dma-names = "tx0\0rx0\0tx1\0rx1";
1495			status = "disabled";
1496		};
1497
1498		spi@481a0000 {
1499			compatible = "ti,omap4-mcspi";
1500			#address-cells = < 0x01 >;
1501			#size-cells = < 0x00 >;
1502			reg = < 0x481a0000 0x400 >;
1503			interrupts = < 0x7d >;
1504			ti,spi-num-cs = < 0x02 >;
1505			ti,hwmods = "spi1";
1506			dmas = < 0x26 0x2a 0x00 0x26 0x2b 0x00 0x26 0x2c 0x00 0x26 0x2d 0x00 >;
1507			dma-names = "tx0\0rx0\0tx1\0rx1";
1508			status = "disabled";
1509		};
1510
1511		usb@47400000 {
1512			compatible = "ti,am33xx-usb";
1513			reg = < 0x47400000 0x1000 >;
1514			ranges;
1515			#address-cells = < 0x01 >;
1516			#size-cells = < 0x01 >;
1517			ti,hwmods = "usb_otg_hs";
1518			status = "okay";
1519
1520			control@44e10620 {
1521				compatible = "ti,am335x-usb-ctrl-module";
1522				reg = < 0x44e10620 0x10 0x44e10648 0x04 >;
1523				reg-names = "phy_ctrl\0wakeup";
1524				status = "okay";
1525				phandle = < 0x41 >;
1526			};
1527
1528			usb-phy@47401300 {
1529				compatible = "ti,am335x-usb-phy";
1530				reg = < 0x47401300 0x100 >;
1531				reg-names = "phy";
1532				status = "okay";
1533				ti,ctrl_mod = < 0x41 >;
1534				#phy-cells = < 0x00 >;
1535				phandle = < 0x42 >;
1536			};
1537
1538			usb@47401000 {
1539				compatible = "ti,musb-am33xx";
1540				status = "okay";
1541				reg = < 0x47401400 0x400 0x47401000 0x200 >;
1542				reg-names = "mc\0control";
1543				interrupts = < 0x12 >;
1544				interrupt-names = "mc\0vbus";
1545				dr_mode = "peripheral";
1546				mentor,multipoint = < 0x01 >;
1547				mentor,num-eps = < 0x10 >;
1548				mentor,ram-bits = < 0x0c >;
1549				mentor,power = < 0x1f4 >;
1550				phys = < 0x42 >;
1551				dmas = < 0x43 0x00 0x00 0x43 0x01 0x00 0x43 0x02 0x00 0x43 0x03 0x00 0x43 0x04 0x00 0x43 0x05 0x00 0x43 0x06 0x00 0x43 0x07 0x00 0x43 0x08 0x00 0x43 0x09 0x00 0x43 0x0a 0x00 0x43 0x0b 0x00 0x43 0x0c 0x00 0x43 0x0d 0x00 0x43 0x0e 0x00 0x43 0x00 0x01 0x43 0x01 0x01 0x43 0x02 0x01 0x43 0x03 0x01 0x43 0x04 0x01 0x43 0x05 0x01 0x43 0x06 0x01 0x43 0x07 0x01 0x43 0x08 0x01 0x43 0x09 0x01 0x43 0x0a 0x01 0x43 0x0b 0x01 0x43 0x0c 0x01 0x43 0x0d 0x01 0x43 0x0e 0x01 >;
1552				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
1553				interrupts-extended = < 0x01 0x12 0x44 0x00 >;
1554			};
1555
1556			usb-phy@47401b00 {
1557				compatible = "ti,am335x-usb-phy";
1558				reg = < 0x47401b00 0x100 >;
1559				reg-names = "phy";
1560				status = "okay";
1561				ti,ctrl_mod = < 0x41 >;
1562				#phy-cells = < 0x00 >;
1563				phandle = < 0x45 >;
1564			};
1565
1566			usb@47401800 {
1567				compatible = "ti,musb-am33xx";
1568				status = "okay";
1569				reg = < 0x47401c00 0x400 0x47401800 0x200 >;
1570				reg-names = "mc\0control";
1571				interrupts = < 0x13 >;
1572				interrupt-names = "mc";
1573				dr_mode = "host";
1574				mentor,multipoint = < 0x01 >;
1575				mentor,num-eps = < 0x10 >;
1576				mentor,ram-bits = < 0x0c >;
1577				mentor,power = < 0x1f4 >;
1578				phys = < 0x45 >;
1579				dmas = < 0x43 0x0f 0x00 0x43 0x10 0x00 0x43 0x11 0x00 0x43 0x12 0x00 0x43 0x13 0x00 0x43 0x14 0x00 0x43 0x15 0x00 0x43 0x16 0x00 0x43 0x17 0x00 0x43 0x18 0x00 0x43 0x19 0x00 0x43 0x1a 0x00 0x43 0x1b 0x00 0x43 0x1c 0x00 0x43 0x1d 0x00 0x43 0x0f 0x01 0x43 0x10 0x01 0x43 0x11 0x01 0x43 0x12 0x01 0x43 0x13 0x01 0x43 0x14 0x01 0x43 0x15 0x01 0x43 0x16 0x01 0x43 0x17 0x01 0x43 0x18 0x01 0x43 0x19 0x01 0x43 0x1a 0x01 0x43 0x1b 0x01 0x43 0x1c 0x01 0x43 0x1d 0x01 >;
1580				dma-names = "rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7\0rx8\0rx9\0rx10\0rx11\0rx12\0rx13\0rx14\0rx15\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0tx8\0tx9\0tx10\0tx11\0tx12\0tx13\0tx14\0tx15";
1581			};
1582
1583			dma-controller@47402000 {
1584				compatible = "ti,am3359-cppi41";
1585				reg = < 0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000 >;
1586				reg-names = "glue\0controller\0scheduler\0queuemgr";
1587				interrupts = < 0x11 >;
1588				interrupt-names = "glue";
1589				#dma-cells = < 0x02 >;
1590				#dma-channels = < 0x1e >;
1591				#dma-requests = < 0x100 >;
1592				status = "okay";
1593				phandle = < 0x43 >;
1594			};
1595		};
1596
1597		epwmss@48300000 {
1598			compatible = "ti,am33xx-pwmss";
1599			reg = < 0x48300000 0x10 >;
1600			ti,hwmods = "epwmss0";
1601			#address-cells = < 0x01 >;
1602			#size-cells = < 0x01 >;
1603			status = "disabled";
1604			ranges = < 0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80 >;
1605
1606			ecap@48300100 {
1607				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1608				#pwm-cells = < 0x03 >;
1609				reg = < 0x48300100 0x80 >;
1610				clocks = < 0x22 >;
1611				clock-names = "fck";
1612				interrupts = < 0x1f >;
1613				interrupt-names = "ecap0";
1614				status = "disabled";
1615			};
1616
1617			pwm@48300200 {
1618				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1619				#pwm-cells = < 0x03 >;
1620				reg = < 0x48300200 0x80 >;
1621				clocks = < 0x46 0x22 >;
1622				clock-names = "tbclk\0fck";
1623				status = "disabled";
1624			};
1625		};
1626
1627		epwmss@48302000 {
1628			compatible = "ti,am33xx-pwmss";
1629			reg = < 0x48302000 0x10 >;
1630			ti,hwmods = "epwmss1";
1631			#address-cells = < 0x01 >;
1632			#size-cells = < 0x01 >;
1633			status = "disabled";
1634			ranges = < 0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80 >;
1635
1636			ecap@48302100 {
1637				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1638				#pwm-cells = < 0x03 >;
1639				reg = < 0x48302100 0x80 >;
1640				clocks = < 0x22 >;
1641				clock-names = "fck";
1642				interrupts = < 0x2f >;
1643				interrupt-names = "ecap1";
1644				status = "disabled";
1645			};
1646
1647			pwm@48302200 {
1648				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1649				#pwm-cells = < 0x03 >;
1650				reg = < 0x48302200 0x80 >;
1651				clocks = < 0x47 0x22 >;
1652				clock-names = "tbclk\0fck";
1653				status = "disabled";
1654			};
1655		};
1656
1657		epwmss@48304000 {
1658			compatible = "ti,am33xx-pwmss";
1659			reg = < 0x48304000 0x10 >;
1660			ti,hwmods = "epwmss2";
1661			#address-cells = < 0x01 >;
1662			#size-cells = < 0x01 >;
1663			status = "disabled";
1664			ranges = < 0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80 >;
1665
1666			ecap@48304100 {
1667				compatible = "ti,am3352-ecap\0ti,am33xx-ecap";
1668				#pwm-cells = < 0x03 >;
1669				reg = < 0x48304100 0x80 >;
1670				clocks = < 0x22 >;
1671				clock-names = "fck";
1672				interrupts = < 0x3d >;
1673				interrupt-names = "ecap2";
1674				status = "disabled";
1675			};
1676
1677			pwm@48304200 {
1678				compatible = "ti,am3352-ehrpwm\0ti,am33xx-ehrpwm";
1679				#pwm-cells = < 0x03 >;
1680				reg = < 0x48304200 0x80 >;
1681				clocks = < 0x48 0x22 >;
1682				clock-names = "tbclk\0fck";
1683				status = "disabled";
1684			};
1685		};
1686
1687		ethernet@4a100000 {
1688			compatible = "ti,am335x-cpsw\0ti,cpsw";
1689			ti,hwmods = "cpgmac0";
1690			clocks = < 0x49 0x4a >;
1691			clock-names = "fck\0cpts";
1692			cpdma_channels = < 0x08 >;
1693			ale_entries = < 0x400 >;
1694			bd_ram_size = < 0x2000 >;
1695			mac_control = < 0x20 >;
1696			slaves = < 0x02 >;
1697			active_slave = < 0x00 >;
1698			cpts_clock_mult = < 0x80000000 >;
1699			cpts_clock_shift = < 0x1d >;
1700			reg = < 0x4a100000 0x800 0x4a101200 0x100 >;
1701			#address-cells = < 0x01 >;
1702			#size-cells = < 0x01 >;
1703			interrupts = < 0x28 0x29 0x2a 0x2b >;
1704			ranges;
1705			syscon = < 0x05 >;
1706			status = "disabled";
1707
1708			mdio@4a101000 {
1709				compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
1710				#address-cells = < 0x01 >;
1711				#size-cells = < 0x00 >;
1712				ti,hwmods = "davinci_mdio";
1713				bus_freq = < 0xf4240 >;
1714				reg = < 0x4a101000 0x100 >;
1715				status = "disabled";
1716			};
1717
1718			slave@4a100200 {
1719				mac-address = [ 00 00 00 00 00 00 ];
1720			};
1721
1722			slave@4a100300 {
1723				mac-address = [ 00 00 00 00 00 00 ];
1724			};
1725
1726			cpsw-phy-sel@44e10650 {
1727				compatible = "ti,am3352-cpsw-phy-sel";
1728				reg = < 0x44e10650 0x04 >;
1729				reg-names = "gmii-sel";
1730			};
1731		};
1732
1733		ocmcram@40300000 {
1734			compatible = "mmio-sram";
1735			reg = < 0x40300000 0x10000 >;
1736			ranges = < 0x00 0x40300000 0x10000 >;
1737			#address-cells = < 0x01 >;
1738			#size-cells = < 0x01 >;
1739
1740			pm-sram-code@0 {
1741				compatible = "ti,sram";
1742				reg = < 0x00 0x1000 >;
1743				protect-exec;
1744				phandle = < 0x06 >;
1745			};
1746
1747			pm-sram-data@1000 {
1748				compatible = "ti,sram";
1749				reg = < 0x1000 0x1000 >;
1750				pool;
1751				phandle = < 0x07 >;
1752			};
1753		};
1754
1755		elm@48080000 {
1756			compatible = "ti,am3352-elm";
1757			reg = < 0x48080000 0x2000 >;
1758			interrupts = < 0x04 >;
1759			ti,hwmods = "elm";
1760			status = "disabled";
1761		};
1762
1763		lcdc@4830e000 {
1764			compatible = "ti,am33xx-tilcdc";
1765			reg = < 0x4830e000 0x1000 >;
1766			interrupts = < 0x24 >;
1767			ti,hwmods = "lcdc";
1768			status = "disabled";
1769		};
1770
1771		tscadc@44e0d000 {
1772			compatible = "ti,am3359-tscadc";
1773			reg = < 0x44e0d000 0x1000 >;
1774			interrupts = < 0x10 >;
1775			ti,hwmods = "adc_tsc";
1776			status = "okay";
1777			dmas = < 0x26 0x35 0x00 0x26 0x39 0x00 >;
1778			dma-names = "fifo0\0fifo1";
1779
1780			tsc {
1781				compatible = "ti,am3359-tsc";
1782			};
1783
1784			adc {
1785				#io-channel-cells = < 0x01 >;
1786				compatible = "ti,am3359-adc";
1787				ti,adc-channels = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 >;
1788			};
1789		};
1790
1791		emif@4c000000 {
1792			compatible = "ti,emif-am3352";
1793			reg = < 0x4c000000 0x1000000 >;
1794			ti,hwmods = "emif";
1795			interrupts = < 0x65 >;
1796			sram = < 0x06 0x07 >;
1797			ti,no-idle;
1798		};
1799
1800		gpmc@50000000 {
1801			compatible = "ti,am3352-gpmc";
1802			ti,hwmods = "gpmc";
1803			ti,no-idle-on-init;
1804			reg = < 0x50000000 0x2000 >;
1805			interrupts = < 0x64 >;
1806			dmas = < 0x26 0x34 0x00 >;
1807			dma-names = "rxtx";
1808			gpmc,num-cs = < 0x07 >;
1809			gpmc,num-waitpins = < 0x02 >;
1810			#address-cells = < 0x02 >;
1811			#size-cells = < 0x01 >;
1812			interrupt-controller;
1813			#interrupt-cells = < 0x02 >;
1814			gpio-controller;
1815			#gpio-cells = < 0x02 >;
1816			status = "disabled";
1817		};
1818
1819		sham@53100000 {
1820			compatible = "ti,omap4-sham";
1821			ti,hwmods = "sham";
1822			reg = < 0x53100000 0x200 >;
1823			interrupts = < 0x6d >;
1824			dmas = < 0x26 0x24 0x00 >;
1825			dma-names = "rx";
1826			status = "okay";
1827		};
1828
1829		aes@53500000 {
1830			compatible = "ti,omap4-aes";
1831			ti,hwmods = "aes";
1832			reg = < 0x53500000 0xa0 >;
1833			interrupts = < 0x67 >;
1834			dmas = < 0x26 0x06 0x00 0x26 0x05 0x00 >;
1835			dma-names = "tx\0rx";
1836			status = "okay";
1837		};
1838
1839		mcasp@48038000 {
1840			compatible = "ti,am33xx-mcasp-audio";
1841			ti,hwmods = "mcasp0";
1842			reg = < 0x48038000 0x2000 0x46000000 0x400000 >;
1843			reg-names = "mpu\0dat";
1844			interrupts = < 0x50 0x51 >;
1845			interrupt-names = "tx\0rx";
1846			status = "disabled";
1847			dmas = < 0x26 0x08 0x02 0x26 0x09 0x02 >;
1848			dma-names = "tx\0rx";
1849		};
1850
1851		mcasp@4803c000 {
1852			compatible = "ti,am33xx-mcasp-audio";
1853			ti,hwmods = "mcasp1";
1854			reg = < 0x4803c000 0x2000 0x46400000 0x400000 >;
1855			reg-names = "mpu\0dat";
1856			interrupts = < 0x52 0x53 >;
1857			interrupt-names = "tx\0rx";
1858			status = "disabled";
1859			dmas = < 0x26 0x0a 0x02 0x26 0x0b 0x02 >;
1860			dma-names = "tx\0rx";
1861		};
1862
1863		rng@48310000 {
1864			compatible = "ti,omap4-rng";
1865			ti,hwmods = "rng";
1866			reg = < 0x48310000 0x2000 >;
1867			interrupts = < 0x6f >;
1868		};
1869	};
1870
1871	memory@80000000 {
1872		device_type = "memory";
1873		reg = < 0x80000000 0x20000000 >;
1874	};
1875
1876	leds {
1877		pinctrl-names = "default";
1878		pinctrl-0 = < 0x4b >;
1879		compatible = "gpio-leds";
1880
1881		usr_0_led {
1882			label = "beaglebone:green:usr0";
1883			gpios = < 0x4c 0x15 0x00 >;
1884			linux,default-trigger = "heartbeat";
1885			default-state = "off";
1886		};
1887
1888		usr_1_led {
1889			label = "beaglebone:green:usr1";
1890			gpios = < 0x4c 0x16 0x00 >;
1891			linux,default-trigger = "mmc0";
1892			default-state = "off";
1893		};
1894
1895		usr_2_led {
1896			label = "beaglebone:green:usr2";
1897			gpios = < 0x4c 0x17 0x00 >;
1898			linux,default-trigger = "cpu0";
1899			default-state = "off";
1900		};
1901
1902		usr_3_led {
1903			label = "beaglebone:green:usr3";
1904			gpios = < 0x4c 0x18 0x00 >;
1905			linux,default-trigger = "mmc1";
1906			default-state = "off";
1907		};
1908
1909		wifi_led {
1910			label = "wifi";
1911			gpios = < 0x2f 0x13 0x00 >;
1912			default-state = "off";
1913			linux,default-trigger = "phy0assoc";
1914		};
1915
1916		red_led {
1917			label = "red";
1918			gpios = < 0x4d 0x02 0x00 >;
1919			default-state = "off";
1920		};
1921
1922		green_led {
1923			label = "green";
1924			gpios = < 0x4d 0x03 0x00 >;
1925			default-state = "off";
1926		};
1927
1928		batt_1_led {
1929			label = "bat25";
1930			gpios = < 0x2f 0x1b 0x00 >;
1931			default-state = "off";
1932		};
1933
1934		batt_2_led {
1935			label = "bat50";
1936			gpios = < 0x2f 0x0b 0x00 >;
1937			default-state = "off";
1938		};
1939
1940		batt_3_led {
1941			label = "bat75";
1942			gpios = < 0x4c 0x1d 0x00 >;
1943			default-state = "off";
1944		};
1945
1946		batt_4_led {
1947			label = "bat100";
1948			gpios = < 0x2f 0x1a 0x00 >;
1949			default-state = "off";
1950		};
1951	};
1952
1953	fixedregulator0 {
1954		compatible = "regulator-fixed";
1955		regulator-name = "vmmcsd_fixed";
1956		regulator-min-microvolt = < 0x325aa0 >;
1957		regulator-max-microvolt = < 0x325aa0 >;
1958		phandle = < 0x36 >;
1959	};
1960
1961	fixedregulator@2 {
1962		compatible = "regulator-fixed";
1963		regulator-name = "wlan-en-regulator";
1964		regulator-min-microvolt = < 0x1b7740 >;
1965		regulator-max-microvolt = < 0x1b7740 >;
1966		startup-delay-us = < 0x11170 >;
1967		gpio = < 0x34 0x09 0x00 >;
1968		enable-active-high;
1969		phandle = < 0x39 >;
1970	};
1971};
1972