1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 interrupt-parent = < 0x01 >; 15 #address-cells = < 0x01 >; 16 #size-cells = < 0x01 >; 17 compatible = "hardkernel,odroid-x\0samsung,exynos4412\0samsung,exynos4"; 18 model = "Hardkernel ODROID-X board based on Exynos4412"; 19 20 aliases { 21 spi0 = "/soc/spi@13920000"; 22 spi1 = "/soc/spi@13930000"; 23 spi2 = "/soc/spi@13940000"; 24 i2c0 = "/soc/i2c@13860000"; 25 i2c1 = "/soc/i2c@13870000"; 26 i2c2 = "/soc/i2c@13880000"; 27 i2c3 = "/soc/i2c@13890000"; 28 i2c4 = "/soc/i2c@138a0000"; 29 i2c5 = "/soc/i2c@138b0000"; 30 i2c6 = "/soc/i2c@138c0000"; 31 i2c7 = "/soc/i2c@138d0000"; 32 i2c8 = "/soc/i2c@138e0000"; 33 csis0 = "/soc/camera/csis@11880000"; 34 csis1 = "/soc/camera/csis@11890000"; 35 fimc0 = "/soc/camera/fimc@11800000"; 36 fimc1 = "/soc/camera/fimc@11810000"; 37 fimc2 = "/soc/camera/fimc@11820000"; 38 fimc3 = "/soc/camera/fimc@11830000"; 39 serial0 = "/soc/serial@13800000"; 40 serial1 = "/soc/serial@13810000"; 41 serial2 = "/soc/serial@13820000"; 42 serial3 = "/soc/serial@13830000"; 43 pinctrl0 = "/soc/pinctrl@11400000"; 44 pinctrl1 = "/soc/pinctrl@11000000"; 45 pinctrl2 = "/soc/pinctrl@3860000"; 46 pinctrl3 = "/soc/pinctrl@106e0000"; 47 fimc-lite0 = "/soc/camera/fimc-lite@12390000"; 48 fimc-lite1 = "/soc/camera/fimc-lite@123a0000"; 49 mshc0 = "/soc/mmc@12550000"; 50 }; 51 52 soc { 53 compatible = "simple-bus"; 54 #address-cells = < 0x01 >; 55 #size-cells = < 0x01 >; 56 ranges; 57 58 clock-controller@3810000 { 59 compatible = "samsung,exynos4210-audss-clock"; 60 reg = < 0x3810000 0x0c >; 61 #clock-cells = < 0x01 >; 62 clocks = < 0x02 0x03 0x02 0x06 0x02 0x90 0x02 0x90 >; 63 clock-names = "pll_ref\0pll_in\0sclk_audio\0sclk_pcm_in"; 64 assigned-clocks = < 0x03 0x00 0x03 0x01 0x03 0x02 0x03 0x03 0x03 0x04 >; 65 assigned-clock-parents = < 0x02 0x06 0x03 0x00 >; 66 assigned-clock-rates = < 0x00 0x00 0xbb80001 0x5dc0000 0x1770000 >; 67 phandle = < 0x03 >; 68 }; 69 70 i2s@3830000 { 71 compatible = "samsung,s5pv210-i2s"; 72 reg = < 0x3830000 0x100 >; 73 clocks = < 0x03 0x06 0x03 0x03 0x03 0x07 >; 74 clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; 75 #clock-cells = < 0x01 >; 76 clock-output-names = "i2s_cdclk0"; 77 dmas = < 0x04 0x0c 0x04 0x0b 0x04 0x0a >; 78 dma-names = "tx\0rx\0tx-sec"; 79 samsung,idma-addr = < 0x3000000 >; 80 #sound-dai-cells = < 0x01 >; 81 status = "okay"; 82 pinctrl-0 = < 0x05 >; 83 pinctrl-names = "default"; 84 assigned-clocks = < 0x06 0x01 >; 85 assigned-clock-parents = < 0x03 0x07 >; 86 phandle = < 0x06 >; 87 }; 88 89 chipid@10000000 { 90 compatible = "samsung,exynos4210-chipid"; 91 reg = < 0x10000000 0x100 >; 92 }; 93 94 snoop-control-unit@10500000 { 95 compatible = "arm,cortex-a9-scu"; 96 reg = < 0x10500000 0x2000 >; 97 }; 98 99 memory-controller@12570000 { 100 compatible = "samsung,exynos4210-srom"; 101 reg = < 0x12570000 0x14 >; 102 }; 103 104 video-phy { 105 compatible = "samsung,s5pv210-mipi-video-phy"; 106 #phy-cells = < 0x01 >; 107 syscon = < 0x07 >; 108 phandle = < 0x0a >; 109 }; 110 111 mfc-power-domain@10023c40 { 112 compatible = "samsung,exynos4210-pd"; 113 reg = < 0x10023c40 0x20 >; 114 #power-domain-cells = < 0x00 >; 115 label = "MFC"; 116 phandle = < 0x25 >; 117 }; 118 119 g3d-power-domain@10023c60 { 120 compatible = "samsung,exynos4210-pd"; 121 reg = < 0x10023c60 0x20 >; 122 #power-domain-cells = < 0x00 >; 123 label = "G3D"; 124 }; 125 126 lcd0-power-domain@10023c80 { 127 compatible = "samsung,exynos4210-pd"; 128 reg = < 0x10023c80 0x20 >; 129 #power-domain-cells = < 0x00 >; 130 label = "LCD0"; 131 phandle = < 0x08 >; 132 }; 133 134 tv-power-domain@10023c20 { 135 compatible = "samsung,exynos4210-pd"; 136 reg = < 0x10023c20 0x20 >; 137 #power-domain-cells = < 0x00 >; 138 power-domains = < 0x08 >; 139 label = "TV"; 140 phandle = < 0x3d >; 141 }; 142 143 cam-power-domain@10023c00 { 144 compatible = "samsung,exynos4210-pd"; 145 reg = < 0x10023c00 0x20 >; 146 #power-domain-cells = < 0x00 >; 147 label = "CAM"; 148 phandle = < 0x0b >; 149 }; 150 151 gps-power-domain@10023ce0 { 152 compatible = "samsung,exynos4210-pd"; 153 reg = < 0x10023ce0 0x20 >; 154 #power-domain-cells = < 0x00 >; 155 label = "GPS"; 156 }; 157 158 gps-alive-power-domain@10023d00 { 159 compatible = "samsung,exynos4210-pd"; 160 reg = < 0x10023d00 0x20 >; 161 #power-domain-cells = < 0x00 >; 162 label = "GPS alive"; 163 }; 164 165 interrupt-controller@10490000 { 166 compatible = "arm,cortex-a9-gic"; 167 #interrupt-cells = < 0x03 >; 168 interrupt-controller; 169 reg = < 0x10490000 0x10000 0x10480000 0x10000 >; 170 cpu-offset = < 0x4000 >; 171 phandle = < 0x01 >; 172 }; 173 174 interrupt-controller@10440000 { 175 compatible = "samsung,exynos4210-combiner"; 176 #interrupt-cells = < 0x02 >; 177 interrupt-controller; 178 reg = < 0x10440000 0x1000 >; 179 samsung,combiner-nr = < 0x14 >; 180 interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x06 0x04 0x00 0x07 0x04 0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x6b 0x04 0x00 0x6c 0x04 0x00 0x30 0x04 0x00 0x2a 0x04 >; 181 phandle = < 0x09 >; 182 }; 183 184 pmu { 185 compatible = "arm,cortex-a9-pmu"; 186 interrupt-parent = < 0x09 >; 187 interrupts = < 0x02 0x02 0x03 0x02 0x12 0x02 0x13 0x02 >; 188 }; 189 190 syscon@10010000 { 191 compatible = "samsung,exynos4-sysreg\0syscon"; 192 reg = < 0x10010000 0x400 >; 193 phandle = < 0x0c >; 194 }; 195 196 system-controller@10020000 { 197 compatible = "samsung,exynos4412-pmu\0syscon"; 198 reg = < 0x10020000 0x4000 >; 199 interrupt-controller; 200 #interrupt-cells = < 0x03 >; 201 interrupt-parent = < 0x01 >; 202 clock-names = "clkout0\0clkout1\0clkout2\0clkout3\0clkout4\0clkout8\0clkout9"; 203 clocks = < 0x02 0x17 0x02 0x18 0x02 0x19 0x02 0x1a 0x02 0x1b 0x02 0x01 0x02 0x02 >; 204 #clock-cells = < 0x01 >; 205 phandle = < 0x07 >; 206 207 syscon-poweroff { 208 compatible = "syscon-poweroff"; 209 regmap = < 0x07 >; 210 offset = < 0x330c >; 211 mask = < 0x5200 >; 212 }; 213 214 syscon-reboot { 215 compatible = "syscon-reboot"; 216 regmap = < 0x07 >; 217 offset = < 0x400 >; 218 mask = < 0x01 >; 219 }; 220 }; 221 222 dsi@11c80000 { 223 compatible = "samsung,exynos4210-mipi-dsi"; 224 reg = < 0x11c80000 0x10000 >; 225 interrupts = < 0x00 0x4f 0x04 >; 226 power-domains = < 0x08 >; 227 phys = < 0x0a 0x01 >; 228 phy-names = "dsim"; 229 clocks = < 0x02 0x11e 0x02 0x8f >; 230 clock-names = "bus_clk\0sclk_mipi"; 231 status = "disabled"; 232 #address-cells = < 0x01 >; 233 #size-cells = < 0x00 >; 234 }; 235 236 camera { 237 compatible = "samsung,fimc\0simple-bus"; 238 status = "okay"; 239 #address-cells = < 0x01 >; 240 #size-cells = < 0x01 >; 241 #clock-cells = < 0x01 >; 242 clock-output-names = "cam_a_clkout\0cam_b_clkout"; 243 ranges; 244 clocks = < 0x02 0x84 0x02 0x85 0x02 0x15f 0x02 0x160 >; 245 clock-names = "sclk_cam0\0sclk_cam1\0pxl_async0\0pxl_async1"; 246 pinctrl-names = "default"; 247 pinctrl-0; 248 249 fimc@11800000 { 250 compatible = "samsung,exynos4212-fimc"; 251 reg = < 0x11800000 0x1000 >; 252 interrupts = < 0x00 0x54 0x04 >; 253 clocks = < 0x02 0x100 0x02 0x80 >; 254 clock-names = "fimc\0sclk_fimc"; 255 power-domains = < 0x0b >; 256 samsung,sysreg = < 0x0c >; 257 iommus = < 0x0d >; 258 status = "okay"; 259 samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >; 260 samsung,mainscaler-ext; 261 samsung,isp-wb; 262 samsung,cam-if; 263 assigned-clocks = < 0x02 0x180 0x02 0x80 >; 264 assigned-clock-parents = < 0x02 0x11 >; 265 assigned-clock-rates = < 0x00 0xa7d8c00 >; 266 }; 267 268 fimc@11810000 { 269 compatible = "samsung,exynos4212-fimc"; 270 reg = < 0x11810000 0x1000 >; 271 interrupts = < 0x00 0x55 0x04 >; 272 clocks = < 0x02 0x101 0x02 0x81 >; 273 clock-names = "fimc\0sclk_fimc"; 274 power-domains = < 0x0b >; 275 samsung,sysreg = < 0x0c >; 276 iommus = < 0x0e >; 277 status = "okay"; 278 samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >; 279 samsung,mainscaler-ext; 280 samsung,isp-wb; 281 samsung,cam-if; 282 assigned-clocks = < 0x02 0x181 0x02 0x81 >; 283 assigned-clock-parents = < 0x02 0x11 >; 284 assigned-clock-rates = < 0x00 0xa7d8c00 >; 285 }; 286 287 fimc@11820000 { 288 compatible = "samsung,exynos4212-fimc"; 289 reg = < 0x11820000 0x1000 >; 290 interrupts = < 0x00 0x56 0x04 >; 291 clocks = < 0x02 0x102 0x02 0x82 >; 292 clock-names = "fimc\0sclk_fimc"; 293 power-domains = < 0x0b >; 294 samsung,sysreg = < 0x0c >; 295 iommus = < 0x0f >; 296 status = "okay"; 297 samsung,pix-limits = < 0x1080 0x2000 0x780 0x1080 >; 298 samsung,mainscaler-ext; 299 samsung,isp-wb; 300 samsung,lcd-wb; 301 samsung,cam-if; 302 assigned-clocks = < 0x02 0x182 0x02 0x82 >; 303 assigned-clock-parents = < 0x02 0x11 >; 304 assigned-clock-rates = < 0x00 0xa7d8c00 >; 305 }; 306 307 fimc@11830000 { 308 compatible = "samsung,exynos4212-fimc"; 309 reg = < 0x11830000 0x1000 >; 310 interrupts = < 0x00 0x57 0x04 >; 311 clocks = < 0x02 0x103 0x02 0x83 >; 312 clock-names = "fimc\0sclk_fimc"; 313 power-domains = < 0x0b >; 314 samsung,sysreg = < 0x0c >; 315 iommus = < 0x10 >; 316 status = "okay"; 317 samsung,pix-limits = < 0x780 0x2000 0x556 0x780 >; 318 samsung,rotators = < 0x00 >; 319 samsung,mainscaler-ext; 320 samsung,isp-wb; 321 samsung,lcd-wb; 322 assigned-clocks = < 0x02 0x183 0x02 0x83 >; 323 assigned-clock-parents = < 0x02 0x11 >; 324 assigned-clock-rates = < 0x00 0xa7d8c00 >; 325 }; 326 327 csis@11880000 { 328 compatible = "samsung,exynos4210-csis"; 329 reg = < 0x11880000 0x4000 >; 330 interrupts = < 0x00 0x4e 0x04 >; 331 clocks = < 0x02 0x104 0x02 0x86 >; 332 clock-names = "csis\0sclk_csis"; 333 bus-width = < 0x04 >; 334 power-domains = < 0x0b >; 335 phys = < 0x0a 0x00 >; 336 phy-names = "csis"; 337 status = "disabled"; 338 #address-cells = < 0x01 >; 339 #size-cells = < 0x00 >; 340 }; 341 342 csis@11890000 { 343 compatible = "samsung,exynos4210-csis"; 344 reg = < 0x11890000 0x4000 >; 345 interrupts = < 0x00 0x50 0x04 >; 346 clocks = < 0x02 0x105 0x02 0x87 >; 347 clock-names = "csis\0sclk_csis"; 348 bus-width = < 0x02 >; 349 power-domains = < 0x0b >; 350 phys = < 0x0a 0x02 >; 351 phy-names = "csis"; 352 status = "disabled"; 353 #address-cells = < 0x01 >; 354 #size-cells = < 0x00 >; 355 }; 356 357 fimc-lite@12390000 { 358 compatible = "samsung,exynos4212-fimc-lite"; 359 reg = < 0x12390000 0x1000 >; 360 interrupts = < 0x00 0x69 0x04 >; 361 power-domains = < 0x11 >; 362 clocks = < 0x12 0x04 >; 363 clock-names = "flite"; 364 iommus = < 0x13 >; 365 status = "disabled"; 366 }; 367 368 fimc-lite@123a0000 { 369 compatible = "samsung,exynos4212-fimc-lite"; 370 reg = < 0x123a0000 0x1000 >; 371 interrupts = < 0x00 0x6a 0x04 >; 372 power-domains = < 0x11 >; 373 clocks = < 0x12 0x05 >; 374 clock-names = "flite"; 375 iommus = < 0x14 >; 376 status = "disabled"; 377 }; 378 379 fimc-is@12000000 { 380 compatible = "samsung,exynos4212-fimc-is"; 381 reg = < 0x12000000 0x260000 >; 382 interrupts = < 0x00 0x5a 0x04 0x00 0x5f 0x04 >; 383 power-domains = < 0x11 >; 384 clocks = < 0x12 0x04 0x12 0x05 0x12 0x0e 0x12 0x0d 0x12 0x01 0x12 0x02 0x12 0x03 0x12 0x06 0x12 0x07 0x12 0x0f 0x12 0x14 0x12 0x1b 0x12 0x1c 0x12 0x1d 0x12 0x1e 0x02 0x11 0x02 0x0d 0x02 0x18b 0x02 0x1c6 0x02 0x1c7 0x02 0x17e >; 385 clock-names = "lite0\0lite1\0ppmuispx\0ppmuispmx\0isp\0drc\0fd\0mcuisp\0gicisp\0mcuctl_isp\0pwm_isp\0ispdiv0\0ispdiv1\0mcuispdiv0\0mcuispdiv1\0mpll\0aclk200\0aclk400mcuisp\0div_aclk200\0div_aclk400mcuisp\0uart"; 386 iommus = < 0x15 0x16 0x17 0x18 >; 387 iommu-names = "isp\0drc\0fd\0mcuctl"; 388 #address-cells = < 0x01 >; 389 #size-cells = < 0x01 >; 390 ranges; 391 status = "disabled"; 392 393 pmu@10020000 { 394 reg = < 0x10020000 0x3000 >; 395 }; 396 397 i2c-isp@12140000 { 398 compatible = "samsung,exynos4212-i2c-isp"; 399 reg = < 0x12140000 0x100 >; 400 clocks = < 0x12 0x12 >; 401 clock-names = "i2c_isp"; 402 #address-cells = < 0x01 >; 403 #size-cells = < 0x00 >; 404 }; 405 }; 406 }; 407 408 rtc@10070000 { 409 compatible = "samsung,s3c6410-rtc"; 410 reg = < 0x10070000 0x100 >; 411 interrupt-parent = < 0x07 >; 412 interrupts = < 0x00 0x2c 0x04 0x00 0x2d 0x04 >; 413 clocks = < 0x02 0x15a 0x19 0x00 >; 414 clock-names = "rtc\0rtc_src"; 415 status = "okay"; 416 }; 417 418 keypad@100a0000 { 419 compatible = "samsung,s5pv210-keypad"; 420 reg = < 0x100a0000 0x100 >; 421 interrupts = < 0x00 0x6d 0x04 >; 422 clocks = < 0x02 0x15b >; 423 clock-names = "keypad"; 424 status = "disabled"; 425 }; 426 427 sdhci@12510000 { 428 compatible = "samsung,exynos4210-sdhci"; 429 reg = < 0x12510000 0x100 >; 430 interrupts = < 0x00 0x49 0x04 >; 431 clocks = < 0x02 0x129 0x02 0x91 >; 432 clock-names = "hsmmc\0mmc_busclk.2"; 433 status = "disabled"; 434 }; 435 436 sdhci@12520000 { 437 compatible = "samsung,exynos4210-sdhci"; 438 reg = < 0x12520000 0x100 >; 439 interrupts = < 0x00 0x4a 0x04 >; 440 clocks = < 0x02 0x12a 0x02 0x92 >; 441 clock-names = "hsmmc\0mmc_busclk.2"; 442 status = "disabled"; 443 }; 444 445 sdhci@12530000 { 446 compatible = "samsung,exynos4210-sdhci"; 447 reg = < 0x12530000 0x100 >; 448 interrupts = < 0x00 0x4b 0x04 >; 449 clocks = < 0x02 0x12b 0x02 0x93 >; 450 clock-names = "hsmmc\0mmc_busclk.2"; 451 status = "okay"; 452 bus-width = < 0x04 >; 453 pinctrl-0 = < 0x1a 0x1b 0x1c 0x1d >; 454 pinctrl-names = "default"; 455 vmmc-supply = < 0x1e >; 456 vqmmc-supply = < 0x1f >; 457 cd-gpios = < 0x20 0x02 0x01 >; 458 }; 459 460 sdhci@12540000 { 461 compatible = "samsung,exynos4210-sdhci"; 462 reg = < 0x12540000 0x100 >; 463 interrupts = < 0x00 0x4c 0x04 >; 464 clocks = < 0x02 0x12c 0x02 0x94 >; 465 clock-names = "hsmmc\0mmc_busclk.2"; 466 status = "disabled"; 467 }; 468 469 exynos-usbphy@125b0000 { 470 compatible = "samsung,exynos4x12-usb2-phy"; 471 reg = < 0x125b0000 0x100 >; 472 samsung,pmureg-phandle = < 0x07 >; 473 clocks = < 0x02 0x131 0x02 0x02 >; 474 clock-names = "phy\0ref"; 475 #phy-cells = < 0x01 >; 476 status = "okay"; 477 samsung,sysreg-phandle = < 0x0c >; 478 phandle = < 0x21 >; 479 }; 480 481 hsotg@12480000 { 482 compatible = "samsung,s3c6400-hsotg"; 483 reg = < 0x12480000 0x20000 >; 484 interrupts = < 0x00 0x47 0x04 >; 485 clocks = < 0x02 0x131 >; 486 clock-names = "otg"; 487 phys = < 0x21 0x00 >; 488 phy-names = "usb2-phy"; 489 status = "okay"; 490 dr_mode = "peripheral"; 491 vusb_d-supply = < 0x22 >; 492 vusb_a-supply = < 0x23 >; 493 }; 494 495 ehci@12580000 { 496 compatible = "samsung,exynos4210-ehci"; 497 reg = < 0x12580000 0x100 >; 498 interrupts = < 0x00 0x46 0x04 >; 499 clocks = < 0x02 0x130 >; 500 clock-names = "usbhost"; 501 status = "okay"; 502 #address-cells = < 0x01 >; 503 #size-cells = < 0x00 >; 504 505 port@0 { 506 reg = < 0x00 >; 507 phys = < 0x21 0x01 >; 508 status = "disabled"; 509 }; 510 511 port@1 { 512 reg = < 0x01 >; 513 phys = < 0x21 0x02 >; 514 status = "okay"; 515 }; 516 517 port@2 { 518 reg = < 0x02 >; 519 phys = < 0x21 0x03 >; 520 status = "disabled"; 521 }; 522 }; 523 524 ohci@12590000 { 525 compatible = "samsung,exynos4210-ohci"; 526 reg = < 0x12590000 0x100 >; 527 interrupts = < 0x00 0x46 0x04 >; 528 clocks = < 0x02 0x130 >; 529 clock-names = "usbhost"; 530 status = "disabled"; 531 #address-cells = < 0x01 >; 532 #size-cells = < 0x00 >; 533 534 port@0 { 535 reg = < 0x00 >; 536 phys = < 0x21 0x01 >; 537 status = "disabled"; 538 }; 539 }; 540 541 i2s@13960000 { 542 compatible = "samsung,s3c6410-i2s"; 543 reg = < 0x13960000 0x100 >; 544 clocks = < 0x02 0x14a >; 545 clock-names = "iis"; 546 #clock-cells = < 0x01 >; 547 clock-output-names = "i2s_cdclk1"; 548 dmas = < 0x24 0x0c 0x24 0x0b >; 549 dma-names = "tx\0rx"; 550 #sound-dai-cells = < 0x01 >; 551 status = "disabled"; 552 }; 553 554 i2s@13970000 { 555 compatible = "samsung,s3c6410-i2s"; 556 reg = < 0x13970000 0x100 >; 557 clocks = < 0x02 0x14b >; 558 clock-names = "iis"; 559 #clock-cells = < 0x01 >; 560 clock-output-names = "i2s_cdclk2"; 561 dmas = < 0x04 0x0e 0x04 0x0d >; 562 dma-names = "tx\0rx"; 563 #sound-dai-cells = < 0x01 >; 564 status = "disabled"; 565 }; 566 567 codec@13400000 { 568 compatible = "samsung,mfc-v5"; 569 reg = < 0x13400000 0x10000 >; 570 interrupts = < 0x00 0x5e 0x04 >; 571 power-domains = < 0x25 >; 572 clocks = < 0x02 0x111 0x02 0xaa >; 573 clock-names = "mfc\0sclk_mfc"; 574 iommus = < 0x26 0x27 >; 575 iommu-names = "left\0right"; 576 memory-region = < 0x28 0x29 >; 577 }; 578 579 serial@13800000 { 580 compatible = "samsung,exynos4210-uart"; 581 reg = < 0x13800000 0x100 >; 582 interrupts = < 0x00 0x34 0x04 >; 583 clocks = < 0x02 0x138 0x02 0x97 >; 584 clock-names = "uart\0clk_uart_baud0"; 585 dmas = < 0x04 0x0f 0x04 0x10 >; 586 dma-names = "rx\0tx"; 587 status = "okay"; 588 }; 589 590 serial@13810000 { 591 compatible = "samsung,exynos4210-uart"; 592 reg = < 0x13810000 0x100 >; 593 interrupts = < 0x00 0x35 0x04 >; 594 clocks = < 0x02 0x139 0x02 0x98 >; 595 clock-names = "uart\0clk_uart_baud0"; 596 dmas = < 0x24 0x0f 0x24 0x10 >; 597 dma-names = "rx\0tx"; 598 status = "okay"; 599 }; 600 601 serial@13820000 { 602 compatible = "samsung,exynos4210-uart"; 603 reg = < 0x13820000 0x100 >; 604 interrupts = < 0x00 0x36 0x04 >; 605 clocks = < 0x02 0x13a 0x02 0x99 >; 606 clock-names = "uart\0clk_uart_baud0"; 607 dmas = < 0x04 0x11 0x04 0x12 >; 608 dma-names = "rx\0tx"; 609 status = "okay"; 610 }; 611 612 serial@13830000 { 613 compatible = "samsung,exynos4210-uart"; 614 reg = < 0x13830000 0x100 >; 615 interrupts = < 0x00 0x37 0x04 >; 616 clocks = < 0x02 0x13b 0x02 0x9a >; 617 clock-names = "uart\0clk_uart_baud0"; 618 dmas = < 0x24 0x11 0x24 0x12 >; 619 dma-names = "rx\0tx"; 620 status = "okay"; 621 }; 622 623 i2c@13860000 { 624 #address-cells = < 0x01 >; 625 #size-cells = < 0x00 >; 626 compatible = "samsung,s3c2440-i2c"; 627 reg = < 0x13860000 0x100 >; 628 interrupts = < 0x00 0x3a 0x04 >; 629 clocks = < 0x02 0x13d >; 630 clock-names = "i2c"; 631 pinctrl-names = "default"; 632 pinctrl-0 = < 0x2a >; 633 status = "okay"; 634 samsung,i2c-sda-delay = < 0x64 >; 635 samsung,i2c-max-bus-freq = < 0x61a80 >; 636 637 usb3503@8 { 638 compatible = "smsc,usb3503"; 639 reg = < 0x08 >; 640 intn-gpios = < 0x2b 0x00 0x00 >; 641 connect-gpios = < 0x2b 0x04 0x00 >; 642 reset-gpios = < 0x2b 0x05 0x00 >; 643 initial-mode = < 0x01 >; 644 }; 645 646 pmic@9 { 647 compatible = "maxim,max77686"; 648 interrupt-parent = < 0x2b >; 649 interrupts = < 0x02 0x00 >; 650 pinctrl-names = "default"; 651 pinctrl-0 = < 0x2c >; 652 reg = < 0x09 >; 653 #clock-cells = < 0x01 >; 654 phandle = < 0x19 >; 655 656 voltage-regulators { 657 658 LDO1 { 659 regulator-name = "VDD_ALIVE_1.0V"; 660 regulator-min-microvolt = < 0xf4240 >; 661 regulator-max-microvolt = < 0xf4240 >; 662 regulator-always-on; 663 }; 664 665 LDO2 { 666 regulator-name = "VDDQ_M1_2_1.8V"; 667 regulator-min-microvolt = < 0x1b7740 >; 668 regulator-max-microvolt = < 0x1b7740 >; 669 regulator-always-on; 670 }; 671 672 LDO3 { 673 regulator-name = "VDDQ_EXT_1.8V"; 674 regulator-min-microvolt = < 0x1b7740 >; 675 regulator-max-microvolt = < 0x1b7740 >; 676 regulator-always-on; 677 }; 678 679 LDO4 { 680 regulator-name = "VDDQ_MMC2_2.8V"; 681 regulator-min-microvolt = < 0x2ab980 >; 682 regulator-max-microvolt = < 0x2ab980 >; 683 regulator-boot-on; 684 phandle = < 0x1f >; 685 }; 686 687 LDO5 { 688 regulator-name = "VDDQ_MMC1_3_1.8V"; 689 regulator-min-microvolt = < 0x1b7740 >; 690 regulator-max-microvolt = < 0x1b7740 >; 691 regulator-always-on; 692 regulator-boot-on; 693 }; 694 695 LDO6 { 696 regulator-name = "VDD10_MPLL_1.0V"; 697 regulator-min-microvolt = < 0xf4240 >; 698 regulator-max-microvolt = < 0xf4240 >; 699 regulator-always-on; 700 }; 701 702 LDO7 { 703 regulator-name = "VDD10_XPLL_1.0V"; 704 regulator-min-microvolt = < 0xf4240 >; 705 regulator-max-microvolt = < 0xf4240 >; 706 regulator-always-on; 707 }; 708 709 LDO8 { 710 regulator-name = "VDD10_HDMI_1.0V"; 711 regulator-min-microvolt = < 0xf4240 >; 712 regulator-max-microvolt = < 0xf4240 >; 713 phandle = < 0x3f >; 714 }; 715 716 LDO10 { 717 regulator-name = "VDDQ_MIPIHSI_1.8V"; 718 regulator-min-microvolt = < 0x1b7740 >; 719 regulator-max-microvolt = < 0x1b7740 >; 720 phandle = < 0x39 >; 721 }; 722 723 LDO11 { 724 regulator-name = "VDD18_ABB1_1.8V"; 725 regulator-min-microvolt = < 0x1b7740 >; 726 regulator-max-microvolt = < 0x1b7740 >; 727 regulator-always-on; 728 }; 729 730 LDO12 { 731 regulator-name = "VDD33_USB_3.3V"; 732 regulator-min-microvolt = < 0x325aa0 >; 733 regulator-max-microvolt = < 0x325aa0 >; 734 regulator-always-on; 735 regulator-boot-on; 736 phandle = < 0x23 >; 737 }; 738 739 LDO13 { 740 regulator-name = "VDDQ_C2C_W_1.8V"; 741 regulator-min-microvolt = < 0x1b7740 >; 742 regulator-max-microvolt = < 0x1b7740 >; 743 regulator-always-on; 744 regulator-boot-on; 745 }; 746 747 LDO14 { 748 regulator-name = "VDD18_ABB0_2_1.8V"; 749 regulator-min-microvolt = < 0x1b7740 >; 750 regulator-max-microvolt = < 0x1b7740 >; 751 regulator-always-on; 752 regulator-boot-on; 753 }; 754 755 LDO15 { 756 regulator-name = "VDD10_HSIC_1.0V"; 757 regulator-min-microvolt = < 0xf4240 >; 758 regulator-max-microvolt = < 0xf4240 >; 759 regulator-always-on; 760 regulator-boot-on; 761 phandle = < 0x22 >; 762 }; 763 764 LDO16 { 765 regulator-name = "VDD18_HSIC_1.8V"; 766 regulator-min-microvolt = < 0x1b7740 >; 767 regulator-max-microvolt = < 0x1b7740 >; 768 regulator-always-on; 769 regulator-boot-on; 770 }; 771 772 LDO20 { 773 regulator-name = "LDO20_1.8V"; 774 regulator-min-microvolt = < 0x1b7740 >; 775 regulator-max-microvolt = < 0x1b7740 >; 776 regulator-boot-on; 777 phandle = < 0x4a >; 778 }; 779 780 LDO21 { 781 regulator-name = "TFLASH_2.8V"; 782 regulator-min-microvolt = < 0x2ab980 >; 783 regulator-max-microvolt = < 0x2ab980 >; 784 regulator-boot-on; 785 phandle = < 0x1e >; 786 }; 787 788 LDO22 { 789 regulator-name = "LDO22"; 790 regulator-boot-on; 791 }; 792 793 LDO25 { 794 regulator-name = "VDDQ_LCD_1.8V"; 795 regulator-min-microvolt = < 0x1b7740 >; 796 regulator-max-microvolt = < 0x1b7740 >; 797 regulator-always-on; 798 regulator-boot-on; 799 }; 800 801 BUCK1 { 802 regulator-name = "vdd_mif"; 803 regulator-min-microvolt = < 0xdbba0 >; 804 regulator-max-microvolt = < 0x10c8e0 >; 805 regulator-always-on; 806 regulator-boot-on; 807 phandle = < 0x50 >; 808 }; 809 810 BUCK2 { 811 regulator-name = "vdd_arm"; 812 regulator-min-microvolt = < 0xdbba0 >; 813 regulator-max-microvolt = < 0x149970 >; 814 regulator-always-on; 815 regulator-boot-on; 816 phandle = < 0x60 >; 817 }; 818 819 BUCK3 { 820 regulator-name = "vdd_int"; 821 regulator-min-microvolt = < 0xdbba0 >; 822 regulator-max-microvolt = < 0x100590 >; 823 regulator-always-on; 824 regulator-boot-on; 825 phandle = < 0x56 >; 826 }; 827 828 BUCK4 { 829 regulator-name = "vdd_g3d"; 830 regulator-min-microvolt = < 0xdbba0 >; 831 regulator-max-microvolt = < 0x10c8e0 >; 832 regulator-microvolt-offset = < 0xc350 >; 833 }; 834 835 BUCK5 { 836 regulator-name = "VDDQ_CKEM1_2_1.2V"; 837 regulator-min-microvolt = < 0x124f80 >; 838 regulator-max-microvolt = < 0x124f80 >; 839 regulator-always-on; 840 regulator-boot-on; 841 }; 842 843 BUCK6 { 844 regulator-name = "BUCK6_1.35V"; 845 regulator-min-microvolt = < 0x149970 >; 846 regulator-max-microvolt = < 0x149970 >; 847 regulator-always-on; 848 regulator-boot-on; 849 }; 850 851 BUCK7 { 852 regulator-name = "BUCK7_2.0V"; 853 regulator-min-microvolt = < 0x1e8480 >; 854 regulator-max-microvolt = < 0x1e8480 >; 855 regulator-always-on; 856 }; 857 858 BUCK8 { 859 regulator-name = "BUCK8_VDDQ_MMC4_2.8V"; 860 regulator-min-microvolt = < 0x2ab980 >; 861 regulator-max-microvolt = < 0x2ab980 >; 862 phandle = < 0x4c >; 863 }; 864 }; 865 }; 866 }; 867 868 i2c@13870000 { 869 #address-cells = < 0x01 >; 870 #size-cells = < 0x00 >; 871 compatible = "samsung,s3c2440-i2c"; 872 reg = < 0x13870000 0x100 >; 873 interrupts = < 0x00 0x3b 0x04 >; 874 clocks = < 0x02 0x13e >; 875 clock-names = "i2c"; 876 pinctrl-names = "default"; 877 pinctrl-0 = < 0x2d >; 878 status = "okay"; 879 880 max98090@10 { 881 compatible = "maxim,max98090"; 882 reg = < 0x10 >; 883 interrupt-parent = < 0x2e >; 884 interrupts = < 0x00 0x00 >; 885 clocks = < 0x06 0x00 >; 886 clock-names = "mclk"; 887 #sound-dai-cells = < 0x00 >; 888 phandle = < 0x65 >; 889 }; 890 }; 891 892 i2c@13880000 { 893 #address-cells = < 0x01 >; 894 #size-cells = < 0x00 >; 895 compatible = "samsung,s3c2440-i2c"; 896 reg = < 0x13880000 0x100 >; 897 interrupts = < 0x00 0x3c 0x04 >; 898 clocks = < 0x02 0x13f >; 899 clock-names = "i2c"; 900 pinctrl-names = "default"; 901 pinctrl-0 = < 0x2f >; 902 status = "okay"; 903 phandle = < 0x40 >; 904 }; 905 906 i2c@13890000 { 907 #address-cells = < 0x01 >; 908 #size-cells = < 0x00 >; 909 compatible = "samsung,s3c2440-i2c"; 910 reg = < 0x13890000 0x100 >; 911 interrupts = < 0x00 0x3d 0x04 >; 912 clocks = < 0x02 0x140 >; 913 clock-names = "i2c"; 914 pinctrl-names = "default"; 915 pinctrl-0 = < 0x30 >; 916 status = "disabled"; 917 }; 918 919 i2c@138a0000 { 920 #address-cells = < 0x01 >; 921 #size-cells = < 0x00 >; 922 compatible = "samsung,s3c2440-i2c"; 923 reg = < 0x138a0000 0x100 >; 924 interrupts = < 0x00 0x3e 0x04 >; 925 clocks = < 0x02 0x141 >; 926 clock-names = "i2c"; 927 pinctrl-names = "default"; 928 pinctrl-0 = < 0x31 >; 929 status = "disabled"; 930 }; 931 932 i2c@138b0000 { 933 #address-cells = < 0x01 >; 934 #size-cells = < 0x00 >; 935 compatible = "samsung,s3c2440-i2c"; 936 reg = < 0x138b0000 0x100 >; 937 interrupts = < 0x00 0x3f 0x04 >; 938 clocks = < 0x02 0x142 >; 939 clock-names = "i2c"; 940 pinctrl-names = "default"; 941 pinctrl-0 = < 0x32 >; 942 status = "disabled"; 943 }; 944 945 i2c@138c0000 { 946 #address-cells = < 0x01 >; 947 #size-cells = < 0x00 >; 948 compatible = "samsung,s3c2440-i2c"; 949 reg = < 0x138c0000 0x100 >; 950 interrupts = < 0x00 0x40 0x04 >; 951 clocks = < 0x02 0x143 >; 952 clock-names = "i2c"; 953 pinctrl-names = "default"; 954 pinctrl-0 = < 0x33 >; 955 status = "disabled"; 956 }; 957 958 i2c@138d0000 { 959 #address-cells = < 0x01 >; 960 #size-cells = < 0x00 >; 961 compatible = "samsung,s3c2440-i2c"; 962 reg = < 0x138d0000 0x100 >; 963 interrupts = < 0x00 0x41 0x04 >; 964 clocks = < 0x02 0x144 >; 965 clock-names = "i2c"; 966 pinctrl-names = "default"; 967 pinctrl-0 = < 0x34 >; 968 status = "disabled"; 969 }; 970 971 i2c@138e0000 { 972 #address-cells = < 0x01 >; 973 #size-cells = < 0x00 >; 974 compatible = "samsung,s3c2440-hdmiphy-i2c"; 975 reg = < 0x138e0000 0x100 >; 976 interrupts = < 0x00 0x5d 0x04 >; 977 clocks = < 0x02 0x145 >; 978 clock-names = "i2c"; 979 status = "okay"; 980 981 hdmiphy@38 { 982 compatible = "exynos4210-hdmiphy"; 983 reg = < 0x38 >; 984 phandle = < 0x3c >; 985 }; 986 }; 987 988 spi@13920000 { 989 compatible = "samsung,exynos4210-spi"; 990 reg = < 0x13920000 0x100 >; 991 interrupts = < 0x00 0x42 0x04 >; 992 dmas = < 0x04 0x07 0x04 0x06 >; 993 dma-names = "tx\0rx"; 994 #address-cells = < 0x01 >; 995 #size-cells = < 0x00 >; 996 clocks = < 0x02 0x147 0x02 0x9f >; 997 clock-names = "spi\0spi_busclk0"; 998 pinctrl-names = "default"; 999 pinctrl-0 = < 0x35 >; 1000 status = "disabled"; 1001 }; 1002 1003 spi@13930000 { 1004 compatible = "samsung,exynos4210-spi"; 1005 reg = < 0x13930000 0x100 >; 1006 interrupts = < 0x00 0x43 0x04 >; 1007 dmas = < 0x24 0x07 0x24 0x06 >; 1008 dma-names = "tx\0rx"; 1009 #address-cells = < 0x01 >; 1010 #size-cells = < 0x00 >; 1011 clocks = < 0x02 0x148 0x02 0xa0 >; 1012 clock-names = "spi\0spi_busclk0"; 1013 pinctrl-names = "default"; 1014 pinctrl-0 = < 0x36 >; 1015 status = "disabled"; 1016 }; 1017 1018 spi@13940000 { 1019 compatible = "samsung,exynos4210-spi"; 1020 reg = < 0x13940000 0x100 >; 1021 interrupts = < 0x00 0x44 0x04 >; 1022 dmas = < 0x04 0x09 0x04 0x08 >; 1023 dma-names = "tx\0rx"; 1024 #address-cells = < 0x01 >; 1025 #size-cells = < 0x00 >; 1026 clocks = < 0x02 0x149 0x02 0xa1 >; 1027 clock-names = "spi\0spi_busclk0"; 1028 pinctrl-names = "default"; 1029 pinctrl-0 = < 0x37 >; 1030 status = "disabled"; 1031 }; 1032 1033 pwm@139d0000 { 1034 compatible = "samsung,exynos4210-pwm"; 1035 reg = < 0x139d0000 0x1000 >; 1036 interrupts = < 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 0x00 0x29 0x04 >; 1037 clocks = < 0x02 0x150 >; 1038 clock-names = "timers"; 1039 #pwm-cells = < 0x03 >; 1040 status = "disabled"; 1041 }; 1042 1043 amba { 1044 #address-cells = < 0x01 >; 1045 #size-cells = < 0x01 >; 1046 compatible = "simple-bus"; 1047 interrupt-parent = < 0x01 >; 1048 ranges; 1049 1050 pdma@12680000 { 1051 compatible = "arm,pl330\0arm,primecell"; 1052 reg = < 0x12680000 0x1000 >; 1053 interrupts = < 0x00 0x23 0x04 >; 1054 clocks = < 0x02 0x124 >; 1055 clock-names = "apb_pclk"; 1056 #dma-cells = < 0x01 >; 1057 #dma-channels = < 0x08 >; 1058 #dma-requests = < 0x20 >; 1059 phandle = < 0x04 >; 1060 }; 1061 1062 pdma@12690000 { 1063 compatible = "arm,pl330\0arm,primecell"; 1064 reg = < 0x12690000 0x1000 >; 1065 interrupts = < 0x00 0x24 0x04 >; 1066 clocks = < 0x02 0x125 >; 1067 clock-names = "apb_pclk"; 1068 #dma-cells = < 0x01 >; 1069 #dma-channels = < 0x08 >; 1070 #dma-requests = < 0x20 >; 1071 phandle = < 0x24 >; 1072 }; 1073 1074 mdma@12850000 { 1075 compatible = "arm,pl330\0arm,primecell"; 1076 reg = < 0x12850000 0x1000 >; 1077 interrupts = < 0x00 0x22 0x04 >; 1078 clocks = < 0x02 0x117 >; 1079 clock-names = "apb_pclk"; 1080 #dma-cells = < 0x01 >; 1081 #dma-channels = < 0x08 >; 1082 #dma-requests = < 0x01 >; 1083 }; 1084 }; 1085 1086 fimd@11c00000 { 1087 compatible = "samsung,exynos4210-fimd"; 1088 interrupt-parent = < 0x09 >; 1089 reg = < 0x11c00000 0x20000 >; 1090 interrupt-names = "fifo\0vsync\0lcd_sys"; 1091 interrupts = < 0x0b 0x00 0x0b 0x01 0x0b 0x02 >; 1092 clocks = < 0x02 0x8c 0x02 0x11b >; 1093 clock-names = "sclk_fimd\0fimd"; 1094 power-domains = < 0x08 >; 1095 iommus = < 0x38 >; 1096 samsung,sysreg = < 0x0c >; 1097 status = "disabled"; 1098 }; 1099 1100 tmu@100c0000 { 1101 interrupt-parent = < 0x09 >; 1102 reg = < 0x100c0000 0x100 >; 1103 interrupts = < 0x02 0x04 >; 1104 status = "okay"; 1105 #thermal-sensor-cells = < 0x00 >; 1106 compatible = "samsung,exynos4412-tmu"; 1107 clocks = < 0x02 0x17f >; 1108 clock-names = "tmu_apbif"; 1109 vtmu-supply = < 0x39 >; 1110 phandle = < 0x5b >; 1111 }; 1112 1113 jpeg-codec@11840000 { 1114 compatible = "samsung,exynos4212-jpeg"; 1115 reg = < 0x11840000 0x1000 >; 1116 interrupts = < 0x00 0x58 0x04 >; 1117 clocks = < 0x02 0x106 >; 1118 clock-names = "jpeg"; 1119 power-domains = < 0x0b >; 1120 iommus = < 0x3a >; 1121 }; 1122 1123 rotator@12810000 { 1124 compatible = "samsung,exynos4212-rotator"; 1125 reg = < 0x12810000 0x64 >; 1126 interrupts = < 0x00 0x53 0x04 >; 1127 clocks = < 0x02 0x116 >; 1128 clock-names = "rotator"; 1129 iommus = < 0x3b >; 1130 }; 1131 1132 hdmi@12d00000 { 1133 compatible = "samsung,exynos4212-hdmi"; 1134 reg = < 0x12d00000 0x70000 >; 1135 interrupts = < 0x00 0x5c 0x04 >; 1136 clock-names = "hdmi\0sclk_hdmi\0sclk_pixel\0sclk_hdmiphy\0mout_hdmi"; 1137 clocks = < 0x02 0x10f 0x02 0x88 0x02 0x8b 0x02 0x16 0x02 0x18c >; 1138 phy = < 0x3c >; 1139 power-domains = < 0x3d >; 1140 samsung,syscon-phandle = < 0x07 >; 1141 #sound-dai-cells = < 0x00 >; 1142 status = "okay"; 1143 hpd-gpios = < 0x2b 0x07 0x00 >; 1144 pinctrl-names = "default"; 1145 pinctrl-0 = < 0x3e >; 1146 vdd-supply = < 0x3f >; 1147 vdd_osc-supply = < 0x39 >; 1148 vdd_pll-supply = < 0x3f >; 1149 ddc = < 0x40 >; 1150 phandle = < 0x41 >; 1151 }; 1152 1153 cec@100b0000 { 1154 compatible = "samsung,s5p-cec"; 1155 reg = < 0x100b0000 0x200 >; 1156 interrupts = < 0x00 0x72 0x04 >; 1157 clocks = < 0x02 0x157 >; 1158 clock-names = "hdmicec"; 1159 samsung,syscon-phandle = < 0x07 >; 1160 hdmi-phandle = < 0x41 >; 1161 pinctrl-names = "default"; 1162 pinctrl-0 = < 0x42 >; 1163 status = "okay"; 1164 }; 1165 1166 mixer@12c10000 { 1167 compatible = "samsung,exynos4212-mixer"; 1168 interrupts = < 0x00 0x5b 0x04 >; 1169 reg = < 0x12c10000 0x2100 0x12c00000 0x300 >; 1170 power-domains = < 0x3d >; 1171 iommus = < 0x43 >; 1172 status = "okay"; 1173 clock-names = "mixer\0hdmi\0sclk_hdmi\0vp"; 1174 clocks = < 0x02 0x10d 0x02 0x10f 0x02 0x88 0x02 0x10c >; 1175 }; 1176 1177 ppmu_dmc0@106a0000 { 1178 compatible = "samsung,exynos-ppmu"; 1179 reg = < 0x106a0000 0x2000 >; 1180 clocks = < 0x02 0x19c >; 1181 clock-names = "ppmu"; 1182 status = "okay"; 1183 1184 events { 1185 1186 ppmu-event3-dmc0 { 1187 event-name = "ppmu-event3-dmc0"; 1188 phandle = < 0x4e >; 1189 }; 1190 }; 1191 }; 1192 1193 ppmu_dmc1@106b0000 { 1194 compatible = "samsung,exynos-ppmu"; 1195 reg = < 0x106b0000 0x2000 >; 1196 clocks = < 0x02 0x19d >; 1197 clock-names = "ppmu"; 1198 status = "okay"; 1199 1200 events { 1201 1202 ppmu-event3-dmc1 { 1203 event-name = "ppmu-event3-dmc1"; 1204 phandle = < 0x4f >; 1205 }; 1206 }; 1207 }; 1208 1209 ppmu_cpu@106c0000 { 1210 compatible = "samsung,exynos-ppmu"; 1211 reg = < 0x106c0000 0x2000 >; 1212 clocks = < 0x02 0x19e >; 1213 clock-names = "ppmu"; 1214 status = "disabled"; 1215 }; 1216 1217 ppmu_rightbus@112a0000 { 1218 compatible = "samsung,exynos-ppmu"; 1219 reg = < 0x112a0000 0x2000 >; 1220 clocks = < 0x02 0x191 >; 1221 clock-names = "ppmu"; 1222 status = "okay"; 1223 1224 events { 1225 1226 ppmu-event3-rightbus { 1227 event-name = "ppmu-event3-rightbus"; 1228 phandle = < 0x55 >; 1229 }; 1230 }; 1231 }; 1232 1233 ppmu_leftbus0@116a0000 { 1234 compatible = "samsung,exynos-ppmu"; 1235 reg = < 0x116a0000 0x2000 >; 1236 clocks = < 0x02 0x190 >; 1237 clock-names = "ppmu"; 1238 status = "okay"; 1239 1240 events { 1241 1242 ppmu-event3-leftbus { 1243 event-name = "ppmu-event3-leftbus"; 1244 phandle = < 0x54 >; 1245 }; 1246 }; 1247 }; 1248 1249 ppmu_camif@11ac0000 { 1250 compatible = "samsung,exynos-ppmu"; 1251 reg = < 0x11ac0000 0x2000 >; 1252 clocks = < 0x02 0x192 >; 1253 clock-names = "ppmu"; 1254 status = "disabled"; 1255 }; 1256 1257 ppmu_lcd0@11e40000 { 1258 compatible = "samsung,exynos-ppmu"; 1259 reg = < 0x11e40000 0x2000 >; 1260 clocks = < 0x02 0x198 >; 1261 clock-names = "ppmu"; 1262 status = "disabled"; 1263 }; 1264 1265 ppmu_g3d@12630000 { 1266 compatible = "samsung,exynos-ppmu"; 1267 reg = < 0x12630000 0x2000 >; 1268 status = "disabled"; 1269 }; 1270 1271 ppmu_image@12aa0000 { 1272 compatible = "samsung,exynos-ppmu"; 1273 reg = < 0x12aa0000 0x2000 >; 1274 clocks = < 0x02 0x197 >; 1275 clock-names = "ppmu"; 1276 status = "disabled"; 1277 }; 1278 1279 ppmu_tv@12e40000 { 1280 compatible = "samsung,exynos-ppmu"; 1281 reg = < 0x12e40000 0x2000 >; 1282 clocks = < 0x02 0x193 >; 1283 clock-names = "ppmu"; 1284 status = "disabled"; 1285 }; 1286 1287 ppmu_g3d@13220000 { 1288 compatible = "samsung,exynos-ppmu"; 1289 reg = < 0x13220000 0x2000 >; 1290 clocks = < 0x02 0x196 >; 1291 clock-names = "ppmu"; 1292 status = "disabled"; 1293 }; 1294 1295 ppmu_mfc_left@13660000 { 1296 compatible = "samsung,exynos-ppmu"; 1297 reg = < 0x13660000 0x2000 >; 1298 clocks = < 0x02 0x194 >; 1299 clock-names = "ppmu"; 1300 status = "disabled"; 1301 }; 1302 1303 ppmu_mfc_right@13670000 { 1304 compatible = "samsung,exynos-ppmu"; 1305 reg = < 0x13670000 0x2000 >; 1306 clocks = < 0x02 0x195 >; 1307 clock-names = "ppmu"; 1308 status = "disabled"; 1309 }; 1310 1311 sysmmu@13620000 { 1312 compatible = "samsung,exynos-sysmmu"; 1313 reg = < 0x13620000 0x1000 >; 1314 interrupt-parent = < 0x09 >; 1315 interrupts = < 0x05 0x05 >; 1316 clock-names = "sysmmu\0master"; 1317 clocks = < 0x02 0x112 0x02 0x111 >; 1318 power-domains = < 0x25 >; 1319 #iommu-cells = < 0x00 >; 1320 phandle = < 0x26 >; 1321 }; 1322 1323 sysmmu@13630000 { 1324 compatible = "samsung,exynos-sysmmu"; 1325 reg = < 0x13630000 0x1000 >; 1326 interrupt-parent = < 0x09 >; 1327 interrupts = < 0x05 0x06 >; 1328 clock-names = "sysmmu\0master"; 1329 clocks = < 0x02 0x113 0x02 0x111 >; 1330 power-domains = < 0x25 >; 1331 #iommu-cells = < 0x00 >; 1332 phandle = < 0x27 >; 1333 }; 1334 1335 sysmmu@12e20000 { 1336 compatible = "samsung,exynos-sysmmu"; 1337 reg = < 0x12e20000 0x1000 >; 1338 interrupt-parent = < 0x09 >; 1339 interrupts = < 0x05 0x04 >; 1340 clock-names = "sysmmu\0master"; 1341 clocks = < 0x02 0x110 0x02 0x10d >; 1342 power-domains = < 0x3d >; 1343 #iommu-cells = < 0x00 >; 1344 phandle = < 0x43 >; 1345 }; 1346 1347 sysmmu@11a20000 { 1348 compatible = "samsung,exynos-sysmmu"; 1349 reg = < 0x11a20000 0x1000 >; 1350 interrupt-parent = < 0x09 >; 1351 interrupts = < 0x04 0x02 >; 1352 clock-names = "sysmmu\0master"; 1353 clocks = < 0x02 0x107 0x02 0x100 >; 1354 power-domains = < 0x0b >; 1355 #iommu-cells = < 0x00 >; 1356 phandle = < 0x0d >; 1357 }; 1358 1359 sysmmu@11a30000 { 1360 compatible = "samsung,exynos-sysmmu"; 1361 reg = < 0x11a30000 0x1000 >; 1362 interrupt-parent = < 0x09 >; 1363 interrupts = < 0x04 0x03 >; 1364 clock-names = "sysmmu\0master"; 1365 clocks = < 0x02 0x108 0x02 0x101 >; 1366 power-domains = < 0x0b >; 1367 #iommu-cells = < 0x00 >; 1368 phandle = < 0x0e >; 1369 }; 1370 1371 sysmmu@11a40000 { 1372 compatible = "samsung,exynos-sysmmu"; 1373 reg = < 0x11a40000 0x1000 >; 1374 interrupt-parent = < 0x09 >; 1375 interrupts = < 0x04 0x04 >; 1376 clock-names = "sysmmu\0master"; 1377 clocks = < 0x02 0x109 0x02 0x102 >; 1378 power-domains = < 0x0b >; 1379 #iommu-cells = < 0x00 >; 1380 phandle = < 0x0f >; 1381 }; 1382 1383 sysmmu@11a50000 { 1384 compatible = "samsung,exynos-sysmmu"; 1385 reg = < 0x11a50000 0x1000 >; 1386 interrupt-parent = < 0x09 >; 1387 interrupts = < 0x04 0x05 >; 1388 clock-names = "sysmmu\0master"; 1389 clocks = < 0x02 0x10a 0x02 0x103 >; 1390 power-domains = < 0x0b >; 1391 #iommu-cells = < 0x00 >; 1392 phandle = < 0x10 >; 1393 }; 1394 1395 sysmmu@11a60000 { 1396 compatible = "samsung,exynos-sysmmu"; 1397 reg = < 0x11a60000 0x1000 >; 1398 interrupt-parent = < 0x09 >; 1399 interrupts = < 0x04 0x06 >; 1400 clock-names = "sysmmu\0master"; 1401 clocks = < 0x02 0x10b 0x02 0x106 >; 1402 power-domains = < 0x0b >; 1403 #iommu-cells = < 0x00 >; 1404 phandle = < 0x3a >; 1405 }; 1406 1407 sysmmu@12a30000 { 1408 compatible = "samsung,exynos-sysmmu"; 1409 reg = < 0x12a30000 0x1000 >; 1410 interrupt-parent = < 0x09 >; 1411 interrupts = < 0x05 0x00 >; 1412 clock-names = "sysmmu\0master"; 1413 clocks = < 0x02 0x119 0x02 0x116 >; 1414 #iommu-cells = < 0x00 >; 1415 phandle = < 0x3b >; 1416 }; 1417 1418 sysmmu@11e20000 { 1419 compatible = "samsung,exynos-sysmmu"; 1420 reg = < 0x11e20000 0x1000 >; 1421 interrupt-parent = < 0x09 >; 1422 interrupts = < 0x05 0x02 >; 1423 clock-names = "sysmmu\0master"; 1424 clocks = < 0x02 0x11f 0x02 0x11b >; 1425 power-domains = < 0x08 >; 1426 #iommu-cells = < 0x00 >; 1427 phandle = < 0x38 >; 1428 }; 1429 1430 sss@10830000 { 1431 compatible = "samsung,exynos4210-secss"; 1432 reg = < 0x10830000 0x300 >; 1433 interrupts = < 0x00 0x70 0x04 >; 1434 clocks = < 0x02 0xff >; 1435 clock-names = "secss"; 1436 }; 1437 1438 rng@10830400 { 1439 compatible = "samsung,exynos4-rng"; 1440 reg = < 0x10830400 0x200 >; 1441 clocks = < 0x02 0xff >; 1442 clock-names = "secss"; 1443 }; 1444 1445 pinctrl@11400000 { 1446 compatible = "samsung,exynos4x12-pinctrl"; 1447 reg = < 0x11400000 0x1000 >; 1448 interrupts = < 0x00 0x2f 0x04 >; 1449 1450 gpa0 { 1451 gpio-controller; 1452 #gpio-cells = < 0x02 >; 1453 interrupt-controller; 1454 #interrupt-cells = < 0x02 >; 1455 }; 1456 1457 gpa1 { 1458 gpio-controller; 1459 #gpio-cells = < 0x02 >; 1460 interrupt-controller; 1461 #interrupt-cells = < 0x02 >; 1462 phandle = < 0x69 >; 1463 }; 1464 1465 gpb { 1466 gpio-controller; 1467 #gpio-cells = < 0x02 >; 1468 interrupt-controller; 1469 #interrupt-cells = < 0x02 >; 1470 }; 1471 1472 gpc0 { 1473 gpio-controller; 1474 #gpio-cells = < 0x02 >; 1475 interrupt-controller; 1476 #interrupt-cells = < 0x02 >; 1477 }; 1478 1479 gpc1 { 1480 gpio-controller; 1481 #gpio-cells = < 0x02 >; 1482 interrupt-controller; 1483 #interrupt-cells = < 0x02 >; 1484 phandle = < 0x68 >; 1485 }; 1486 1487 gpd0 { 1488 gpio-controller; 1489 #gpio-cells = < 0x02 >; 1490 interrupt-controller; 1491 #interrupt-cells = < 0x02 >; 1492 }; 1493 1494 gpd1 { 1495 gpio-controller; 1496 #gpio-cells = < 0x02 >; 1497 interrupt-controller; 1498 #interrupt-cells = < 0x02 >; 1499 }; 1500 1501 gpf0 { 1502 gpio-controller; 1503 #gpio-cells = < 0x02 >; 1504 interrupt-controller; 1505 #interrupt-cells = < 0x02 >; 1506 }; 1507 1508 gpf1 { 1509 gpio-controller; 1510 #gpio-cells = < 0x02 >; 1511 interrupt-controller; 1512 #interrupt-cells = < 0x02 >; 1513 }; 1514 1515 gpf2 { 1516 gpio-controller; 1517 #gpio-cells = < 0x02 >; 1518 interrupt-controller; 1519 #interrupt-cells = < 0x02 >; 1520 }; 1521 1522 gpf3 { 1523 gpio-controller; 1524 #gpio-cells = < 0x02 >; 1525 interrupt-controller; 1526 #interrupt-cells = < 0x02 >; 1527 }; 1528 1529 gpj0 { 1530 gpio-controller; 1531 #gpio-cells = < 0x02 >; 1532 interrupt-controller; 1533 #interrupt-cells = < 0x02 >; 1534 }; 1535 1536 gpj1 { 1537 gpio-controller; 1538 #gpio-cells = < 0x02 >; 1539 interrupt-controller; 1540 #interrupt-cells = < 0x02 >; 1541 }; 1542 1543 uart0-data { 1544 samsung,pins = "gpa0-0\0gpa0-1"; 1545 samsung,pin-function = < 0x02 >; 1546 samsung,pin-pud = < 0x00 >; 1547 samsung,pin-drv = < 0x00 >; 1548 }; 1549 1550 uart0-fctl { 1551 samsung,pins = "gpa0-2\0gpa0-3"; 1552 samsung,pin-function = < 0x02 >; 1553 samsung,pin-pud = < 0x00 >; 1554 samsung,pin-drv = < 0x00 >; 1555 }; 1556 1557 uart1-data { 1558 samsung,pins = "gpa0-4\0gpa0-5"; 1559 samsung,pin-function = < 0x02 >; 1560 samsung,pin-pud = < 0x00 >; 1561 samsung,pin-drv = < 0x00 >; 1562 }; 1563 1564 uart1-fctl { 1565 samsung,pins = "gpa0-6\0gpa0-7"; 1566 samsung,pin-function = < 0x02 >; 1567 samsung,pin-pud = < 0x00 >; 1568 samsung,pin-drv = < 0x00 >; 1569 }; 1570 1571 i2c2-bus { 1572 samsung,pins = "gpa0-6\0gpa0-7"; 1573 samsung,pin-function = < 0x03 >; 1574 samsung,pin-pud = < 0x03 >; 1575 samsung,pin-drv = < 0x00 >; 1576 phandle = < 0x2f >; 1577 }; 1578 1579 uart2-data { 1580 samsung,pins = "gpa1-0\0gpa1-1"; 1581 samsung,pin-function = < 0x02 >; 1582 samsung,pin-pud = < 0x00 >; 1583 samsung,pin-drv = < 0x00 >; 1584 }; 1585 1586 uart2-fctl { 1587 samsung,pins = "gpa1-2\0gpa1-3"; 1588 samsung,pin-function = < 0x02 >; 1589 samsung,pin-pud = < 0x00 >; 1590 samsung,pin-drv = < 0x00 >; 1591 }; 1592 1593 uart-audio-a { 1594 samsung,pins = "gpa1-0\0gpa1-1"; 1595 samsung,pin-function = < 0x04 >; 1596 samsung,pin-pud = < 0x00 >; 1597 samsung,pin-drv = < 0x00 >; 1598 }; 1599 1600 i2c3-bus { 1601 samsung,pins = "gpa1-2\0gpa1-3"; 1602 samsung,pin-function = < 0x03 >; 1603 samsung,pin-pud = < 0x03 >; 1604 samsung,pin-drv = < 0x00 >; 1605 phandle = < 0x30 >; 1606 }; 1607 1608 uart3-data { 1609 samsung,pins = "gpa1-4\0gpa1-5"; 1610 samsung,pin-function = < 0x02 >; 1611 samsung,pin-pud = < 0x00 >; 1612 samsung,pin-drv = < 0x00 >; 1613 }; 1614 1615 uart-audio-b { 1616 samsung,pins = "gpa1-4\0gpa1-5"; 1617 samsung,pin-function = < 0x04 >; 1618 samsung,pin-pud = < 0x00 >; 1619 samsung,pin-drv = < 0x00 >; 1620 }; 1621 1622 spi0-bus { 1623 samsung,pins = "gpb-0\0gpb-2\0gpb-3"; 1624 samsung,pin-function = < 0x02 >; 1625 samsung,pin-pud = < 0x03 >; 1626 samsung,pin-drv = < 0x00 >; 1627 phandle = < 0x35 >; 1628 }; 1629 1630 i2c4-bus { 1631 samsung,pins = "gpb-0\0gpb-1"; 1632 samsung,pin-function = < 0x03 >; 1633 samsung,pin-pud = < 0x03 >; 1634 samsung,pin-drv = < 0x00 >; 1635 phandle = < 0x31 >; 1636 }; 1637 1638 spi1-bus { 1639 samsung,pins = "gpb-4\0gpb-6\0gpb-7"; 1640 samsung,pin-function = < 0x02 >; 1641 samsung,pin-pud = < 0x03 >; 1642 samsung,pin-drv = < 0x00 >; 1643 phandle = < 0x36 >; 1644 }; 1645 1646 i2c5-bus { 1647 samsung,pins = "gpb-2\0gpb-3"; 1648 samsung,pin-function = < 0x03 >; 1649 samsung,pin-pud = < 0x03 >; 1650 samsung,pin-drv = < 0x00 >; 1651 phandle = < 0x32 >; 1652 }; 1653 1654 i2s1-bus { 1655 samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4"; 1656 samsung,pin-function = < 0x02 >; 1657 samsung,pin-pud = < 0x00 >; 1658 samsung,pin-drv = < 0x00 >; 1659 }; 1660 1661 pcm1-bus { 1662 samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4"; 1663 samsung,pin-function = < 0x03 >; 1664 samsung,pin-pud = < 0x00 >; 1665 samsung,pin-drv = < 0x00 >; 1666 }; 1667 1668 ac97-bus { 1669 samsung,pins = "gpc0-0\0gpc0-1\0gpc0-2\0gpc0-3\0gpc0-4"; 1670 samsung,pin-function = < 0x04 >; 1671 samsung,pin-pud = < 0x00 >; 1672 samsung,pin-drv = < 0x00 >; 1673 }; 1674 1675 i2s2-bus { 1676 samsung,pins = "gpc1-0\0gpc1-1\0gpc1-2\0gpc1-3\0gpc1-4"; 1677 samsung,pin-function = < 0x02 >; 1678 samsung,pin-pud = < 0x00 >; 1679 samsung,pin-drv = < 0x00 >; 1680 }; 1681 1682 pcm2-bus { 1683 samsung,pins = "gpc1-0\0gpc1-1\0gpc1-2\0gpc1-3\0gpc1-4"; 1684 samsung,pin-function = < 0x03 >; 1685 samsung,pin-pud = < 0x00 >; 1686 samsung,pin-drv = < 0x00 >; 1687 }; 1688 1689 spdif-bus { 1690 samsung,pins = "gpc1-0\0gpc1-1"; 1691 samsung,pin-function = < 0x04 >; 1692 samsung,pin-pud = < 0x00 >; 1693 samsung,pin-drv = < 0x00 >; 1694 }; 1695 1696 i2c6-bus { 1697 samsung,pins = "gpc1-3\0gpc1-4"; 1698 samsung,pin-function = < 0x04 >; 1699 samsung,pin-pud = < 0x03 >; 1700 samsung,pin-drv = < 0x00 >; 1701 phandle = < 0x33 >; 1702 }; 1703 1704 spi2-bus { 1705 samsung,pins = "gpc1-1\0gpc1-3\0gpc1-4"; 1706 samsung,pin-function = < 0x05 >; 1707 samsung,pin-pud = < 0x03 >; 1708 samsung,pin-drv = < 0x00 >; 1709 phandle = < 0x37 >; 1710 }; 1711 1712 pwm0-out { 1713 samsung,pins = "gpd0-0"; 1714 samsung,pin-function = < 0x02 >; 1715 samsung,pin-pud = < 0x00 >; 1716 samsung,pin-drv = < 0x00 >; 1717 }; 1718 1719 pwm1-out { 1720 samsung,pins = "gpd0-1"; 1721 samsung,pin-function = < 0x02 >; 1722 samsung,pin-pud = < 0x00 >; 1723 samsung,pin-drv = < 0x00 >; 1724 }; 1725 1726 lcd-ctrl { 1727 samsung,pins = "gpd0-0\0gpd0-1"; 1728 samsung,pin-function = < 0x03 >; 1729 samsung,pin-pud = < 0x00 >; 1730 samsung,pin-drv = < 0x00 >; 1731 }; 1732 1733 i2c7-bus { 1734 samsung,pins = "gpd0-2\0gpd0-3"; 1735 samsung,pin-function = < 0x03 >; 1736 samsung,pin-pud = < 0x03 >; 1737 samsung,pin-drv = < 0x00 >; 1738 phandle = < 0x34 >; 1739 }; 1740 1741 pwm2-out { 1742 samsung,pins = "gpd0-2"; 1743 samsung,pin-function = < 0x02 >; 1744 samsung,pin-pud = < 0x00 >; 1745 samsung,pin-drv = < 0x00 >; 1746 }; 1747 1748 pwm3-out { 1749 samsung,pins = "gpd0-3"; 1750 samsung,pin-function = < 0x02 >; 1751 samsung,pin-pud = < 0x00 >; 1752 samsung,pin-drv = < 0x00 >; 1753 }; 1754 1755 i2c0-bus { 1756 samsung,pins = "gpd1-0\0gpd1-1"; 1757 samsung,pin-function = < 0x02 >; 1758 samsung,pin-pud = < 0x03 >; 1759 samsung,pin-drv = < 0x00 >; 1760 phandle = < 0x2a >; 1761 }; 1762 1763 mipi0-clk { 1764 samsung,pins = "gpd1-0\0gpd1-1"; 1765 samsung,pin-function = < 0x03 >; 1766 samsung,pin-pud = < 0x00 >; 1767 samsung,pin-drv = < 0x00 >; 1768 }; 1769 1770 i2c1-bus { 1771 samsung,pins = "gpd1-2\0gpd1-3"; 1772 samsung,pin-function = < 0x02 >; 1773 samsung,pin-pud = < 0x03 >; 1774 samsung,pin-drv = < 0x00 >; 1775 phandle = < 0x2d >; 1776 }; 1777 1778 mipi1-clk { 1779 samsung,pins = "gpd1-2\0gpd1-3"; 1780 samsung,pin-function = < 0x03 >; 1781 samsung,pin-pud = < 0x00 >; 1782 samsung,pin-drv = < 0x00 >; 1783 }; 1784 1785 lcd-clk { 1786 samsung,pins = "gpf0-0\0gpf0-1\0gpf0-2\0gpf0-3"; 1787 samsung,pin-function = < 0x02 >; 1788 samsung,pin-pud = < 0x00 >; 1789 samsung,pin-drv = < 0x00 >; 1790 }; 1791 1792 lcd-data-width16 { 1793 samsung,pins = "gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3"; 1794 samsung,pin-function = < 0x02 >; 1795 samsung,pin-pud = < 0x00 >; 1796 samsung,pin-drv = < 0x00 >; 1797 }; 1798 1799 lcd-data-width18 { 1800 samsung,pins = "gpf0-6\0gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-6\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3"; 1801 samsung,pin-function = < 0x02 >; 1802 samsung,pin-pud = < 0x00 >; 1803 samsung,pin-drv = < 0x00 >; 1804 }; 1805 1806 lcd-data-width24 { 1807 samsung,pins = "gpf0-4\0gpf0-5\0gpf0-6\0gpf0-7\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3\0gpf1-4\0gpf1-5\0gpf1-6\0gpf1-7\0gpf2-0\0gpf2-1\0gpf2-2\0gpf2-3\0gpf2-4\0gpf2-5\0gpf2-6\0gpf2-7\0gpf3-0\0gpf3-1\0gpf3-2\0gpf3-3"; 1808 samsung,pin-function = < 0x02 >; 1809 samsung,pin-pud = < 0x00 >; 1810 samsung,pin-drv = < 0x00 >; 1811 }; 1812 1813 lcd-ldi { 1814 samsung,pins = "gpf3-4"; 1815 samsung,pin-function = < 0x02 >; 1816 samsung,pin-pud = < 0x00 >; 1817 samsung,pin-drv = < 0x00 >; 1818 }; 1819 1820 cam-port-a-io { 1821 samsung,pins = "gpj0-0\0gpj0-1\0gpj0-2\0gpj0-3\0gpj0-4\0gpj0-5\0gpj0-6\0gpj0-7\0gpj1-0\0gpj1-1\0gpj1-2\0gpj1-4"; 1822 samsung,pin-function = < 0x02 >; 1823 samsung,pin-pud = < 0x00 >; 1824 samsung,pin-drv = < 0x00 >; 1825 }; 1826 1827 cam-port-a-clk-active { 1828 samsung,pins = "gpj1-3"; 1829 samsung,pin-function = < 0x02 >; 1830 samsung,pin-pud = < 0x00 >; 1831 samsung,pin-drv = < 0x03 >; 1832 }; 1833 1834 cam-port-a-clk-idle { 1835 samsung,pins = "gpj1-3"; 1836 samsung,pin-function = < 0x00 >; 1837 samsung,pin-pud = < 0x01 >; 1838 samsung,pin-drv = < 0x00 >; 1839 }; 1840 }; 1841 1842 pinctrl@11000000 { 1843 compatible = "samsung,exynos4x12-pinctrl"; 1844 reg = < 0x11000000 0x1000 >; 1845 interrupts = < 0x00 0x2e 0x04 >; 1846 1847 wakeup-interrupt-controller { 1848 compatible = "samsung,exynos4210-wakeup-eint"; 1849 interrupt-parent = < 0x01 >; 1850 interrupts = < 0x00 0x20 0x04 >; 1851 }; 1852 1853 gpk0 { 1854 gpio-controller; 1855 #gpio-cells = < 0x02 >; 1856 interrupt-controller; 1857 #interrupt-cells = < 0x02 >; 1858 }; 1859 1860 gpk1 { 1861 gpio-controller; 1862 #gpio-cells = < 0x02 >; 1863 interrupt-controller; 1864 #interrupt-cells = < 0x02 >; 1865 phandle = < 0x67 >; 1866 }; 1867 1868 gpk2 { 1869 gpio-controller; 1870 #gpio-cells = < 0x02 >; 1871 interrupt-controller; 1872 #interrupt-cells = < 0x02 >; 1873 phandle = < 0x20 >; 1874 }; 1875 1876 gpk3 { 1877 gpio-controller; 1878 #gpio-cells = < 0x02 >; 1879 interrupt-controller; 1880 #interrupt-cells = < 0x02 >; 1881 }; 1882 1883 gpl0 { 1884 gpio-controller; 1885 #gpio-cells = < 0x02 >; 1886 interrupt-controller; 1887 #interrupt-cells = < 0x02 >; 1888 }; 1889 1890 gpl1 { 1891 gpio-controller; 1892 #gpio-cells = < 0x02 >; 1893 interrupt-controller; 1894 #interrupt-cells = < 0x02 >; 1895 }; 1896 1897 gpl2 { 1898 gpio-controller; 1899 #gpio-cells = < 0x02 >; 1900 interrupt-controller; 1901 #interrupt-cells = < 0x02 >; 1902 }; 1903 1904 gpm0 { 1905 gpio-controller; 1906 #gpio-cells = < 0x02 >; 1907 interrupt-controller; 1908 #interrupt-cells = < 0x02 >; 1909 }; 1910 1911 gpm1 { 1912 gpio-controller; 1913 #gpio-cells = < 0x02 >; 1914 interrupt-controller; 1915 #interrupt-cells = < 0x02 >; 1916 }; 1917 1918 gpm2 { 1919 gpio-controller; 1920 #gpio-cells = < 0x02 >; 1921 interrupt-controller; 1922 #interrupt-cells = < 0x02 >; 1923 }; 1924 1925 gpm3 { 1926 gpio-controller; 1927 #gpio-cells = < 0x02 >; 1928 interrupt-controller; 1929 #interrupt-cells = < 0x02 >; 1930 }; 1931 1932 gpm4 { 1933 gpio-controller; 1934 #gpio-cells = < 0x02 >; 1935 interrupt-controller; 1936 #interrupt-cells = < 0x02 >; 1937 }; 1938 1939 gpy0 { 1940 gpio-controller; 1941 #gpio-cells = < 0x02 >; 1942 }; 1943 1944 gpy1 { 1945 gpio-controller; 1946 #gpio-cells = < 0x02 >; 1947 }; 1948 1949 gpy2 { 1950 gpio-controller; 1951 #gpio-cells = < 0x02 >; 1952 }; 1953 1954 gpy3 { 1955 gpio-controller; 1956 #gpio-cells = < 0x02 >; 1957 }; 1958 1959 gpy4 { 1960 gpio-controller; 1961 #gpio-cells = < 0x02 >; 1962 }; 1963 1964 gpy5 { 1965 gpio-controller; 1966 #gpio-cells = < 0x02 >; 1967 }; 1968 1969 gpy6 { 1970 gpio-controller; 1971 #gpio-cells = < 0x02 >; 1972 }; 1973 1974 gpx0 { 1975 gpio-controller; 1976 #gpio-cells = < 0x02 >; 1977 interrupt-controller; 1978 interrupt-parent = < 0x01 >; 1979 interrupts = < 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04 0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x17 0x04 >; 1980 #interrupt-cells = < 0x02 >; 1981 phandle = < 0x2e >; 1982 }; 1983 1984 gpx1 { 1985 gpio-controller; 1986 #gpio-cells = < 0x02 >; 1987 interrupt-controller; 1988 interrupt-parent = < 0x01 >; 1989 interrupts = < 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 >; 1990 #interrupt-cells = < 0x02 >; 1991 phandle = < 0x63 >; 1992 }; 1993 1994 gpx2 { 1995 gpio-controller; 1996 #gpio-cells = < 0x02 >; 1997 interrupt-controller; 1998 #interrupt-cells = < 0x02 >; 1999 phandle = < 0x64 >; 2000 }; 2001 2002 gpx3 { 2003 gpio-controller; 2004 #gpio-cells = < 0x02 >; 2005 interrupt-controller; 2006 #interrupt-cells = < 0x02 >; 2007 phandle = < 0x2b >; 2008 }; 2009 2010 sd0-clk { 2011 samsung,pins = "gpk0-0"; 2012 samsung,pin-function = < 0x02 >; 2013 samsung,pin-pud = < 0x00 >; 2014 samsung,pin-drv = < 0x03 >; 2015 }; 2016 2017 sd0-cmd { 2018 samsung,pins = "gpk0-1"; 2019 samsung,pin-function = < 0x02 >; 2020 samsung,pin-pud = < 0x00 >; 2021 samsung,pin-drv = < 0x03 >; 2022 }; 2023 2024 sd0-cd { 2025 samsung,pins = "gpk0-2"; 2026 samsung,pin-function = < 0x02 >; 2027 samsung,pin-pud = < 0x03 >; 2028 samsung,pin-drv = < 0x03 >; 2029 }; 2030 2031 sd0-bus-width1 { 2032 samsung,pins = "gpk0-3"; 2033 samsung,pin-function = < 0x02 >; 2034 samsung,pin-pud = < 0x03 >; 2035 samsung,pin-drv = < 0x03 >; 2036 }; 2037 2038 sd0-bus-width4 { 2039 samsung,pins = "gpk0-3\0gpk0-4\0gpk0-5\0gpk0-6"; 2040 samsung,pin-function = < 0x02 >; 2041 samsung,pin-pud = < 0x03 >; 2042 samsung,pin-drv = < 0x03 >; 2043 }; 2044 2045 sd0-bus-width8 { 2046 samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6"; 2047 samsung,pin-function = < 0x03 >; 2048 samsung,pin-pud = < 0x03 >; 2049 samsung,pin-drv = < 0x03 >; 2050 }; 2051 2052 sd4-clk { 2053 samsung,pins = "gpk0-0"; 2054 samsung,pin-function = < 0x03 >; 2055 samsung,pin-pud = < 0x00 >; 2056 samsung,pin-drv = < 0x03 >; 2057 phandle = < 0x46 >; 2058 }; 2059 2060 sd4-cmd { 2061 samsung,pins = "gpk0-1"; 2062 samsung,pin-function = < 0x03 >; 2063 samsung,pin-pud = < 0x00 >; 2064 samsung,pin-drv = < 0x03 >; 2065 phandle = < 0x47 >; 2066 }; 2067 2068 sd4-cd { 2069 samsung,pins = "gpk0-2"; 2070 samsung,pin-function = < 0x03 >; 2071 samsung,pin-pud = < 0x03 >; 2072 samsung,pin-drv = < 0x03 >; 2073 }; 2074 2075 sd4-bus-width1 { 2076 samsung,pins = "gpk0-3"; 2077 samsung,pin-function = < 0x03 >; 2078 samsung,pin-pud = < 0x03 >; 2079 samsung,pin-drv = < 0x03 >; 2080 }; 2081 2082 sd4-bus-width4 { 2083 samsung,pins = "gpk0-3\0gpk0-4\0gpk0-5\0gpk0-6"; 2084 samsung,pin-function = < 0x03 >; 2085 samsung,pin-pud = < 0x03 >; 2086 samsung,pin-drv = < 0x03 >; 2087 phandle = < 0x48 >; 2088 }; 2089 2090 sd4-bus-width8 { 2091 samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6"; 2092 samsung,pin-function = < 0x04 >; 2093 samsung,pin-pud = < 0x03 >; 2094 samsung,pin-drv = < 0x03 >; 2095 phandle = < 0x49 >; 2096 }; 2097 2098 sd1-clk { 2099 samsung,pins = "gpk1-0"; 2100 samsung,pin-function = < 0x02 >; 2101 samsung,pin-pud = < 0x00 >; 2102 samsung,pin-drv = < 0x03 >; 2103 }; 2104 2105 sd1-cmd { 2106 samsung,pins = "gpk1-1"; 2107 samsung,pin-function = < 0x02 >; 2108 samsung,pin-pud = < 0x00 >; 2109 samsung,pin-drv = < 0x03 >; 2110 }; 2111 2112 sd1-cd { 2113 samsung,pins = "gpk1-2"; 2114 samsung,pin-function = < 0x02 >; 2115 samsung,pin-pud = < 0x00 >; 2116 samsung,pin-drv = < 0x00 >; 2117 phandle = < 0x66 >; 2118 }; 2119 2120 sd1-bus-width1 { 2121 samsung,pins = "gpk1-3"; 2122 samsung,pin-function = < 0x02 >; 2123 samsung,pin-pud = < 0x03 >; 2124 samsung,pin-drv = < 0x03 >; 2125 }; 2126 2127 sd1-bus-width4 { 2128 samsung,pins = "gpk1-3\0gpk1-4\0gpk1-5\0gpk1-6"; 2129 samsung,pin-function = < 0x02 >; 2130 samsung,pin-pud = < 0x03 >; 2131 samsung,pin-drv = < 0x03 >; 2132 }; 2133 2134 sd2-clk { 2135 samsung,pins = "gpk2-0"; 2136 samsung,pin-function = < 0x02 >; 2137 samsung,pin-pud = < 0x00 >; 2138 samsung,pin-drv = < 0x03 >; 2139 phandle = < 0x1a >; 2140 }; 2141 2142 sd2-cmd { 2143 samsung,pins = "gpk2-1"; 2144 samsung,pin-function = < 0x02 >; 2145 samsung,pin-pud = < 0x00 >; 2146 samsung,pin-drv = < 0x03 >; 2147 phandle = < 0x1b >; 2148 }; 2149 2150 sd2-cd { 2151 samsung,pins = "gpk2-2"; 2152 samsung,pin-function = < 0x02 >; 2153 samsung,pin-pud = < 0x03 >; 2154 samsung,pin-drv = < 0x03 >; 2155 phandle = < 0x1c >; 2156 }; 2157 2158 sd2-bus-width1 { 2159 samsung,pins = "gpk2-3"; 2160 samsung,pin-function = < 0x02 >; 2161 samsung,pin-pud = < 0x03 >; 2162 samsung,pin-drv = < 0x03 >; 2163 }; 2164 2165 sd2-bus-width4 { 2166 samsung,pins = "gpk2-3\0gpk2-4\0gpk2-5\0gpk2-6"; 2167 samsung,pin-function = < 0x02 >; 2168 samsung,pin-pud = < 0x03 >; 2169 samsung,pin-drv = < 0x03 >; 2170 phandle = < 0x1d >; 2171 }; 2172 2173 sd2-bus-width8 { 2174 samsung,pins = "gpk3-3\0gpk3-4\0gpk3-5\0gpk3-6"; 2175 samsung,pin-function = < 0x03 >; 2176 samsung,pin-pud = < 0x03 >; 2177 samsung,pin-drv = < 0x03 >; 2178 }; 2179 2180 sd3-clk { 2181 samsung,pins = "gpk3-0"; 2182 samsung,pin-function = < 0x02 >; 2183 samsung,pin-pud = < 0x00 >; 2184 samsung,pin-drv = < 0x03 >; 2185 }; 2186 2187 sd3-cmd { 2188 samsung,pins = "gpk3-1"; 2189 samsung,pin-function = < 0x02 >; 2190 samsung,pin-pud = < 0x00 >; 2191 samsung,pin-drv = < 0x03 >; 2192 }; 2193 2194 sd3-cd { 2195 samsung,pins = "gpk3-2"; 2196 samsung,pin-function = < 0x02 >; 2197 samsung,pin-pud = < 0x03 >; 2198 samsung,pin-drv = < 0x03 >; 2199 }; 2200 2201 sd3-bus-width1 { 2202 samsung,pins = "gpk3-3"; 2203 samsung,pin-function = < 0x02 >; 2204 samsung,pin-pud = < 0x03 >; 2205 samsung,pin-drv = < 0x03 >; 2206 }; 2207 2208 sd3-bus-width4 { 2209 samsung,pins = "gpk3-3\0gpk3-4\0gpk3-5\0gpk3-6"; 2210 samsung,pin-function = < 0x02 >; 2211 samsung,pin-pud = < 0x03 >; 2212 samsung,pin-drv = < 0x03 >; 2213 }; 2214 2215 cam-port-b-io { 2216 samsung,pins = "gpm0-0\0gpm0-1\0gpm0-2\0gpm0-3\0gpm0-4\0gpm0-5\0gpm0-6\0gpm0-7\0gpm1-0\0gpm1-1\0gpm2-0\0gpm2-1"; 2217 samsung,pin-function = < 0x03 >; 2218 samsung,pin-pud = < 0x03 >; 2219 samsung,pin-drv = < 0x00 >; 2220 }; 2221 2222 cam-port-b-clk-active { 2223 samsung,pins = "gpm2-2"; 2224 samsung,pin-function = < 0x03 >; 2225 samsung,pin-pud = < 0x00 >; 2226 samsung,pin-drv = < 0x03 >; 2227 }; 2228 2229 cam-port-b-clk-idle { 2230 samsung,pins = "gpm2-2"; 2231 samsung,pin-function = < 0x00 >; 2232 samsung,pin-pud = < 0x01 >; 2233 samsung,pin-drv = < 0x00 >; 2234 }; 2235 2236 ext-int0 { 2237 samsung,pins = "gpx0-0"; 2238 samsung,pin-function = < 0x0f >; 2239 samsung,pin-pud = < 0x00 >; 2240 samsung,pin-drv = < 0x00 >; 2241 }; 2242 2243 ext-int8 { 2244 samsung,pins = "gpx1-0"; 2245 samsung,pin-function = < 0x0f >; 2246 samsung,pin-pud = < 0x00 >; 2247 samsung,pin-drv = < 0x00 >; 2248 }; 2249 2250 ext-int15 { 2251 samsung,pins = "gpx1-7"; 2252 samsung,pin-function = < 0x0f >; 2253 samsung,pin-pud = < 0x00 >; 2254 samsung,pin-drv = < 0x00 >; 2255 }; 2256 2257 ext-int16 { 2258 samsung,pins = "gpx2-0"; 2259 samsung,pin-function = < 0x0f >; 2260 samsung,pin-pud = < 0x00 >; 2261 samsung,pin-drv = < 0x00 >; 2262 }; 2263 2264 ext-int31 { 2265 samsung,pins = "gpx3-7"; 2266 samsung,pin-function = < 0x0f >; 2267 samsung,pin-pud = < 0x00 >; 2268 samsung,pin-drv = < 0x00 >; 2269 }; 2270 2271 fimc-is-i2c0 { 2272 samsung,pins = "gpm4-0\0gpm4-1"; 2273 samsung,pin-function = < 0x02 >; 2274 samsung,pin-pud = < 0x00 >; 2275 samsung,pin-drv = < 0x00 >; 2276 }; 2277 2278 fimc-is-i2c1 { 2279 samsung,pins = "gpm4-2\0gpm4-3"; 2280 samsung,pin-function = < 0x02 >; 2281 samsung,pin-pud = < 0x00 >; 2282 samsung,pin-drv = < 0x00 >; 2283 }; 2284 2285 fimc-is-uart { 2286 samsung,pins = "gpm3-5\0gpm3-7"; 2287 samsung,pin-function = < 0x03 >; 2288 samsung,pin-pud = < 0x00 >; 2289 samsung,pin-drv = < 0x00 >; 2290 }; 2291 2292 hdmi-cec { 2293 samsung,pins = "gpx3-6"; 2294 samsung,pin-function = < 0x03 >; 2295 samsung,pin-pud = < 0x00 >; 2296 samsung,pin-drv = < 0x00 >; 2297 phandle = < 0x42 >; 2298 }; 2299 2300 power_key { 2301 samsung,pins = "gpx1-3"; 2302 samsung,pin-pud = < 0x00 >; 2303 phandle = < 0x61 >; 2304 }; 2305 2306 max77686-irq { 2307 samsung,pins = "gpx3-2"; 2308 samsung,pin-function = < 0x00 >; 2309 samsung,pin-pud = < 0x00 >; 2310 samsung,pin-drv = < 0x00 >; 2311 phandle = < 0x2c >; 2312 }; 2313 2314 hdmi-hpd { 2315 samsung,pins = "gpx3-7"; 2316 samsung,pin-pud = < 0x01 >; 2317 phandle = < 0x3e >; 2318 }; 2319 2320 home_key { 2321 samsung,pins = "gpx2-2"; 2322 samsung,pin-pud = < 0x00 >; 2323 phandle = < 0x62 >; 2324 }; 2325 }; 2326 2327 pinctrl@3860000 { 2328 compatible = "samsung,exynos4x12-pinctrl"; 2329 reg = < 0x3860000 0x1000 >; 2330 interrupt-parent = < 0x09 >; 2331 interrupts = < 0x0a 0x00 >; 2332 2333 gpz { 2334 gpio-controller; 2335 #gpio-cells = < 0x02 >; 2336 interrupt-controller; 2337 #interrupt-cells = < 0x02 >; 2338 }; 2339 2340 i2s0-bus { 2341 samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4\0gpz-5\0gpz-6"; 2342 samsung,pin-function = < 0x02 >; 2343 samsung,pin-pud = < 0x00 >; 2344 samsung,pin-drv = < 0x00 >; 2345 phandle = < 0x05 >; 2346 }; 2347 2348 pcm0-bus { 2349 samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4"; 2350 samsung,pin-function = < 0x03 >; 2351 samsung,pin-pud = < 0x00 >; 2352 samsung,pin-drv = < 0x00 >; 2353 }; 2354 }; 2355 2356 pinctrl@106e0000 { 2357 compatible = "samsung,exynos4x12-pinctrl"; 2358 reg = < 0x106e0000 0x1000 >; 2359 interrupts = < 0x00 0x48 0x04 >; 2360 2361 gpv0 { 2362 gpio-controller; 2363 #gpio-cells = < 0x02 >; 2364 interrupt-controller; 2365 #interrupt-cells = < 0x02 >; 2366 }; 2367 2368 gpv1 { 2369 gpio-controller; 2370 #gpio-cells = < 0x02 >; 2371 interrupt-controller; 2372 #interrupt-cells = < 0x02 >; 2373 }; 2374 2375 gpv2 { 2376 gpio-controller; 2377 #gpio-cells = < 0x02 >; 2378 interrupt-controller; 2379 #interrupt-cells = < 0x02 >; 2380 }; 2381 2382 gpv3 { 2383 gpio-controller; 2384 #gpio-cells = < 0x02 >; 2385 interrupt-controller; 2386 #interrupt-cells = < 0x02 >; 2387 }; 2388 2389 gpv4 { 2390 gpio-controller; 2391 #gpio-cells = < 0x02 >; 2392 interrupt-controller; 2393 #interrupt-cells = < 0x02 >; 2394 }; 2395 2396 c2c-bus { 2397 samsung,pins = "gpv0-0\0gpv0-1\0gpv0-2\0gpv0-3\0gpv0-4\0gpv0-5\0gpv0-6\0gpv0-7\0gpv1-0\0gpv1-1\0gpv1-2\0gpv1-3\0gpv1-4\0gpv1-5\0gpv1-6\0gpv1-7\0gpv2-0\0gpv2-1\0gpv2-2\0gpv2-3\0gpv2-4\0gpv2-5\0gpv2-6\0gpv2-7\0gpv3-0\0gpv3-1\0gpv3-2\0gpv3-3\0gpv3-4\0gpv3-5\0gpv3-6\0gpv3-7\0gpv4-0\0gpv4-1"; 2398 samsung,pin-function = < 0x02 >; 2399 samsung,pin-pud = < 0x00 >; 2400 samsung,pin-drv = < 0x00 >; 2401 }; 2402 }; 2403 2404 sysram@2020000 { 2405 compatible = "mmio-sram"; 2406 reg = < 0x2020000 0x40000 >; 2407 #address-cells = < 0x01 >; 2408 #size-cells = < 0x01 >; 2409 ranges = < 0x00 0x2020000 0x40000 >; 2410 2411 smp-sysram@0 { 2412 compatible = "samsung,exynos4210-sysram"; 2413 reg = < 0x00 0x1000 >; 2414 }; 2415 2416 smp-sysram@2f000 { 2417 compatible = "samsung,exynos4210-sysram-ns"; 2418 reg = < 0x2f000 0x1000 >; 2419 }; 2420 }; 2421 2422 isp-power-domain@10023ca0 { 2423 compatible = "samsung,exynos4210-pd"; 2424 reg = < 0x10023ca0 0x20 >; 2425 #power-domain-cells = < 0x00 >; 2426 label = "ISP"; 2427 phandle = < 0x11 >; 2428 }; 2429 2430 l2-cache-controller@10502000 { 2431 compatible = "arm,pl310-cache"; 2432 reg = < 0x10502000 0x1000 >; 2433 cache-unified; 2434 cache-level = < 0x02 >; 2435 arm,tag-latency = < 0x02 0x02 0x01 >; 2436 arm,data-latency = < 0x03 0x02 0x01 >; 2437 arm,double-linefill = < 0x01 >; 2438 arm,double-linefill-incr = < 0x00 >; 2439 arm,double-linefill-wrap = < 0x01 >; 2440 arm,prefetch-drop = < 0x01 >; 2441 arm,prefetch-offset = < 0x07 >; 2442 }; 2443 2444 clock-controller@10030000 { 2445 compatible = "samsung,exynos4412-clock"; 2446 reg = < 0x10030000 0x18000 >; 2447 #clock-cells = < 0x01 >; 2448 assigned-clocks = < 0x02 0x06 >; 2449 assigned-clock-rates = < 0x2b11001 >; 2450 phandle = < 0x02 >; 2451 }; 2452 2453 clock-controller@10048000 { 2454 compatible = "samsung,exynos4412-isp-clock"; 2455 reg = < 0x10048000 0x1000 >; 2456 #clock-cells = < 0x01 >; 2457 power-domains = < 0x11 >; 2458 clocks = < 0x02 0x0d 0x02 0x18b >; 2459 clock-names = "aclk200\0aclk400_mcuisp"; 2460 phandle = < 0x12 >; 2461 }; 2462 2463 mct@10050000 { 2464 compatible = "samsung,exynos4412-mct"; 2465 reg = < 0x10050000 0x800 >; 2466 interrupt-parent = < 0x44 >; 2467 interrupts = < 0x00 0x01 0x02 0x03 0x04 >; 2468 clocks = < 0x02 0x03 0x02 0x158 >; 2469 clock-names = "fin_pll\0mct"; 2470 2471 mct-map { 2472 #interrupt-cells = < 0x01 >; 2473 #address-cells = < 0x00 >; 2474 #size-cells = < 0x00 >; 2475 interrupt-map = < 0x00 0x01 0x00 0x39 0x04 0x01 0x09 0x0c 0x05 0x02 0x09 0x0c 0x06 0x03 0x09 0x0c 0x07 0x04 0x01 0x01 0x0c 0x04 >; 2476 phandle = < 0x44 >; 2477 }; 2478 }; 2479 2480 watchdog@10060000 { 2481 compatible = "samsung,exynos5250-wdt"; 2482 reg = < 0x10060000 0x100 >; 2483 interrupts = < 0x00 0x2b 0x04 >; 2484 clocks = < 0x02 0x159 >; 2485 clock-names = "watchdog"; 2486 samsung,syscon-phandle = < 0x07 >; 2487 }; 2488 2489 adc@126c0000 { 2490 compatible = "samsung,exynos-adc-v1"; 2491 reg = < 0x126c0000 0x100 >; 2492 interrupt-parent = < 0x09 >; 2493 interrupts = < 0x0a 0x03 >; 2494 clocks = < 0x02 0x146 >; 2495 clock-names = "adc"; 2496 #io-channel-cells = < 0x01 >; 2497 io-channel-ranges; 2498 samsung,syscon-phandle = < 0x07 >; 2499 status = "okay"; 2500 vdd-supply = < 0x39 >; 2501 }; 2502 2503 g2d@10800000 { 2504 compatible = "samsung,exynos4212-g2d"; 2505 reg = < 0x10800000 0x1000 >; 2506 interrupts = < 0x00 0x59 0x04 >; 2507 clocks = < 0x02 0xb1 0x02 0x115 >; 2508 clock-names = "sclk_fimg2d\0fimg2d"; 2509 iommus = < 0x45 >; 2510 }; 2511 2512 mmc@12550000 { 2513 compatible = "samsung,exynos4412-dw-mshc"; 2514 reg = < 0x12550000 0x1000 >; 2515 interrupts = < 0x00 0x4d 0x04 >; 2516 #address-cells = < 0x01 >; 2517 #size-cells = < 0x00 >; 2518 fifo-depth = < 0x80 >; 2519 clocks = < 0x02 0x12d 0x02 0x95 >; 2520 clock-names = "biu\0ciu"; 2521 status = "okay"; 2522 pinctrl-0 = < 0x46 0x47 0x48 0x49 >; 2523 pinctrl-names = "default"; 2524 vmmc-supply = < 0x4a >; 2525 mmc-pwrseq = < 0x4b >; 2526 broken-cd; 2527 card-detect-delay = < 0xc8 >; 2528 samsung,dw-mshc-ciu-div = < 0x03 >; 2529 samsung,dw-mshc-sdr-timing = < 0x02 0x03 >; 2530 samsung,dw-mshc-ddr-timing = < 0x01 0x02 >; 2531 bus-width = < 0x08 >; 2532 cap-mmc-highspeed; 2533 vqmmc-supply = < 0x4c >; 2534 }; 2535 2536 sysmmu@10a40000 { 2537 compatible = "samsung,exynos-sysmmu"; 2538 reg = < 0x10a40000 0x1000 >; 2539 interrupt-parent = < 0x09 >; 2540 interrupts = < 0x04 0x07 >; 2541 clock-names = "sysmmu\0master"; 2542 clocks = < 0x02 0x118 0x02 0x115 >; 2543 #iommu-cells = < 0x00 >; 2544 phandle = < 0x45 >; 2545 }; 2546 2547 sysmmu@12260000 { 2548 compatible = "samsung,exynos-sysmmu"; 2549 reg = < 0x12260000 0x1000 >; 2550 interrupt-parent = < 0x09 >; 2551 interrupts = < 0x10 0x02 >; 2552 power-domains = < 0x11 >; 2553 clock-names = "sysmmu"; 2554 clocks = < 0x12 0x08 >; 2555 #iommu-cells = < 0x00 >; 2556 phandle = < 0x15 >; 2557 }; 2558 2559 sysmmu@12270000 { 2560 compatible = "samsung,exynos-sysmmu"; 2561 reg = < 0x12270000 0x1000 >; 2562 interrupt-parent = < 0x09 >; 2563 interrupts = < 0x10 0x03 >; 2564 power-domains = < 0x11 >; 2565 clock-names = "sysmmu"; 2566 clocks = < 0x12 0x09 >; 2567 #iommu-cells = < 0x00 >; 2568 phandle = < 0x16 >; 2569 }; 2570 2571 sysmmu@122a0000 { 2572 compatible = "samsung,exynos-sysmmu"; 2573 reg = < 0x122a0000 0x1000 >; 2574 interrupt-parent = < 0x09 >; 2575 interrupts = < 0x10 0x04 >; 2576 power-domains = < 0x11 >; 2577 clock-names = "sysmmu"; 2578 clocks = < 0x12 0x0a >; 2579 #iommu-cells = < 0x00 >; 2580 phandle = < 0x17 >; 2581 }; 2582 2583 sysmmu@122b0000 { 2584 compatible = "samsung,exynos-sysmmu"; 2585 reg = < 0x122b0000 0x1000 >; 2586 interrupt-parent = < 0x09 >; 2587 interrupts = < 0x10 0x05 >; 2588 power-domains = < 0x11 >; 2589 clock-names = "sysmmu"; 2590 clocks = < 0x12 0x18 >; 2591 #iommu-cells = < 0x00 >; 2592 phandle = < 0x18 >; 2593 }; 2594 2595 sysmmu@123b0000 { 2596 compatible = "samsung,exynos-sysmmu"; 2597 reg = < 0x123b0000 0x1000 >; 2598 interrupt-parent = < 0x09 >; 2599 interrupts = < 0x10 0x00 >; 2600 power-domains = < 0x11 >; 2601 clock-names = "sysmmu\0master"; 2602 clocks = < 0x12 0x0b 0x12 0x04 >; 2603 #iommu-cells = < 0x00 >; 2604 phandle = < 0x13 >; 2605 }; 2606 2607 sysmmu@123c0000 { 2608 compatible = "samsung,exynos-sysmmu"; 2609 reg = < 0x123c0000 0x1000 >; 2610 interrupt-parent = < 0x09 >; 2611 interrupts = < 0x10 0x01 >; 2612 power-domains = < 0x11 >; 2613 clock-names = "sysmmu\0master"; 2614 clocks = < 0x12 0x0c 0x12 0x05 >; 2615 #iommu-cells = < 0x00 >; 2616 phandle = < 0x14 >; 2617 }; 2618 2619 bus_dmc { 2620 compatible = "samsung,exynos-bus"; 2621 clocks = < 0x02 0x1c9 >; 2622 clock-names = "bus"; 2623 operating-points-v2 = < 0x4d >; 2624 status = "okay"; 2625 devfreq-events = < 0x4e 0x4f >; 2626 vdd-supply = < 0x50 >; 2627 phandle = < 0x52 >; 2628 }; 2629 2630 bus_acp { 2631 compatible = "samsung,exynos-bus"; 2632 clocks = < 0x02 0x1c8 >; 2633 clock-names = "bus"; 2634 operating-points-v2 = < 0x51 >; 2635 status = "okay"; 2636 devfreq = < 0x52 >; 2637 }; 2638 2639 bus_c2c { 2640 compatible = "samsung,exynos-bus"; 2641 clocks = < 0x02 0x1ca >; 2642 clock-names = "bus"; 2643 operating-points-v2 = < 0x4d >; 2644 status = "okay"; 2645 devfreq = < 0x52 >; 2646 }; 2647 2648 opp_table1 { 2649 compatible = "operating-points-v2"; 2650 opp-shared; 2651 phandle = < 0x4d >; 2652 2653 opp-100000000 { 2654 opp-hz = < 0x00 0x5f5e100 >; 2655 opp-microvolt = < 0xdbba0 >; 2656 }; 2657 2658 opp-134000000 { 2659 opp-hz = < 0x00 0x7fcad80 >; 2660 opp-microvolt = < 0xdbba0 >; 2661 }; 2662 2663 opp-160000000 { 2664 opp-hz = < 0x00 0x9896800 >; 2665 opp-microvolt = < 0xdbba0 >; 2666 }; 2667 2668 opp-267000000 { 2669 opp-hz = < 0x00 0xfea18c0 >; 2670 opp-microvolt = < 0xe7ef0 >; 2671 }; 2672 2673 opp-400000000 { 2674 opp-hz = < 0x00 0x17d78400 >; 2675 opp-microvolt = < 0x100590 >; 2676 }; 2677 }; 2678 2679 opp_table2 { 2680 compatible = "operating-points-v2"; 2681 opp-shared; 2682 phandle = < 0x51 >; 2683 2684 opp-100000000 { 2685 opp-hz = < 0x00 0x5f5e100 >; 2686 }; 2687 2688 opp-134000000 { 2689 opp-hz = < 0x00 0x7fcad80 >; 2690 }; 2691 2692 opp-160000000 { 2693 opp-hz = < 0x00 0x9896800 >; 2694 }; 2695 2696 opp-267000000 { 2697 opp-hz = < 0x00 0xfea18c0 >; 2698 }; 2699 }; 2700 2701 bus_leftbus { 2702 compatible = "samsung,exynos-bus"; 2703 clocks = < 0x02 0x1cb >; 2704 clock-names = "bus"; 2705 operating-points-v2 = < 0x53 >; 2706 status = "okay"; 2707 devfreq-events = < 0x54 0x55 >; 2708 vdd-supply = < 0x56 >; 2709 phandle = < 0x57 >; 2710 }; 2711 2712 bus_rightbus { 2713 compatible = "samsung,exynos-bus"; 2714 clocks = < 0x02 0x1cc >; 2715 clock-names = "bus"; 2716 operating-points-v2 = < 0x53 >; 2717 status = "okay"; 2718 devfreq = < 0x57 >; 2719 }; 2720 2721 bus_display { 2722 compatible = "samsung,exynos-bus"; 2723 clocks = < 0x02 0x0f >; 2724 clock-names = "bus"; 2725 operating-points-v2 = < 0x58 >; 2726 status = "okay"; 2727 devfreq = < 0x57 >; 2728 }; 2729 2730 bus_fsys { 2731 compatible = "samsung,exynos-bus"; 2732 clocks = < 0x02 0x10 >; 2733 clock-names = "bus"; 2734 operating-points-v2 = < 0x59 >; 2735 status = "okay"; 2736 devfreq = < 0x57 >; 2737 }; 2738 2739 bus_peri { 2740 compatible = "samsung,exynos-bus"; 2741 clocks = < 0x02 0x0e >; 2742 clock-names = "bus"; 2743 operating-points-v2 = < 0x5a >; 2744 status = "okay"; 2745 devfreq = < 0x57 >; 2746 }; 2747 2748 bus_mfc { 2749 compatible = "samsung,exynos-bus"; 2750 clocks = < 0x02 0xaa >; 2751 clock-names = "bus"; 2752 operating-points-v2 = < 0x53 >; 2753 status = "okay"; 2754 devfreq = < 0x57 >; 2755 }; 2756 2757 opp_table3 { 2758 compatible = "operating-points-v2"; 2759 opp-shared; 2760 phandle = < 0x53 >; 2761 2762 opp-100000000 { 2763 opp-hz = < 0x00 0x5f5e100 >; 2764 opp-microvolt = < 0xdbba0 >; 2765 }; 2766 2767 opp-134000000 { 2768 opp-hz = < 0x00 0x7fcad80 >; 2769 opp-microvolt = < 0xe1d48 >; 2770 }; 2771 2772 opp-160000000 { 2773 opp-hz = < 0x00 0x9896800 >; 2774 opp-microvolt = < 0xe7ef0 >; 2775 }; 2776 2777 opp-200000000 { 2778 opp-hz = < 0x00 0xbebc200 >; 2779 opp-microvolt = < 0xf4240 >; 2780 }; 2781 }; 2782 2783 opp_table4 { 2784 compatible = "operating-points-v2"; 2785 opp-shared; 2786 phandle = < 0x58 >; 2787 2788 opp-160000000 { 2789 opp-hz = < 0x00 0x9896800 >; 2790 }; 2791 2792 opp-200000000 { 2793 opp-hz = < 0x00 0xbebc200 >; 2794 }; 2795 }; 2796 2797 opp_table5 { 2798 compatible = "operating-points-v2"; 2799 opp-shared; 2800 phandle = < 0x59 >; 2801 2802 opp-100000000 { 2803 opp-hz = < 0x00 0x5f5e100 >; 2804 }; 2805 2806 opp-134000000 { 2807 opp-hz = < 0x00 0x7fcad80 >; 2808 }; 2809 }; 2810 2811 opp_table6 { 2812 compatible = "operating-points-v2"; 2813 opp-shared; 2814 phandle = < 0x5a >; 2815 2816 opp-50000000 { 2817 opp-hz = < 0x00 0x2faf080 >; 2818 }; 2819 2820 opp-100000000 { 2821 opp-hz = < 0x00 0x5f5e100 >; 2822 }; 2823 }; 2824 }; 2825 2826 thermal-zones { 2827 2828 cpu-thermal { 2829 thermal-sensors = < 0x5b 0x00 >; 2830 polling-delay-passive = < 0x00 >; 2831 polling-delay = < 0x00 >; 2832 2833 trips { 2834 2835 cpu-alert-0 { 2836 temperature = < 0x11170 >; 2837 hysteresis = < 0x2710 >; 2838 type = "active"; 2839 phandle = < 0x5c >; 2840 }; 2841 2842 cpu-alert-1 { 2843 temperature = < 0x17318 >; 2844 hysteresis = < 0x2710 >; 2845 type = "active"; 2846 phandle = < 0x5e >; 2847 }; 2848 2849 cpu-alert-2 { 2850 temperature = < 0x1adb0 >; 2851 hysteresis = < 0x2710 >; 2852 type = "active"; 2853 }; 2854 2855 cpu-crit-0 { 2856 temperature = < 0x1d4c0 >; 2857 hysteresis = < 0x00 >; 2858 type = "critical"; 2859 }; 2860 }; 2861 2862 cooling-maps { 2863 2864 map0 { 2865 trip = < 0x5c >; 2866 cooling-device = < 0x5d 0x07 0x07 >; 2867 }; 2868 2869 map1 { 2870 trip = < 0x5e >; 2871 cooling-device = < 0x5d 0x0d 0x0d >; 2872 }; 2873 }; 2874 }; 2875 }; 2876 2877 cpus { 2878 #address-cells = < 0x01 >; 2879 #size-cells = < 0x00 >; 2880 2881 cpu@a00 { 2882 device_type = "cpu"; 2883 compatible = "arm,cortex-a9"; 2884 reg = < 0xa00 >; 2885 clocks = < 0x02 0x0c >; 2886 clock-names = "cpu"; 2887 operating-points-v2 = < 0x5f >; 2888 #cooling-cells = < 0x02 >; 2889 cpu0-supply = < 0x60 >; 2890 phandle = < 0x5d >; 2891 }; 2892 2893 cpu@a01 { 2894 device_type = "cpu"; 2895 compatible = "arm,cortex-a9"; 2896 reg = < 0xa01 >; 2897 clocks = < 0x02 0x0c >; 2898 clock-names = "cpu"; 2899 operating-points-v2 = < 0x5f >; 2900 #cooling-cells = < 0x02 >; 2901 }; 2902 2903 cpu@a02 { 2904 device_type = "cpu"; 2905 compatible = "arm,cortex-a9"; 2906 reg = < 0xa02 >; 2907 clocks = < 0x02 0x0c >; 2908 clock-names = "cpu"; 2909 operating-points-v2 = < 0x5f >; 2910 #cooling-cells = < 0x02 >; 2911 }; 2912 2913 cpu@a03 { 2914 device_type = "cpu"; 2915 compatible = "arm,cortex-a9"; 2916 reg = < 0xa03 >; 2917 clocks = < 0x02 0x0c >; 2918 clock-names = "cpu"; 2919 operating-points-v2 = < 0x5f >; 2920 #cooling-cells = < 0x02 >; 2921 }; 2922 }; 2923 2924 opp_table0 { 2925 compatible = "operating-points-v2"; 2926 opp-shared; 2927 phandle = < 0x5f >; 2928 2929 opp-200000000 { 2930 opp-hz = < 0x00 0xbebc200 >; 2931 opp-microvolt = < 0xdbba0 >; 2932 clock-latency-ns = < 0x30d40 >; 2933 }; 2934 2935 opp-300000000 { 2936 opp-hz = < 0x00 0x11e1a300 >; 2937 opp-microvolt = < 0xdbba0 >; 2938 clock-latency-ns = < 0x30d40 >; 2939 }; 2940 2941 opp-400000000 { 2942 opp-hz = < 0x00 0x17d78400 >; 2943 opp-microvolt = < 0xe1d48 >; 2944 clock-latency-ns = < 0x30d40 >; 2945 }; 2946 2947 opp-500000000 { 2948 opp-hz = < 0x00 0x1dcd6500 >; 2949 opp-microvolt = < 0xe7ef0 >; 2950 clock-latency-ns = < 0x30d40 >; 2951 }; 2952 2953 opp-600000000 { 2954 opp-hz = < 0x00 0x23c34600 >; 2955 opp-microvolt = < 0xee098 >; 2956 clock-latency-ns = < 0x30d40 >; 2957 }; 2958 2959 opp-700000000 { 2960 opp-hz = < 0x00 0x29b92700 >; 2961 opp-microvolt = < 0xf116c >; 2962 clock-latency-ns = < 0x30d40 >; 2963 }; 2964 2965 opp-800000000 { 2966 opp-hz = < 0x00 0x2faf0800 >; 2967 opp-microvolt = < 0xf4240 >; 2968 clock-latency-ns = < 0x30d40 >; 2969 opp-suspend; 2970 }; 2971 2972 opp-900000000 { 2973 opp-hz = < 0x00 0x35a4e900 >; 2974 opp-microvolt = < 0xfd4bc >; 2975 clock-latency-ns = < 0x30d40 >; 2976 }; 2977 2978 opp-1000000000 { 2979 opp-hz = < 0x00 0x3b9aca00 >; 2980 opp-microvolt = < 0x10980c >; 2981 clock-latency-ns = < 0x30d40 >; 2982 }; 2983 2984 opp-1100000000 { 2985 opp-hz = < 0x00 0x4190ab00 >; 2986 opp-microvolt = < 0x115b5c >; 2987 clock-latency-ns = < 0x30d40 >; 2988 }; 2989 2990 opp-1200000000 { 2991 opp-hz = < 0x00 0x47868c00 >; 2992 opp-microvolt = < 0x121eac >; 2993 clock-latency-ns = < 0x30d40 >; 2994 }; 2995 2996 opp-1300000000 { 2997 opp-hz = < 0x00 0x4d7c6d00 >; 2998 opp-microvolt = < 0x1312d0 >; 2999 clock-latency-ns = < 0x30d40 >; 3000 }; 3001 3002 opp-1400000000 { 3003 opp-hz = < 0x00 0x53724e00 >; 3004 opp-microvolt = < 0x13a54c >; 3005 clock-latency-ns = < 0x30d40 >; 3006 }; 3007 3008 opp-1500000000 { 3009 opp-hz = < 0x00 0x59682f00 >; 3010 opp-microvolt = < 0x149970 >; 3011 clock-latency-ns = < 0x30d40 >; 3012 turbo-mode; 3013 }; 3014 }; 3015 3016 reserved-memory { 3017 #address-cells = < 0x01 >; 3018 #size-cells = < 0x01 >; 3019 ranges; 3020 3021 region_mfc_left { 3022 compatible = "shared-dma-pool"; 3023 no-map; 3024 size = < 0x2400000 >; 3025 alignment = < 0x100000 >; 3026 phandle = < 0x28 >; 3027 }; 3028 3029 region_mfc_right { 3030 compatible = "shared-dma-pool"; 3031 no-map; 3032 size = < 0x800000 >; 3033 alignment = < 0x100000 >; 3034 phandle = < 0x29 >; 3035 }; 3036 }; 3037 3038 chosen { 3039 stdout-path = "/soc/serial@13810000"; 3040 }; 3041 3042 firmware@204f000 { 3043 compatible = "samsung,secure-firmware"; 3044 reg = < 0x204f000 0x1000 >; 3045 }; 3046 3047 gpio_keys { 3048 compatible = "gpio-keys"; 3049 pinctrl-names = "default"; 3050 pinctrl-0 = < 0x61 0x62 >; 3051 3052 power_key { 3053 gpios = < 0x63 0x03 0x01 >; 3054 linux,code = < 0x74 >; 3055 label = "power key"; 3056 debounce-interval = < 0x0a >; 3057 wakeup-source; 3058 }; 3059 3060 home_key { 3061 gpios = < 0x64 0x02 0x00 >; 3062 linux,code = < 0x66 >; 3063 label = "home key"; 3064 debounce-interval = < 0x0a >; 3065 wakeup-source; 3066 }; 3067 }; 3068 3069 sound { 3070 compatible = "hardkernel,odroid-xu4-audio"; 3071 model = "Odroid-X"; 3072 samsung,audio-widgets = "Headphone\0Headphone Jack\0Microphone\0Mic Jack\0Microphone\0DMIC"; 3073 samsung,audio-routing = "Headphone Jack\0HPL\0Headphone Jack\0HPR\0IN1\0Mic Jack\0Mic Jack\0MICBIAS"; 3074 3075 cpu { 3076 sound-dai = < 0x06 0x00 >; 3077 }; 3078 3079 codec { 3080 sound-dai = < 0x41 0x65 >; 3081 }; 3082 }; 3083 3084 pwrseq { 3085 pinctrl-0 = < 0x66 >; 3086 pinctrl-names = "default"; 3087 compatible = "mmc-pwrseq-emmc"; 3088 reset-gpios = < 0x67 0x02 0x01 >; 3089 phandle = < 0x4b >; 3090 }; 3091 3092 fixed-rate-clocks { 3093 3094 xxti { 3095 compatible = "samsung,clock-xxti"; 3096 clock-frequency = < 0x00 >; 3097 }; 3098 3099 xusbxti { 3100 compatible = "samsung,clock-xusbxti"; 3101 clock-frequency = < 0x16e3600 >; 3102 }; 3103 }; 3104 3105 memory@40000000 { 3106 device_type = "memory"; 3107 reg = < 0x40000000 0x3ff00000 >; 3108 }; 3109 3110 leds { 3111 compatible = "gpio-leds"; 3112 3113 led1 { 3114 label = "led1:heart"; 3115 gpios = < 0x68 0x00 0x01 >; 3116 default-state = "on"; 3117 linux,default-trigger = "heartbeat"; 3118 }; 3119 3120 led2 { 3121 label = "led2:mmc0"; 3122 gpios = < 0x68 0x02 0x01 >; 3123 default-state = "on"; 3124 linux,default-trigger = "mmc0"; 3125 }; 3126 }; 3127 3128 regulator_p3v3 { 3129 compatible = "regulator-fixed"; 3130 regulator-name = "p3v3_en"; 3131 regulator-min-microvolt = < 0x325aa0 >; 3132 regulator-max-microvolt = < 0x325aa0 >; 3133 gpio = < 0x69 0x01 0x01 >; 3134 enable-active-high; 3135 regulator-always-on; 3136 }; 3137}; 3138