1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 compatible = "avnet,ultra96-rev1\0avnet,ultra96\0xlnx,zynqmp-zcu100-revC\0xlnx,zynqmp-zcu100\0xlnx,zynqmp"; 15 #address-cells = < 0x02 >; 16 #size-cells = < 0x02 >; 17 model = "Avnet Ultra96 Rev1"; 18 19 cpus { 20 #address-cells = < 0x01 >; 21 #size-cells = < 0x00 >; 22 23 cpu@0 { 24 compatible = "arm,cortex-a53\0arm,armv8"; 25 device_type = "cpu"; 26 enable-method = "psci"; 27 operating-points-v2 = < 0x01 >; 28 reg = < 0x00 >; 29 cpu-idle-states = < 0x02 >; 30 }; 31 32 cpu@1 { 33 compatible = "arm,cortex-a53\0arm,armv8"; 34 device_type = "cpu"; 35 enable-method = "psci"; 36 reg = < 0x01 >; 37 operating-points-v2 = < 0x01 >; 38 cpu-idle-states = < 0x02 >; 39 }; 40 41 cpu@2 { 42 compatible = "arm,cortex-a53\0arm,armv8"; 43 device_type = "cpu"; 44 enable-method = "psci"; 45 reg = < 0x02 >; 46 operating-points-v2 = < 0x01 >; 47 cpu-idle-states = < 0x02 >; 48 }; 49 50 cpu@3 { 51 compatible = "arm,cortex-a53\0arm,armv8"; 52 device_type = "cpu"; 53 enable-method = "psci"; 54 reg = < 0x03 >; 55 operating-points-v2 = < 0x01 >; 56 cpu-idle-states = < 0x02 >; 57 }; 58 59 idle-states { 60 entry-method = "psci"; 61 62 cpu-sleep-0 { 63 compatible = "arm,idle-state"; 64 arm,psci-suspend-param = < 0x40000000 >; 65 local-timer-stop; 66 entry-latency-us = < 0x12c >; 67 exit-latency-us = < 0x258 >; 68 min-residency-us = < 0x2710 >; 69 phandle = < 0x02 >; 70 }; 71 }; 72 }; 73 74 cpu_opp_table { 75 compatible = "operating-points-v2"; 76 opp-shared; 77 phandle = < 0x01 >; 78 79 opp00 { 80 opp-hz = < 0x00 0x47868bf4 >; 81 opp-microvolt = < 0xf4240 >; 82 clock-latency-ns = < 0x7a120 >; 83 }; 84 85 opp01 { 86 opp-hz = < 0x00 0x23c345fa >; 87 opp-microvolt = < 0xf4240 >; 88 clock-latency-ns = < 0x7a120 >; 89 }; 90 91 opp02 { 92 opp-hz = < 0x00 0x17d783fc >; 93 opp-microvolt = < 0xf4240 >; 94 clock-latency-ns = < 0x7a120 >; 95 }; 96 97 opp03 { 98 opp-hz = < 0x00 0x11e1a2fd >; 99 opp-microvolt = < 0xf4240 >; 100 clock-latency-ns = < 0x7a120 >; 101 }; 102 }; 103 104 dcc { 105 compatible = "arm,dcc"; 106 status = "okay"; 107 }; 108 109 pmu { 110 compatible = "arm,armv8-pmuv3"; 111 interrupt-parent = < 0x03 >; 112 interrupts = < 0x00 0x8f 0x04 0x00 0x90 0x04 0x00 0x91 0x04 0x00 0x92 0x04 >; 113 }; 114 115 psci { 116 compatible = "arm,psci-0.2"; 117 method = "smc"; 118 }; 119 120 timer { 121 compatible = "arm,armv8-timer"; 122 interrupt-parent = < 0x03 >; 123 interrupts = < 0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08 >; 124 }; 125 126 amba_apu@0 { 127 compatible = "simple-bus"; 128 #address-cells = < 0x02 >; 129 #size-cells = < 0x01 >; 130 ranges = < 0x00 0x00 0x00 0x00 0xffffffff >; 131 132 interrupt-controller@f9010000 { 133 compatible = "arm,gic-400\0arm,cortex-a15-gic"; 134 #interrupt-cells = < 0x03 >; 135 reg = < 0x00 0xf9010000 0x10000 0x00 0xf9020000 0x20000 0x00 0xf9040000 0x20000 0x00 0xf9060000 0x20000 >; 136 interrupt-controller; 137 interrupt-parent = < 0x03 >; 138 interrupts = < 0x01 0x09 0xf04 >; 139 phandle = < 0x03 >; 140 }; 141 }; 142 143 amba { 144 compatible = "simple-bus"; 145 #address-cells = < 0x02 >; 146 #size-cells = < 0x02 >; 147 ranges; 148 149 can@ff060000 { 150 compatible = "xlnx,zynq-can-1.0"; 151 status = "disabled"; 152 clock-names = "can_clk\0pclk"; 153 reg = < 0x00 0xff060000 0x00 0x1000 >; 154 interrupts = < 0x00 0x17 0x04 >; 155 interrupt-parent = < 0x03 >; 156 tx-fifo-depth = < 0x40 >; 157 rx-fifo-depth = < 0x40 >; 158 clocks = < 0x04 0x04 >; 159 }; 160 161 can@ff070000 { 162 compatible = "xlnx,zynq-can-1.0"; 163 status = "disabled"; 164 clock-names = "can_clk\0pclk"; 165 reg = < 0x00 0xff070000 0x00 0x1000 >; 166 interrupts = < 0x00 0x18 0x04 >; 167 interrupt-parent = < 0x03 >; 168 tx-fifo-depth = < 0x40 >; 169 rx-fifo-depth = < 0x40 >; 170 clocks = < 0x04 0x04 >; 171 }; 172 173 cci@fd6e0000 { 174 compatible = "arm,cci-400"; 175 reg = < 0x00 0xfd6e0000 0x00 0x9000 >; 176 ranges = < 0x00 0x00 0xfd6e0000 0x10000 >; 177 #address-cells = < 0x01 >; 178 #size-cells = < 0x01 >; 179 180 pmu@9000 { 181 compatible = "arm,cci-400-pmu,r1"; 182 reg = < 0x9000 0x5000 >; 183 interrupt-parent = < 0x03 >; 184 interrupts = < 0x00 0x7b 0x04 0x00 0x7b 0x04 0x00 0x7b 0x04 0x00 0x7b 0x04 0x00 0x7b 0x04 >; 185 }; 186 }; 187 188 dma@fd500000 { 189 status = "disabled"; 190 compatible = "xlnx,zynqmp-dma-1.0"; 191 reg = < 0x00 0xfd500000 0x00 0x1000 >; 192 interrupt-parent = < 0x03 >; 193 interrupts = < 0x00 0x7c 0x04 >; 194 clock-names = "clk_main\0clk_apb"; 195 xlnx,bus-width = < 0x80 >; 196 clocks = < 0x05 0x04 >; 197 }; 198 199 dma@fd510000 { 200 status = "disabled"; 201 compatible = "xlnx,zynqmp-dma-1.0"; 202 reg = < 0x00 0xfd510000 0x00 0x1000 >; 203 interrupt-parent = < 0x03 >; 204 interrupts = < 0x00 0x7d 0x04 >; 205 clock-names = "clk_main\0clk_apb"; 206 xlnx,bus-width = < 0x80 >; 207 clocks = < 0x05 0x04 >; 208 }; 209 210 dma@fd520000 { 211 status = "disabled"; 212 compatible = "xlnx,zynqmp-dma-1.0"; 213 reg = < 0x00 0xfd520000 0x00 0x1000 >; 214 interrupt-parent = < 0x03 >; 215 interrupts = < 0x00 0x7e 0x04 >; 216 clock-names = "clk_main\0clk_apb"; 217 xlnx,bus-width = < 0x80 >; 218 clocks = < 0x05 0x04 >; 219 }; 220 221 dma@fd530000 { 222 status = "disabled"; 223 compatible = "xlnx,zynqmp-dma-1.0"; 224 reg = < 0x00 0xfd530000 0x00 0x1000 >; 225 interrupt-parent = < 0x03 >; 226 interrupts = < 0x00 0x7f 0x04 >; 227 clock-names = "clk_main\0clk_apb"; 228 xlnx,bus-width = < 0x80 >; 229 clocks = < 0x05 0x04 >; 230 }; 231 232 dma@fd540000 { 233 status = "disabled"; 234 compatible = "xlnx,zynqmp-dma-1.0"; 235 reg = < 0x00 0xfd540000 0x00 0x1000 >; 236 interrupt-parent = < 0x03 >; 237 interrupts = < 0x00 0x80 0x04 >; 238 clock-names = "clk_main\0clk_apb"; 239 xlnx,bus-width = < 0x80 >; 240 clocks = < 0x05 0x04 >; 241 }; 242 243 dma@fd550000 { 244 status = "disabled"; 245 compatible = "xlnx,zynqmp-dma-1.0"; 246 reg = < 0x00 0xfd550000 0x00 0x1000 >; 247 interrupt-parent = < 0x03 >; 248 interrupts = < 0x00 0x81 0x04 >; 249 clock-names = "clk_main\0clk_apb"; 250 xlnx,bus-width = < 0x80 >; 251 clocks = < 0x05 0x04 >; 252 }; 253 254 dma@fd560000 { 255 status = "disabled"; 256 compatible = "xlnx,zynqmp-dma-1.0"; 257 reg = < 0x00 0xfd560000 0x00 0x1000 >; 258 interrupt-parent = < 0x03 >; 259 interrupts = < 0x00 0x82 0x04 >; 260 clock-names = "clk_main\0clk_apb"; 261 xlnx,bus-width = < 0x80 >; 262 clocks = < 0x05 0x04 >; 263 }; 264 265 dma@fd570000 { 266 status = "disabled"; 267 compatible = "xlnx,zynqmp-dma-1.0"; 268 reg = < 0x00 0xfd570000 0x00 0x1000 >; 269 interrupt-parent = < 0x03 >; 270 interrupts = < 0x00 0x83 0x04 >; 271 clock-names = "clk_main\0clk_apb"; 272 xlnx,bus-width = < 0x80 >; 273 clocks = < 0x05 0x04 >; 274 }; 275 276 dma@ffa80000 { 277 status = "disabled"; 278 compatible = "xlnx,zynqmp-dma-1.0"; 279 reg = < 0x00 0xffa80000 0x00 0x1000 >; 280 interrupt-parent = < 0x03 >; 281 interrupts = < 0x00 0x4d 0x04 >; 282 clock-names = "clk_main\0clk_apb"; 283 xlnx,bus-width = < 0x40 >; 284 clocks = < 0x05 0x04 >; 285 }; 286 287 dma@ffa90000 { 288 status = "disabled"; 289 compatible = "xlnx,zynqmp-dma-1.0"; 290 reg = < 0x00 0xffa90000 0x00 0x1000 >; 291 interrupt-parent = < 0x03 >; 292 interrupts = < 0x00 0x4e 0x04 >; 293 clock-names = "clk_main\0clk_apb"; 294 xlnx,bus-width = < 0x40 >; 295 clocks = < 0x05 0x04 >; 296 }; 297 298 dma@ffaa0000 { 299 status = "disabled"; 300 compatible = "xlnx,zynqmp-dma-1.0"; 301 reg = < 0x00 0xffaa0000 0x00 0x1000 >; 302 interrupt-parent = < 0x03 >; 303 interrupts = < 0x00 0x4f 0x04 >; 304 clock-names = "clk_main\0clk_apb"; 305 xlnx,bus-width = < 0x40 >; 306 clocks = < 0x05 0x04 >; 307 }; 308 309 dma@ffab0000 { 310 status = "disabled"; 311 compatible = "xlnx,zynqmp-dma-1.0"; 312 reg = < 0x00 0xffab0000 0x00 0x1000 >; 313 interrupt-parent = < 0x03 >; 314 interrupts = < 0x00 0x50 0x04 >; 315 clock-names = "clk_main\0clk_apb"; 316 xlnx,bus-width = < 0x40 >; 317 clocks = < 0x05 0x04 >; 318 }; 319 320 dma@ffac0000 { 321 status = "disabled"; 322 compatible = "xlnx,zynqmp-dma-1.0"; 323 reg = < 0x00 0xffac0000 0x00 0x1000 >; 324 interrupt-parent = < 0x03 >; 325 interrupts = < 0x00 0x51 0x04 >; 326 clock-names = "clk_main\0clk_apb"; 327 xlnx,bus-width = < 0x40 >; 328 clocks = < 0x05 0x04 >; 329 }; 330 331 dma@ffad0000 { 332 status = "disabled"; 333 compatible = "xlnx,zynqmp-dma-1.0"; 334 reg = < 0x00 0xffad0000 0x00 0x1000 >; 335 interrupt-parent = < 0x03 >; 336 interrupts = < 0x00 0x52 0x04 >; 337 clock-names = "clk_main\0clk_apb"; 338 xlnx,bus-width = < 0x40 >; 339 clocks = < 0x05 0x04 >; 340 }; 341 342 dma@ffae0000 { 343 status = "disabled"; 344 compatible = "xlnx,zynqmp-dma-1.0"; 345 reg = < 0x00 0xffae0000 0x00 0x1000 >; 346 interrupt-parent = < 0x03 >; 347 interrupts = < 0x00 0x53 0x04 >; 348 clock-names = "clk_main\0clk_apb"; 349 xlnx,bus-width = < 0x40 >; 350 clocks = < 0x05 0x04 >; 351 }; 352 353 dma@ffaf0000 { 354 status = "disabled"; 355 compatible = "xlnx,zynqmp-dma-1.0"; 356 reg = < 0x00 0xffaf0000 0x00 0x1000 >; 357 interrupt-parent = < 0x03 >; 358 interrupts = < 0x00 0x54 0x04 >; 359 clock-names = "clk_main\0clk_apb"; 360 xlnx,bus-width = < 0x40 >; 361 clocks = < 0x05 0x04 >; 362 }; 363 364 ethernet@ff0b0000 { 365 compatible = "cdns,zynqmp-gem\0cdns,gem"; 366 status = "disabled"; 367 interrupt-parent = < 0x03 >; 368 interrupts = < 0x00 0x39 0x04 0x00 0x39 0x04 >; 369 reg = < 0x00 0xff0b0000 0x00 0x1000 >; 370 clock-names = "pclk\0hclk\0tx_clk"; 371 #address-cells = < 0x01 >; 372 #size-cells = < 0x00 >; 373 clocks = < 0x06 0x06 0x06 >; 374 }; 375 376 ethernet@ff0c0000 { 377 compatible = "cdns,zynqmp-gem\0cdns,gem"; 378 status = "disabled"; 379 interrupt-parent = < 0x03 >; 380 interrupts = < 0x00 0x3b 0x04 0x00 0x3b 0x04 >; 381 reg = < 0x00 0xff0c0000 0x00 0x1000 >; 382 clock-names = "pclk\0hclk\0tx_clk"; 383 #address-cells = < 0x01 >; 384 #size-cells = < 0x00 >; 385 clocks = < 0x06 0x06 0x06 >; 386 }; 387 388 ethernet@ff0d0000 { 389 compatible = "cdns,zynqmp-gem\0cdns,gem"; 390 status = "disabled"; 391 interrupt-parent = < 0x03 >; 392 interrupts = < 0x00 0x3d 0x04 0x00 0x3d 0x04 >; 393 reg = < 0x00 0xff0d0000 0x00 0x1000 >; 394 clock-names = "pclk\0hclk\0tx_clk"; 395 #address-cells = < 0x01 >; 396 #size-cells = < 0x00 >; 397 clocks = < 0x06 0x06 0x06 >; 398 }; 399 400 ethernet@ff0e0000 { 401 compatible = "cdns,zynqmp-gem\0cdns,gem"; 402 status = "disabled"; 403 interrupt-parent = < 0x03 >; 404 interrupts = < 0x00 0x3f 0x04 0x00 0x3f 0x04 >; 405 reg = < 0x00 0xff0e0000 0x00 0x1000 >; 406 clock-names = "pclk\0hclk\0tx_clk"; 407 #address-cells = < 0x01 >; 408 #size-cells = < 0x00 >; 409 clocks = < 0x06 0x06 0x06 >; 410 }; 411 412 gpio@ff0a0000 { 413 compatible = "xlnx,zynqmp-gpio-1.0"; 414 status = "okay"; 415 #gpio-cells = < 0x02 >; 416 interrupt-parent = < 0x03 >; 417 interrupts = < 0x00 0x10 0x04 >; 418 interrupt-controller; 419 #interrupt-cells = < 0x02 >; 420 reg = < 0x00 0xff0a0000 0x00 0x1000 >; 421 clocks = < 0x04 >; 422 gpio-line-names = "UART1_TX\0UART1_RX\0UART0_RX\0UART0_TX\0I2C1_SCL\0I2C1_SDA\0SPI1_SCLK\0WLAN_EN\0BT_EN\0SPI1_CS\0SPI1_MISO\0SPI1_MOSI\0I2C_MUX_RESET\0SD0_DAT0\0SD0_DAT1\0SD0_DAT2\0SD0_DAT3\0PS_LED3\0PS_LED2\0PS_LED1\0PS_LED0\0SD0_CMD\0SD0_CLK\0GPIO_PB\0SD0_DETECT\0VBUS_DET\0POWER_INT\0DP_AUX\0DP_HPD\0DP_OE\0DP_AUX_IN\0INA226_ALERT\0PS_FP_PWR_EN\0PL_PWR_EN\0POWER_KILL\0\0GPIO-A\0GPIO-B\0SPI0_SCLK\0GPIO-C\0GPIO-D\0SPI0_CS\0SPI0_MISO\0SPI_MOSI\0GPIO-E\0GPIO-F\0SD1_D0\0SD1_D1\0SD1_D2\0SD1_D3\0SD1_CMD\0SD1_CLK\0USB0_CLK\0USB0_DIR\0USB0_DATA2\0USB0_NXT\0USB0_DATA0\0USB0_DATA1\0USB0_STP\0USB0_DATA3\0USB0_DATA4\0USB0_DATA5\0USB0_DATA6\0USB0_DATA7\0USB1_CLK\0USB1_DIR\0USB1_DATA2\0USB1_NXT\0USB1_DATA0\0USB1_DATA1\0USB1_STP\0USB1_DATA3\0USB1_DATA4\0USB1_DATA5\0USB1_DATA6\0USB_DATA7\0WLAN_IRQ\0PMIC_IRQ\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"; 423 phandle = < 0x07 >; 424 }; 425 426 i2c@ff020000 { 427 compatible = "cdns,i2c-r1p14\0cdns,i2c-r1p10"; 428 status = "disabled"; 429 interrupt-parent = < 0x03 >; 430 interrupts = < 0x00 0x11 0x04 >; 431 reg = < 0x00 0xff020000 0x00 0x1000 >; 432 #address-cells = < 0x01 >; 433 #size-cells = < 0x00 >; 434 clocks = < 0x04 >; 435 }; 436 437 i2c@ff030000 { 438 compatible = "cdns,i2c-r1p14\0cdns,i2c-r1p10"; 439 status = "okay"; 440 interrupt-parent = < 0x03 >; 441 interrupts = < 0x00 0x12 0x04 >; 442 reg = < 0x00 0xff030000 0x00 0x1000 >; 443 #address-cells = < 0x01 >; 444 #size-cells = < 0x00 >; 445 clocks = < 0x04 >; 446 clock-frequency = < 0x186a0 >; 447 448 i2c-mux@75 { 449 compatible = "nxp,pca9548"; 450 #address-cells = < 0x01 >; 451 #size-cells = < 0x00 >; 452 reg = < 0x75 >; 453 454 i2c@0 { 455 #address-cells = < 0x01 >; 456 #size-cells = < 0x00 >; 457 reg = < 0x00 >; 458 label = "LS-I2C0"; 459 }; 460 461 i2c@1 { 462 #address-cells = < 0x01 >; 463 #size-cells = < 0x00 >; 464 reg = < 0x01 >; 465 label = "LS-I2C1"; 466 }; 467 468 i2c@2 { 469 #address-cells = < 0x01 >; 470 #size-cells = < 0x00 >; 471 reg = < 0x02 >; 472 label = "HS-I2C2"; 473 }; 474 475 i2c@3 { 476 #address-cells = < 0x01 >; 477 #size-cells = < 0x00 >; 478 reg = < 0x03 >; 479 label = "HS-I2C3"; 480 }; 481 482 i2c@4 { 483 #address-cells = < 0x01 >; 484 #size-cells = < 0x00 >; 485 reg = < 0x04 >; 486 487 pmic@5e { 488 compatible = "ti,tps65086"; 489 reg = < 0x5e >; 490 interrupt-parent = < 0x07 >; 491 interrupts = < 0x4d 0x01 >; 492 #gpio-cells = < 0x02 >; 493 gpio-controller; 494 }; 495 }; 496 497 i2c@5 { 498 #address-cells = < 0x01 >; 499 #size-cells = < 0x00 >; 500 reg = < 0x05 >; 501 502 ina226@40 { 503 compatible = "ti,ina226"; 504 reg = < 0x40 >; 505 shunt-resistor = < 0x2710 >; 506 }; 507 }; 508 509 i2c@6 { 510 #address-cells = < 0x01 >; 511 #size-cells = < 0x00 >; 512 reg = < 0x06 >; 513 }; 514 515 i2c@7 { 516 #address-cells = < 0x01 >; 517 #size-cells = < 0x00 >; 518 reg = < 0x07 >; 519 }; 520 }; 521 }; 522 523 pcie@fd0e0000 { 524 compatible = "xlnx,nwl-pcie-2.11"; 525 status = "disabled"; 526 #address-cells = < 0x03 >; 527 #size-cells = < 0x02 >; 528 #interrupt-cells = < 0x01 >; 529 msi-controller; 530 device_type = "pci"; 531 interrupt-parent = < 0x03 >; 532 interrupts = < 0x00 0x76 0x04 0x00 0x75 0x04 0x00 0x74 0x04 0x00 0x73 0x04 0x00 0x72 0x04 >; 533 interrupt-names = "misc\0dummy\0intx\0msi1\0msi0"; 534 msi-parent = < 0x08 >; 535 reg = < 0x00 0xfd0e0000 0x00 0x1000 0x00 0xfd480000 0x00 0x1000 0x80 0x00 0x00 0x1000000 >; 536 reg-names = "breg\0pcireg\0cfg"; 537 ranges = < 0x2000000 0x00 0xe0000000 0x00 0xe0000000 0x00 0x10000000 0x43000000 0x06 0x00 0x06 0x00 0x02 0x00 >; 538 bus-range = < 0x00 0xff >; 539 interrupt-map-mask = < 0x00 0x00 0x00 0x07 >; 540 interrupt-map = < 0x00 0x00 0x00 0x01 0x09 0x01 0x00 0x00 0x00 0x02 0x09 0x02 0x00 0x00 0x00 0x03 0x09 0x03 0x00 0x00 0x00 0x04 0x09 0x04 >; 541 phandle = < 0x08 >; 542 543 legacy-interrupt-controller { 544 interrupt-controller; 545 #address-cells = < 0x00 >; 546 #interrupt-cells = < 0x01 >; 547 phandle = < 0x09 >; 548 }; 549 }; 550 551 rtc@ffa60000 { 552 compatible = "xlnx,zynqmp-rtc"; 553 status = "okay"; 554 reg = < 0x00 0xffa60000 0x00 0x100 >; 555 interrupt-parent = < 0x03 >; 556 interrupts = < 0x00 0x1a 0x04 0x00 0x1b 0x04 >; 557 interrupt-names = "alarm\0sec"; 558 calibration = < 0x8000 >; 559 }; 560 561 ahci@fd0c0000 { 562 compatible = "ceva,ahci-1v84"; 563 status = "disabled"; 564 reg = < 0x00 0xfd0c0000 0x00 0x2000 >; 565 interrupt-parent = < 0x03 >; 566 interrupts = < 0x00 0x85 0x04 >; 567 clocks = < 0x0a >; 568 }; 569 570 sdhci@ff160000 { 571 compatible = "arasan,sdhci-8.9a"; 572 status = "okay"; 573 interrupt-parent = < 0x03 >; 574 interrupts = < 0x00 0x30 0x04 >; 575 reg = < 0x00 0xff160000 0x00 0x1000 >; 576 clock-names = "clk_xin\0clk_ahb"; 577 clocks = < 0x0b 0x0b >; 578 no-1-8-v; 579 broken-cd; 580 disable-wp; 581 }; 582 583 sdhci@ff170000 { 584 compatible = "arasan,sdhci-8.9a"; 585 status = "okay"; 586 interrupt-parent = < 0x03 >; 587 interrupts = < 0x00 0x31 0x04 >; 588 reg = < 0x00 0xff170000 0x00 0x1000 >; 589 clock-names = "clk_xin\0clk_ahb"; 590 clocks = < 0x0b 0x0b >; 591 bus-width = < 0x04 >; 592 non-removable; 593 disable-wp; 594 cap-power-off-card; 595 mmc-pwrseq = < 0x0c >; 596 vqmmc-supply = < 0x0d >; 597 #address-cells = < 0x01 >; 598 #size-cells = < 0x00 >; 599 600 wifi@2 { 601 compatible = "ti,wl1831"; 602 reg = < 0x02 >; 603 interrupt-parent = < 0x07 >; 604 interrupts = < 0x4c 0x01 >; 605 }; 606 }; 607 608 smmu@fd800000 { 609 compatible = "arm,mmu-500"; 610 reg = < 0x00 0xfd800000 0x00 0x20000 >; 611 status = "disabled"; 612 #global-interrupts = < 0x01 >; 613 interrupt-parent = < 0x03 >; 614 interrupts = < 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 0x00 0x9b 0x04 >; 615 }; 616 617 spi@ff040000 { 618 compatible = "cdns,spi-r1p6"; 619 status = "okay"; 620 interrupt-parent = < 0x03 >; 621 interrupts = < 0x00 0x13 0x04 >; 622 reg = < 0x00 0xff040000 0x00 0x1000 >; 623 clock-names = "ref_clk\0pclk"; 624 #address-cells = < 0x01 >; 625 #size-cells = < 0x00 >; 626 clocks = < 0x0b 0x0b >; 627 label = "LS-SPI0"; 628 }; 629 630 spi@ff050000 { 631 compatible = "cdns,spi-r1p6"; 632 status = "okay"; 633 interrupt-parent = < 0x03 >; 634 interrupts = < 0x00 0x14 0x04 >; 635 reg = < 0x00 0xff050000 0x00 0x1000 >; 636 clock-names = "ref_clk\0pclk"; 637 #address-cells = < 0x01 >; 638 #size-cells = < 0x00 >; 639 clocks = < 0x0b 0x0b >; 640 label = "HS-SPI1"; 641 }; 642 643 timer@ff110000 { 644 compatible = "cdns,ttc"; 645 status = "disabled"; 646 interrupt-parent = < 0x03 >; 647 interrupts = < 0x00 0x24 0x04 0x00 0x25 0x04 0x00 0x26 0x04 >; 648 reg = < 0x00 0xff110000 0x00 0x1000 >; 649 timer-width = < 0x20 >; 650 }; 651 652 timer@ff120000 { 653 compatible = "cdns,ttc"; 654 status = "disabled"; 655 interrupt-parent = < 0x03 >; 656 interrupts = < 0x00 0x27 0x04 0x00 0x28 0x04 0x00 0x29 0x04 >; 657 reg = < 0x00 0xff120000 0x00 0x1000 >; 658 timer-width = < 0x20 >; 659 }; 660 661 timer@ff130000 { 662 compatible = "cdns,ttc"; 663 status = "disabled"; 664 interrupt-parent = < 0x03 >; 665 interrupts = < 0x00 0x2a 0x04 0x00 0x2b 0x04 0x00 0x2c 0x04 >; 666 reg = < 0x00 0xff130000 0x00 0x1000 >; 667 timer-width = < 0x20 >; 668 }; 669 670 timer@ff140000 { 671 compatible = "cdns,ttc"; 672 status = "disabled"; 673 interrupt-parent = < 0x03 >; 674 interrupts = < 0x00 0x2d 0x04 0x00 0x2e 0x04 0x00 0x2f 0x04 >; 675 reg = < 0x00 0xff140000 0x00 0x1000 >; 676 timer-width = < 0x20 >; 677 }; 678 679 serial@ff000000 { 680 compatible = "cdns,uart-r1p12\0xlnx,xuartps"; 681 status = "okay"; 682 interrupt-parent = < 0x03 >; 683 interrupts = < 0x00 0x15 0x04 >; 684 reg = < 0x00 0xff000000 0x00 0x1000 >; 685 clock-names = "uart_clk\0pclk"; 686 clocks = < 0x04 0x04 >; 687 688 bluetooth { 689 compatible = "ti,wl1831-st"; 690 enable-gpios = < 0x07 0x08 0x00 >; 691 }; 692 }; 693 694 serial@ff010000 { 695 compatible = "cdns,uart-r1p12\0xlnx,xuartps"; 696 status = "okay"; 697 interrupt-parent = < 0x03 >; 698 interrupts = < 0x00 0x16 0x04 >; 699 reg = < 0x00 0xff010000 0x00 0x1000 >; 700 clock-names = "uart_clk\0pclk"; 701 clocks = < 0x04 0x04 >; 702 }; 703 704 usb@fe200000 { 705 compatible = "snps,dwc3"; 706 status = "okay"; 707 interrupt-parent = < 0x03 >; 708 interrupts = < 0x00 0x41 0x04 >; 709 reg = < 0x00 0xfe200000 0x00 0x40000 >; 710 clock-names = "clk_xin\0clk_ahb"; 711 clocks = < 0x0a 0x0a >; 712 }; 713 714 usb@fe300000 { 715 compatible = "snps,dwc3"; 716 status = "okay"; 717 interrupt-parent = < 0x03 >; 718 interrupts = < 0x00 0x46 0x04 >; 719 reg = < 0x00 0xfe300000 0x00 0x40000 >; 720 clock-names = "clk_xin\0clk_ahb"; 721 clocks = < 0x0a 0x0a >; 722 }; 723 724 watchdog@fd4d0000 { 725 compatible = "cdns,wdt-r1p2"; 726 status = "okay"; 727 interrupt-parent = < 0x03 >; 728 interrupts = < 0x00 0x71 0x01 >; 729 reg = < 0x00 0xfd4d0000 0x00 0x1000 >; 730 timeout-sec = < 0x0a >; 731 clocks = < 0x0a >; 732 }; 733 }; 734 735 clk100 { 736 compatible = "fixed-clock"; 737 #clock-cells = < 0x00 >; 738 clock-frequency = < 0x5f5e100 >; 739 phandle = < 0x04 >; 740 }; 741 742 clk125 { 743 compatible = "fixed-clock"; 744 #clock-cells = < 0x00 >; 745 clock-frequency = < 0x7735940 >; 746 phandle = < 0x06 >; 747 }; 748 749 clk200 { 750 compatible = "fixed-clock"; 751 #clock-cells = < 0x00 >; 752 clock-frequency = < 0xbebc200 >; 753 phandle = < 0x0b >; 754 }; 755 756 clk250 { 757 compatible = "fixed-clock"; 758 #clock-cells = < 0x00 >; 759 clock-frequency = < 0xee6b280 >; 760 phandle = < 0x0a >; 761 }; 762 763 clk300 { 764 compatible = "fixed-clock"; 765 #clock-cells = < 0x00 >; 766 clock-frequency = < 0x11e1a300 >; 767 }; 768 769 clk600 { 770 compatible = "fixed-clock"; 771 #clock-cells = < 0x00 >; 772 clock-frequency = < 0x23c34600 >; 773 phandle = < 0x05 >; 774 }; 775 776 clock0 { 777 compatible = "fixed-clock"; 778 #clock-cells = < 0x00 >; 779 clock-frequency = < 0x5f5e100 >; 780 clock-accuracy = < 0x64 >; 781 }; 782 783 clock1 { 784 compatible = "fixed-clock"; 785 #clock-cells = < 0x00 >; 786 clock-frequency = < 0x1770000 >; 787 clock-accuracy = < 0x64 >; 788 }; 789 790 dpdma_clk { 791 compatible = "fixed-clock"; 792 #clock-cells = < 0x00 >; 793 clock-frequency = < 0x1fc4ef40 >; 794 }; 795 796 drm_clock { 797 compatible = "fixed-clock"; 798 #clock-cells = < 0x00 >; 799 clock-frequency = < 0xfa93f30 >; 800 clock-accuracy = < 0x64 >; 801 }; 802 803 aliases { 804 i2c0 = "/amba/i2c@ff030000"; 805 rtc0 = "/amba/rtc@ffa60000"; 806 serial0 = "/amba/serial@ff010000"; 807 serial1 = "/amba/serial@ff000000"; 808 serial2 = "/dcc"; 809 spi0 = "/amba/spi@ff040000"; 810 spi1 = "/amba/spi@ff050000"; 811 mmc0 = "/amba/sdhci@ff160000"; 812 mmc1 = "/amba/sdhci@ff170000"; 813 }; 814 815 chosen { 816 bootargs = "earlycon"; 817 stdout-path = "serial0:115200n8"; 818 }; 819 820 memory@0 { 821 device_type = "memory"; 822 reg = < 0x00 0x00 0x00 0x80000000 >; 823 }; 824 825 gpio-keys { 826 compatible = "gpio-keys"; 827 autorepeat; 828 829 sw4 { 830 label = "sw4"; 831 gpios = < 0x07 0x17 0x01 >; 832 linux,code = < 0x74 >; 833 gpio-key,wakeup; 834 autorepeat; 835 }; 836 }; 837 838 leds { 839 compatible = "gpio-leds"; 840 841 ds2 { 842 label = "ds2"; 843 gpios = < 0x07 0x14 0x00 >; 844 linux,default-trigger = "heartbeat"; 845 }; 846 847 ds3 { 848 label = "ds3"; 849 gpios = < 0x07 0x13 0x00 >; 850 linux,default-trigger = "phy0tx"; 851 default-state = "off"; 852 }; 853 854 ds4 { 855 label = "ds4"; 856 gpios = < 0x07 0x12 0x00 >; 857 linux,default-trigger = "phy0rx"; 858 default-state = "off"; 859 }; 860 861 ds5 { 862 label = "ds5"; 863 gpios = < 0x07 0x11 0x00 >; 864 linux,default-trigger = "bluetooth-power"; 865 }; 866 867 vbus_det { 868 label = "vbus_det"; 869 gpios = < 0x07 0x19 0x00 >; 870 default-state = "on"; 871 }; 872 }; 873 874 fixedregulator-mmcsdio { 875 compatible = "regulator-fixed"; 876 regulator-name = "wmmcsdio_fixed"; 877 regulator-min-microvolt = < 0x325aa0 >; 878 regulator-max-microvolt = < 0x325aa0 >; 879 regulator-always-on; 880 regulator-boot-on; 881 phandle = < 0x0d >; 882 }; 883 884 sdio_pwrseq { 885 compatible = "mmc-pwrseq-simple"; 886 reset-gpios = < 0x07 0x07 0x01 >; 887 phandle = < 0x0c >; 888 }; 889}; 890