1/*
2 * xen/arch/arm/arm32/debug-scif.inc
3 *
4 * SCIF specific debug code
5 *
6 * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
7 * Copyright (C) 2014, Globallogic.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 * GNU General Public License for more details.
18 */
19
20#include <asm/scif-uart.h>
21
22/*
23 * SCIF UART wait UART to be ready to transmit
24 * rb: register which contains the UART base address
25 * rc: scratch register
26 */
27.macro early_uart_ready rb rc
281:
29        ldrh   \rc, [\rb, #SCIF_SCFSR]   /* <- SCFSR (status register) */
30        tst    \rc, #SCFSR_TDFE          /* Check TDFE bit */
31        beq    1b                        /* Wait for the UART to be ready */
32.endm
33
34/*
35 * SCIF UART transmit character
36 * rb: register which contains the UART base address
37 * rt: register which contains the character to transmit
38 */
39.macro early_uart_transmit rb rt
40        strb   \rt, [\rb, #SCIF_SCFTDR]                  /* -> SCFTDR (data register) */
41        ldrh   \rt, [\rb, #SCIF_SCFSR]                   /* <- SCFSR (status register) */
42        and    \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear TEND and TDFE bits */
43        strh   \rt, [\rb, #SCIF_SCFSR]                   /* -> SCFSR (status register) */
44.endm
45
46/*
47 * Local variables:
48 * mode: ASM
49 * indent-tabs-mode: nil
50 * End:
51 */
52