1/*
2 * xen/arch/arm/arm64/debug-scif.inc
3 *
4 * SCIF specific debug code
5 *
6 * Oleksandr Tyshchenko <oleksandr.tyshchenko@globallogic.com>
7 * Iurii Konovalenko <iurii.konovalenko@globallogic.com>
8 * Iurii Mykhalskyi <iurii.mykhalskyi@globallogic.com>
9 * Copyright (C) 2014-2016, Globallogic.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 * GNU General Public License for more details.
20 */
21
22#include <asm/scif-uart.h>
23
24/*
25 * SCIF UART wait UART to be ready to transmit
26 * xb: register which contains the UART base address
27 * c: scratch register
28 */
29.macro early_uart_ready xb c
301:
31        ldrh   w\c, [\xb, #SCIF_SCFSR]   /* <- SCFSR (status register) */
32        tst    w\c, #SCFSR_TDFE          /* Check TDFE bit */
33        beq    1b                        /* Wait for the UART to be ready */
34.endm
35
36/*
37 * SCIF UART transmit character
38 * xb: register which contains the UART base address
39 * wt: register which contains the character to transmit
40 */
41.macro early_uart_transmit xb wt
42        strb   \wt, [\xb, #SCIF_SCFTDR]                  /* -> SCFTDR (data register) */
43        ldrh   \wt, [\xb, #SCIF_SCFSR]                   /* <- SCFSR (status register) */
44        and    \wt, \wt, #(~(SCFSR_TEND | SCFSR_TDFE))   /* Clear TEND and TDFE bits */
45        strh   \wt, [\xb, #SCIF_SCFSR]                   /* -> SCFSR (status register) */
46.endm
47
48/*
49 * Local variables:
50 * mode: ASM
51 * indent-tabs-mode: nil
52 * End:
53 */
54