1 /*
2 * svm.h: SVM Architecture related definitions
3 * Copyright (c) 2005, AMD Corporation.
4 * Copyright (c) 2004, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; If not, see <http://www.gnu.org/licenses/>.
17 *
18 */
19
20 #ifndef __ASM_X86_HVM_SVM_H__
21 #define __ASM_X86_HVM_SVM_H__
22
23 #include <xen/types.h>
24 #include <xen/bitmap.h>
25
26 #define svm_vmload(x) svm_vmload_pa(__pa(x))
27 #define svm_vmsave(x) svm_vmsave_pa(__pa(x))
28
svm_vmload_pa(paddr_t vmcb)29 static inline void svm_vmload_pa(paddr_t vmcb)
30 {
31 asm volatile (
32 ".byte 0x0f,0x01,0xda" /* vmload */
33 : : "a" (vmcb) : "memory" );
34 }
35
svm_vmsave_pa(paddr_t vmcb)36 static inline void svm_vmsave_pa(paddr_t vmcb)
37 {
38 asm volatile (
39 ".byte 0x0f,0x01,0xdb" /* vmsave */
40 : : "a" (vmcb) : "memory" );
41 }
42
svm_invlpga(unsigned long vaddr,uint32_t asid)43 static inline void svm_invlpga(unsigned long vaddr, uint32_t asid)
44 {
45 asm volatile (
46 ".byte 0x0f,0x01,0xdf"
47 : /* output */
48 : /* input */
49 "a" (vaddr), "c" (asid));
50 }
51
52 unsigned long *svm_msrbit(unsigned long *msr_bitmap, uint32_t msr);
53 void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len);
54 void svm_update_guest_cr(struct vcpu *, unsigned int cr);
55
56 extern u32 svm_feature_flags;
57
58 #define SVM_FEATURE_NPT 0 /* Nested page table support */
59 #define SVM_FEATURE_LBRV 1 /* LBR virtualization support */
60 #define SVM_FEATURE_SVML 2 /* SVM locking MSR support */
61 #define SVM_FEATURE_NRIPS 3 /* Next RIP save on VMEXIT support */
62 #define SVM_FEATURE_TSCRATEMSR 4 /* TSC ratio MSR support */
63 #define SVM_FEATURE_VMCBCLEAN 5 /* VMCB clean bits support */
64 #define SVM_FEATURE_FLUSHBYASID 6 /* TLB flush by ASID support */
65 #define SVM_FEATURE_DECODEASSISTS 7 /* Decode assists support */
66 #define SVM_FEATURE_PAUSEFILTER 10 /* Pause intercept filter support */
67
68 #define cpu_has_svm_feature(f) test_bit(f, &svm_feature_flags)
69 #define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT)
70 #define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV)
71 #define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML)
72 #define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS)
73 #define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN)
74 #define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
75 #define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
76 #define cpu_has_tsc_ratio cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR)
77
78 #define SVM_PAUSEFILTER_INIT 3000
79
80 /* TSC rate */
81 #define DEFAULT_TSC_RATIO 0x0000000100000000ULL
82 #define TSC_RATIO_RSVD_BITS 0xffffff0000000000ULL
83
84 extern void svm_host_osvw_reset(void);
85 extern void svm_host_osvw_init(void);
86
87 /* EXITINFO1 fields on NPT faults */
88 #define _NPT_PFEC_with_gla 32
89 #define NPT_PFEC_with_gla (1UL<<_NPT_PFEC_with_gla)
90 #define _NPT_PFEC_in_gpt 33
91 #define NPT_PFEC_in_gpt (1UL<<_NPT_PFEC_in_gpt)
92
93 #endif /* __ASM_X86_HVM_SVM_H__ */
94