1 /*
2 * hvm_vlapic.h: virtualize LAPIC definitions.
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 * Copyright (c) 2006 Keir Fraser, XenSource Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef __ASM_X86_HVM_VLAPIC_H__
21 #define __ASM_X86_HVM_VLAPIC_H__
22
23 #include <xen/tasklet.h>
24 #include <asm/msr.h>
25 #include <public/hvm/ioreq.h>
26 #include <asm/hvm/vpt.h>
27
28 #define vcpu_vlapic(x) (&(x)->arch.hvm_vcpu.vlapic)
29 #define vlapic_vcpu(x) (container_of((x), struct vcpu, arch.hvm_vcpu.vlapic))
30 #define const_vlapic_vcpu(x) (container_of((x), const struct vcpu, \
31 arch.hvm_vcpu.vlapic))
32 #define vlapic_domain(x) (vlapic_vcpu(x)->domain)
33
34 #define _VLAPIC_ID(vlapic, id) (vlapic_x2apic_mode(vlapic) \
35 ? (id) : GET_xAPIC_ID(id))
36 #define VLAPIC_ID(vlapic) _VLAPIC_ID(vlapic, vlapic_get_reg(vlapic, APIC_ID))
37
38 /*
39 * APIC can be disabled in two ways:
40 * 1. 'Hardware disable': via IA32_APIC_BASE_MSR[11]
41 * CPU should behave as if it does not have an APIC.
42 * 2. 'Software disable': via APIC_SPIV[8].
43 * APIC is visible but does not respond to interrupt messages.
44 */
45 #define VLAPIC_HW_DISABLED 0x1
46 #define VLAPIC_SW_DISABLED 0x2
47 #define vlapic_sw_disabled(vlapic) ((vlapic)->hw.disabled & VLAPIC_SW_DISABLED)
48 #define vlapic_hw_disabled(vlapic) ((vlapic)->hw.disabled & VLAPIC_HW_DISABLED)
49 #define vlapic_disabled(vlapic) ((vlapic)->hw.disabled)
50 #define vlapic_enabled(vlapic) (!vlapic_disabled(vlapic))
51
52 #define vlapic_base_address(vlapic) \
53 ((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_BASE)
54 /* Only check EXTD bit as EXTD can't be set if it is disabled by hardware */
55 #define vlapic_x2apic_mode(vlapic) \
56 ((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD)
57 #define vlapic_xapic_mode(vlapic) \
58 (!vlapic_hw_disabled(vlapic) && \
59 !((vlapic)->hw.apic_base_msr & MSR_IA32_APICBASE_EXTD))
60
61 /*
62 * Generic APIC bitmap vector update & search routines.
63 */
64
65 #define VEC_POS(v) ((v) % 32)
66 #define REG_POS(v) (((v) / 32) * 0x10)
67 #define vlapic_test_vector(vec, bitmap) \
68 test_bit(VEC_POS(vec), (const uint32_t *)((bitmap) + REG_POS(vec)))
69 #define vlapic_test_and_set_vector(vec, bitmap) \
70 test_and_set_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec)))
71 #define vlapic_test_and_clear_vector(vec, bitmap) \
72 test_and_clear_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec)))
73 #define vlapic_set_vector(vec, bitmap) \
74 set_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec)))
75 #define vlapic_clear_vector(vec, bitmap) \
76 clear_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec)))
77
78 struct vlapic {
79 struct hvm_hw_lapic hw;
80 struct hvm_hw_lapic_regs *regs;
81 struct {
82 bool_t hw, regs;
83 uint32_t id, ldr;
84 } loaded;
85 spinlock_t esr_lock;
86 struct periodic_time pt;
87 s_time_t timer_last_update;
88 struct page_info *regs_page;
89 /* INIT-SIPI-SIPI work gets deferred to a tasklet. */
90 struct {
91 uint32_t icr, dest;
92 struct tasklet tasklet;
93 } init_sipi;
94 };
95
96 /* vlapic's frequence is 100 MHz */
97 #define APIC_BUS_CYCLE_NS 10
98
vlapic_get_reg(const struct vlapic * vlapic,uint32_t reg)99 static inline uint32_t vlapic_get_reg(const struct vlapic *vlapic,
100 uint32_t reg)
101 {
102 return *((uint32_t *)(&vlapic->regs->data[reg]));
103 }
104
vlapic_set_reg(struct vlapic * vlapic,uint32_t reg,uint32_t val)105 static inline void vlapic_set_reg(
106 struct vlapic *vlapic, uint32_t reg, uint32_t val)
107 {
108 *((uint32_t *)(&vlapic->regs->data[reg])) = val;
109 }
110
111 bool_t is_vlapic_lvtpc_enabled(struct vlapic *vlapic);
112
113 bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec);
114 void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig);
115
116 int vlapic_has_pending_irq(struct vcpu *v);
117 int vlapic_ack_pending_irq(struct vcpu *v, int vector, bool_t force_ack);
118
119 int vlapic_init(struct vcpu *v);
120 void vlapic_destroy(struct vcpu *v);
121
122 void vlapic_reset(struct vlapic *vlapic);
123
124 bool_t vlapic_msr_set(struct vlapic *vlapic, uint64_t value);
125 void vlapic_tdt_msr_set(struct vlapic *vlapic, uint64_t value);
126 uint64_t vlapic_tdt_msr_get(struct vlapic *vlapic);
127
128 int vlapic_accept_pic_intr(struct vcpu *v);
129 uint32_t vlapic_set_ppr(struct vlapic *vlapic);
130
131 void vlapic_adjust_i8259_target(struct domain *d);
132
133 void vlapic_EOI_set(struct vlapic *vlapic);
134 void vlapic_handle_EOI(struct vlapic *vlapic, u8 vector);
135
136 void vlapic_ipi(struct vlapic *vlapic, uint32_t icr_low, uint32_t icr_high);
137
138 int vlapic_apicv_write(struct vcpu *v, unsigned int offset);
139
140 struct vlapic *vlapic_lowest_prio(
141 struct domain *d, const struct vlapic *source,
142 int short_hand, uint32_t dest, bool_t dest_mode);
143
144 bool_t vlapic_match_dest(
145 const struct vlapic *target, const struct vlapic *source,
146 int short_hand, uint32_t dest, bool_t dest_mode);
147
148 #endif /* __ASM_X86_HVM_VLAPIC_H__ */
149