Lines Matching refs:c1
32 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
35 mcr p15, 0, r0, c1, c0, 0 @ disable caches
55 mrc p15, 0, r2, c1, c0, 0 @ ctrl register
58 mcr p15, 0, r2, c1, c0, 0 @ disable MMU
146 mrc p15, 0, r8, c1, c0, 0 @ Control register
147 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
148 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
179 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
181 mcrne p15, 0, r9, c1, c0, 1 @ No, so write it
182 mcr p15, 0, r10, c1, c0, 2 @ Co-processor access control
234 mrc p15, 1, r6, c15, c1, 0 @ save CP15 - extra features
236 mrc p15, 1, r8, c15, c1, 2 @ save CP15 - Aux Debug Modes Ctrl 2
237 mrc p15, 1, r9, c15, c1, 1 @ save CP15 - Aux Debug Modes Ctrl 1
246 mcr p15, 1, r6, c15, c1, 0 @ restore CP15 - extra features
248 mcr p15, 1, r8, c15, c1, 2 @ restore CP15 - Aux Debug Modes Ctrl 2
249 mcr p15, 1, r9, c15, c1, 1 @ restore CP15 - Aux Debug Modes Ctrl 1
307 ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
311 mcrne p15, 0, r10, c1, c0, 1 @ No, update register
326 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
328 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
332 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
335 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
381 mrcle p15, 0, r0, c1, c0, 1 @ read aux control register
383 mcrle p15, 0, r0, c1, c0, 1 @ write aux control register
456 mrc p15, 1, r0, c15, c1, 1
460 mcr p15, 1, r0, c15, c1, 1
463 mrc p15, 1, r0, c15, c1, 2
466 mcr p15, 1, r0, c15, c1, 2
478 mrc p15, 1, r0, c15, c1, 0
480 mcr p15, 1, r0, c15, c1, 0
534 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
539 mcr p14, 6, r3, c1, c0, 0 @ Initialize TEEHBR to 0
552 mrc p15, 0, r0, c1, c0, 0 @ read control register