Lines Matching defs:insn
64 #define INSN_IS_16BIT(insn) (((insn) & INSN_16BIT_MASK) != INSN_16BIT_MASK) argument
66 #define INSN_LEN(insn) (INSN_IS_16BIT(insn) ? 2 : 4) argument
96 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) argument
97 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) argument
98 #define RVC_RS2(insn) RV_X(insn, SH_RS2C, 5) argument
106 #define REG_OFFSET(insn, pos) \ argument
109 #define REG_PTR(insn, pos, regs) \ argument
112 #define GET_RM(insn) (((insn) >> 12) & 7) argument
114 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) argument
115 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) argument
116 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs)) argument
117 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs)) argument
118 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs)) argument
120 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val)) argument
121 #define IMM_I(insn) ((s32)(insn) >> 20) argument
122 #define IMM_S(insn) (((s32)(insn) >> 25 << 5) | \ argument
128 ulong insn) in truly_illegal_insn()
143 ulong insn) in system_opcode_insn()
163 unsigned long insn = trap->stval; in virtual_inst_fault() local
195 unsigned long insn; in emulate_load() local
308 unsigned long insn; in emulate_store() local
607 ulong insn; in kvm_riscv_vcpu_mmio_return() local