Lines Matching refs:mult
28 rate = (unsigned long long int)parent_rate * fix->mult; in clk_factor_recalc_rate()
41 best_parent = (rate / fix->mult) * fix->div; in clk_factor_round_rate()
45 return (*prate / fix->div) * fix->mult; in clk_factor_round_rate()
82 unsigned long flags, unsigned int mult, unsigned int div, in __clk_hw_register_fixed_factor() argument
104 fix->mult = mult; in __clk_hw_register_fixed_factor()
136 unsigned int mult, unsigned int div) in clk_hw_register_fixed_factor() argument
139 flags, mult, div, false); in clk_hw_register_fixed_factor()
145 unsigned int mult, unsigned int div) in clk_register_fixed_factor() argument
149 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult, in clk_register_fixed_factor()
183 unsigned int mult, unsigned int div) in devm_clk_hw_register_fixed_factor() argument
186 flags, mult, div, true); in devm_clk_hw_register_fixed_factor()
201 u32 div, mult; in _of_fixed_factor_clk_setup() local
210 if (of_property_read_u32(node, "clock-mult", &mult)) { in _of_fixed_factor_clk_setup()
222 flags, mult, div, false); in _of_fixed_factor_clk_setup()