Lines Matching refs:_name
129 #define PERIPH_GATE(_name, _bit) \ argument
130 struct clk_gate gate_##_name = { \
138 #define PERIPH_MUX(_name, _shift) \ argument
139 struct clk_mux mux_##_name = { \
148 #define PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2) \ argument
149 struct clk_double_div rate_##_name = { \
159 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
160 struct clk_divider rate_##_name = { \
169 #define PERIPH_PM_CPU(_name, _shift1, _reg, _shift2) \ argument
170 struct clk_pm_cpu muxrate_##_name = { \
181 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
182 static PERIPH_GATE(_name, _bit); \
183 static PERIPH_MUX(_name, _shift); \
184 static PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2);
186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
187 static PERIPH_GATE(_name, _bit); \
188 static PERIPH_MUX(_name, _shift); \
189 static PERIPH_DIV(_name, _reg, _shift1, _table);
191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
192 static PERIPH_GATE(_name, _bit); \
193 static PERIPH_DIV(_name, _reg, _shift, _table);
195 #define PERIPH_CLK_MUX_DD(_name, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
196 static PERIPH_MUX(_name, _shift); \
197 static PERIPH_DOUBLEDIV(_name, _reg1, _reg2, _shift1, _shift2);
199 #define REF_CLK_FULL(_name) \ argument
200 { .name = #_name, \
204 .mux_hw = &mux_##_name.hw, \
205 .gate_hw = &gate_##_name.hw, \
206 .rate_hw = &rate_##_name.hw, \
209 #define REF_CLK_FULL_DD(_name) \ argument
210 { .name = #_name, \
214 .mux_hw = &mux_##_name.hw, \
215 .gate_hw = &gate_##_name.hw, \
216 .rate_hw = &rate_##_name.hw, \
220 #define REF_CLK_GATE(_name, _parent_name) \ argument
221 { .name = #_name, \
224 .gate_hw = &gate_##_name.hw, \
227 #define REF_CLK_GATE_DIV(_name, _parent_name) \ argument
228 { .name = #_name, \
231 .gate_hw = &gate_##_name.hw, \
232 .rate_hw = &rate_##_name.hw, \
235 #define REF_CLK_PM_CPU(_name) \ argument
236 { .name = #_name, \
240 .muxrate_hw = &muxrate_##_name.hw, \
243 #define REF_CLK_MUX_DD(_name) \ argument
244 { .name = #_name, \
248 .mux_hw = &mux_##_name.hw, \
249 .rate_hw = &rate_##_name.hw, \