Lines Matching refs:reg_val
255 u32 reg_val = readl(reg_base + REG_OFFSET_FEATURE_CONFIG); in dmc520_is_ecc_enabled() local
257 return FIELD_GET(REG_FIELD_DRAM_ECC_ENABLED, reg_val); in dmc520_is_ecc_enabled()
263 u32 reg_val, scrub_cfg; in dmc520_get_scrub_type() local
265 reg_val = dmc520_read_reg(pvt, REG_OFFSET_SCRUB_CONTROL0_NOW); in dmc520_get_scrub_type()
266 scrub_cfg = FIELD_GET(SCRUB_TRIGGER0_NEXT_MASK, reg_val); in dmc520_get_scrub_type()
280 u32 reg_val; in dmc520_get_memory_width() local
282 reg_val = dmc520_read_reg(pvt, REG_OFFSET_FORMAT_CONTROL); in dmc520_get_memory_width()
283 mem_width_field = FIELD_GET(MEMORY_WIDTH_MASK, reg_val); in dmc520_get_memory_width()
296 u32 reg_val; in dmc520_get_mtype() local
298 reg_val = dmc520_read_reg(pvt, REG_OFFSET_MEMORY_TYPE_NOW); in dmc520_get_mtype()
299 type = FIELD_GET(REG_FIELD_MEMORY_TYPE, reg_val); in dmc520_get_mtype()
318 u32 reg_val; in dmc520_get_dtype() local
320 reg_val = dmc520_read_reg(pvt, REG_OFFSET_MEMORY_TYPE_NOW); in dmc520_get_dtype()
321 device_width = FIELD_GET(REG_FIELD_DEVICE_WIDTH, reg_val); in dmc520_get_dtype()
342 u32 reg_val, rank_bits; in dmc520_get_rank_count() local
344 reg_val = readl(reg_base + REG_OFFSET_ADDRESS_CONTROL_NOW); in dmc520_get_rank_count()
345 rank_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_RANK, reg_val); in dmc520_get_rank_count()
352 u32 reg_val, col_bits, row_bits, bank_bits; in dmc520_get_rank_size() local
354 reg_val = dmc520_read_reg(pvt, REG_OFFSET_ADDRESS_CONTROL_NOW); in dmc520_get_rank_size()
356 col_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_COL, reg_val) + in dmc520_get_rank_size()
358 row_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_ROW, reg_val) + in dmc520_get_rank_size()
360 bank_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_BANK, reg_val); in dmc520_get_rank_size()
486 u32 reg_val; in dmc520_edac_probe() local
554 reg_val = dmc520_read_reg(pvt, REG_OFFSET_INTERRUPT_CONTROL); in dmc520_edac_probe()
555 dmc520_write_reg(pvt, reg_val & (~irq_mask_all), in dmc520_edac_probe()
589 dmc520_write_reg(pvt, reg_val | irq_mask_all, in dmc520_edac_probe()
607 u32 reg_val, idx, irq_mask_all = 0; in dmc520_edac_remove() local
615 reg_val = dmc520_read_reg(pvt, REG_OFFSET_INTERRUPT_CONTROL); in dmc520_edac_remove()
616 dmc520_write_reg(pvt, reg_val & (~irq_mask_all), in dmc520_edac_remove()