Lines Matching refs:gpio_reg
86 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset, in gpio_reg() function
97 void __iomem *gplr = gpio_reg(chip, offset, GPLR); in mrfld_gpio_get()
112 gpsr = gpio_reg(chip, offset, GPSR); in mrfld_gpio_set()
115 gpcr = gpio_reg(chip, offset, GPCR); in mrfld_gpio_set()
126 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_direction_input()
145 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_direction_output()
163 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); in mrfld_gpio_get_direction()
175 void __iomem *gfbr = gpio_reg(chip, offset, GFBR); in mrfld_gpio_set_debounce()
213 void __iomem *gisr = gpio_reg(&priv->chip, gpio, GISR); in mrfld_irq_ack()
227 void __iomem *gimr = gpio_reg(&priv->chip, gpio, GIMR); in mrfld_irq_unmask_mask()
257 void __iomem *grer = gpio_reg(&priv->chip, gpio, GRER); in mrfld_irq_set_type()
258 void __iomem *gfer = gpio_reg(&priv->chip, gpio, GFER); in mrfld_irq_set_type()
259 void __iomem *gitr = gpio_reg(&priv->chip, gpio, GITR); in mrfld_irq_set_type()
260 void __iomem *glpr = gpio_reg(&priv->chip, gpio, GLPR); in mrfld_irq_set_type()
310 void __iomem *gwmr = gpio_reg(&priv->chip, gpio, GWMR); in mrfld_irq_set_wake()
311 void __iomem *gwsr = gpio_reg(&priv->chip, gpio, GWSR); in mrfld_irq_set_wake()
352 void __iomem *gisr = gpio_reg(&priv->chip, base, GISR); in mrfld_irq_handler()
353 void __iomem *gimr = gpio_reg(&priv->chip, base, GIMR); in mrfld_irq_handler()
377 reg = gpio_reg(&priv->chip, base, GRER); in mrfld_irq_init_hw()
380 reg = gpio_reg(&priv->chip, base, GFER); in mrfld_irq_init_hw()