Lines Matching defs:amdgpu_device
816 struct amdgpu_device { struct
817 struct device *dev;
818 struct pci_dev *pdev;
819 struct drm_device ddev;
822 struct amdgpu_acp acp;
824 struct amdgpu_hive_info *hive;
826 enum amd_asic_type asic_type;
827 uint32_t family;
828 uint32_t rev_id;
829 uint32_t external_rev_id;
830 unsigned long flags;
831 unsigned long apu_flags;
832 int usec_timeout;
833 const struct amdgpu_asic_funcs *asic_funcs;
834 bool shutdown;
835 bool need_swiotlb;
836 bool accel_working;
837 struct notifier_block acpi_nb;
838 struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
839 struct debugfs_blob_wrapper debugfs_vbios_blob;
840 struct debugfs_blob_wrapper debugfs_discovery_blob;
841 struct mutex srbm_mutex;
843 struct mutex grbm_idx_mutex;
844 struct dev_pm_domain vga_pm_domain;
845 bool have_disp_power_ref;
846 bool have_atomics_support;
849 bool is_atom_fw;
850 uint8_t *bios;
851 uint32_t bios_size;
852 uint32_t bios_scratch_reg_offset;
853 uint32_t bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];
856 resource_size_t rmmio_base;
857 resource_size_t rmmio_size;
858 void __iomem *rmmio;
860 spinlock_t mmio_idx_lock;
861 struct amdgpu_mmio_remap rmmio_remap;
863 spinlock_t smc_idx_lock;
864 amdgpu_rreg_t smc_rreg;
865 amdgpu_wreg_t smc_wreg;
867 spinlock_t pcie_idx_lock;
868 amdgpu_rreg_t pcie_rreg;
869 amdgpu_wreg_t pcie_wreg;
870 amdgpu_rreg_t pciep_rreg;
871 amdgpu_wreg_t pciep_wreg;
872 amdgpu_rreg64_t pcie_rreg64;
873 amdgpu_wreg64_t pcie_wreg64;
875 spinlock_t uvd_ctx_idx_lock;
876 amdgpu_rreg_t uvd_ctx_rreg;
877 amdgpu_wreg_t uvd_ctx_wreg;
879 spinlock_t didt_idx_lock;
880 amdgpu_rreg_t didt_rreg;
881 amdgpu_wreg_t didt_wreg;
883 spinlock_t gc_cac_idx_lock;
884 amdgpu_rreg_t gc_cac_rreg;
885 amdgpu_wreg_t gc_cac_wreg;
887 spinlock_t se_cac_idx_lock;
888 amdgpu_rreg_t se_cac_rreg;
889 amdgpu_wreg_t se_cac_wreg;
891 spinlock_t audio_endpt_idx_lock;
892 amdgpu_block_rreg_t audio_endpt_rreg;
893 amdgpu_block_wreg_t audio_endpt_wreg;
894 struct amdgpu_doorbell doorbell;
897 struct amdgpu_clock clock;
900 struct amdgpu_gmc gmc;
901 struct amdgpu_gart gart;
902 dma_addr_t dummy_page_addr;
903 struct amdgpu_vm_manager vm_manager;
904 struct amdgpu_vmhub vmhub[AMDGPU_MAX_VMHUBS];
905 unsigned num_vmhubs;
930 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */ argument
931 struct work_struct hotplug_work;
932 struct amdgpu_irq_src crtc_irq;
933 struct amdgpu_irq_src vline0_irq;
934 struct amdgpu_irq_src vupdate_irq;
935 struct amdgpu_irq_src pageflip_irq;
936 struct amdgpu_irq_src hpd_irq;
937 struct amdgpu_irq_src dmub_trace_irq;
938 struct amdgpu_irq_src dmub_outbox_irq;
941 u64 fence_context;
942 unsigned num_rings;
943 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
944 bool ib_pool_ready;
945 struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
946 struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
949 struct amdgpu_irq irq;
952 struct amd_powerplay powerplay;
953 bool pp_force_state_enabled;
956 struct smu_context smu;
959 struct amdgpu_pm pm;
960 u32 cg_flags;
961 u32 pg_flags;
964 struct amdgpu_nbio nbio;
967 struct amdgpu_hdp hdp;
970 struct amdgpu_smuio smuio;
973 struct amdgpu_mmhub mmhub;
976 struct amdgpu_gfxhub gfxhub;
979 struct amdgpu_gfx gfx;
982 struct amdgpu_sdma sdma;
985 struct amdgpu_uvd uvd;
988 struct amdgpu_vce vce;
991 struct amdgpu_vcn vcn;
994 struct amdgpu_jpeg jpeg;
997 struct amdgpu_firmware firmware;
1000 struct psp_context psp;
1003 struct amdgpu_gds gds;
1006 struct amdgpu_kfd_dev kfd;
1009 struct amdgpu_umc umc;
1012 struct amdgpu_display_manager dm;
1015 bool enable_mes;
1016 struct amdgpu_mes mes;
1019 struct amdgpu_df df;
1022 struct amdgpu_mca mca;
1024 struct amdgpu_ip_block ip_blocks[AMDGPU_MAX_IP_NUM];
1025 uint32_t harvest_ip_mask;
1026 int num_ip_blocks;
1027 struct mutex mn_lock;
1031 atomic64_t vram_pin_size;
1032 atomic64_t visible_pin_size;
1033 atomic64_t gart_pin_size;
1036 uint32_t *reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE];
1039 struct delayed_work delayed_init_work;
1041 struct amdgpu_virt virt;
1044 struct list_head shadow_list;
1045 struct mutex shadow_list_lock;
1048 bool has_hw_reset;
1049 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
1052 bool in_suspend;
1053 bool in_s3;
1054 bool in_s4;
1055 bool in_s0ix;
1057 atomic_t in_gpu_reset;
1058 enum pp_mp1_state mp1_state;
1059 struct rw_semaphore reset_sem;
1060 struct amdgpu_doorbell_index doorbell_index;
1062 struct mutex notifier_lock;
1064 int asic_reset_res;
1065 struct work_struct xgmi_reset_work;
1066 struct list_head reset_list;
1068 long gfx_timeout;
1069 long sdma_timeout;
1070 long video_timeout;
1071 long compute_timeout;
1073 uint64_t unique_id;
1074 uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
1077 bool runpm;
1078 bool in_runpm;
1079 bool has_pr3;
1103 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) in drm_to_adev() argument