Lines Matching refs:sync
51 void amdgpu_sync_create(struct amdgpu_sync *sync) in amdgpu_sync_create() argument
53 hash_init(sync->fences); in amdgpu_sync_create()
54 sync->last_vm_update = NULL; in amdgpu_sync_create()
133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_add_later() argument
137 hash_for_each_possible(sync->fences, e, node, f->context) { in amdgpu_sync_add_later()
155 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_fence() argument
162 if (amdgpu_sync_add_later(sync, f)) in amdgpu_sync_fence()
169 hash_add(sync->fences, &e->node, f->context); in amdgpu_sync_fence()
182 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence) in amdgpu_sync_vm_fence() argument
187 amdgpu_sync_keep_later(&sync->last_vm_update, fence); in amdgpu_sync_vm_fence()
188 return amdgpu_sync_fence(sync, fence); in amdgpu_sync_vm_fence()
251 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, in amdgpu_sync_resv() argument
270 r = amdgpu_sync_fence(sync, f); in amdgpu_sync_resv()
287 r = amdgpu_sync_fence(sync, f); in amdgpu_sync_resv()
304 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, in amdgpu_sync_peek_fence() argument
311 hash_for_each_safe(sync->fences, i, tmp, e, node) { in amdgpu_sync_peek_fence()
346 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync) in amdgpu_sync_get_fence() argument
352 hash_for_each_safe(sync->fences, i, tmp, e, node) { in amdgpu_sync_get_fence()
402 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr) in amdgpu_sync_wait() argument
408 hash_for_each_safe(sync->fences, i, tmp, e, node) { in amdgpu_sync_wait()
428 void amdgpu_sync_free(struct amdgpu_sync *sync) in amdgpu_sync_free() argument
434 hash_for_each_safe(sync->fences, i, tmp, e, node) { in amdgpu_sync_free()
440 dma_fence_put(sync->last_vm_update); in amdgpu_sync_free()