Lines Matching refs:wptr
300 ring->wptr = 0; in vcn_v3_0_hw_init()
312 ring->wptr = 0; in vcn_v3_0_hw_init()
1060 ring->wptr = RREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR); in vcn_v3_0_start_dpg_mode()
1062 lower_32_bits(ring->wptr)); in vcn_v3_0_start_dpg_mode()
1066 fw_shared->rb.wptr = lower_32_bits(ring->wptr); in vcn_v3_0_start_dpg_mode()
1236 ring->wptr = RREG32_SOC15(VCN, i, mmUVD_RBC_RB_RPTR); in vcn_v3_0_start()
1238 lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1239 fw_shared->rb.wptr = lower_32_bits(ring->wptr); in vcn_v3_0_start()
1245 WREG32_SOC15(VCN, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1246 WREG32_SOC15(VCN, i, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1254 WREG32_SOC15(VCN, i, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1255 WREG32_SOC15(VCN, i, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v3_0_start()
1377 ring->wptr = 0; in vcn_v3_0_start_sriov()
1391 ring->wptr = 0; in vcn_v3_0_start_sriov()
1617 ring->wptr = 0; in vcn_v3_0_pause_dpg_mode()
1621 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_pause_dpg_mode()
1622 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_pause_dpg_mode()
1627 ring->wptr = 0; in vcn_v3_0_pause_dpg_mode()
1631 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v3_0_pause_dpg_mode()
1632 WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v3_0_pause_dpg_mode()
1637 WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR, fw_shared->rb.wptr); in vcn_v3_0_pause_dpg_mode()
1704 fw_shared->rb.wptr = lower_32_bits(ring->wptr); in vcn_v3_0_dec_ring_set_wptr()
1706 lower_32_bits(ring->wptr)); in vcn_v3_0_dec_ring_set_wptr()
1710 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v3_0_dec_ring_set_wptr()
1711 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v3_0_dec_ring_set_wptr()
1713 WREG32_SOC15(VCN, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_dec_ring_set_wptr()
2020 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v3_0_enc_ring_set_wptr()
2021 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v3_0_enc_ring_set_wptr()
2023 WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v3_0_enc_ring_set_wptr()
2027 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v3_0_enc_ring_set_wptr()
2028 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v3_0_enc_ring_set_wptr()
2030 WREG32_SOC15(VCN, ring->me, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v3_0_enc_ring_set_wptr()