Lines Matching refs:pp_funcs
914 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_sclk() local
916 return pp_funcs->get_sclk((adev)->powerplay.pp_handle, (low)); in amdgpu_dpm_get_sclk()
921 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_get_mclk() local
923 return pp_funcs->get_mclk((adev)->powerplay.pp_handle, (low)); in amdgpu_dpm_get_mclk()
929 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_powergating_by_smu() local
941 if (pp_funcs && pp_funcs->set_powergating_by_smu) { in amdgpu_dpm_set_powergating_by_smu()
969 ret = (pp_funcs->set_powergating_by_smu( in amdgpu_dpm_set_powergating_by_smu()
980 if (pp_funcs && pp_funcs->set_powergating_by_smu) { in amdgpu_dpm_set_powergating_by_smu()
981 ret = (pp_funcs->set_powergating_by_smu( in amdgpu_dpm_set_powergating_by_smu()
997 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_enter() local
1001 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_enter()
1005 ret = pp_funcs->set_asic_baco_state(pp_handle, 1); in amdgpu_dpm_baco_enter()
1012 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_exit() local
1016 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_exit()
1020 ret = pp_funcs->set_asic_baco_state(pp_handle, 0); in amdgpu_dpm_baco_exit()
1029 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_mp1_state() local
1031 if (pp_funcs && pp_funcs->set_mp1_state) { in amdgpu_dpm_set_mp1_state()
1032 ret = pp_funcs->set_mp1_state( in amdgpu_dpm_set_mp1_state()
1042 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_is_baco_supported() local
1046 if (!pp_funcs || !pp_funcs->get_asic_baco_capability) in amdgpu_dpm_is_baco_supported()
1049 if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap)) in amdgpu_dpm_is_baco_supported()
1057 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_mode2_reset() local
1060 if (!pp_funcs || !pp_funcs->asic_reset_mode_2) in amdgpu_dpm_mode2_reset()
1063 return pp_funcs->asic_reset_mode_2(pp_handle); in amdgpu_dpm_mode2_reset()
1068 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_baco_reset() local
1072 if (!pp_funcs || !pp_funcs->set_asic_baco_state) in amdgpu_dpm_baco_reset()
1076 ret = pp_funcs->set_asic_baco_state(pp_handle, 1); in amdgpu_dpm_baco_reset()
1081 ret = pp_funcs->set_asic_baco_state(pp_handle, 0); in amdgpu_dpm_baco_reset()
1112 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_switch_power_profile() local
1118 if (pp_funcs && pp_funcs->switch_power_profile) in amdgpu_dpm_switch_power_profile()
1119 ret = pp_funcs->switch_power_profile( in amdgpu_dpm_switch_power_profile()
1128 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_xgmi_pstate() local
1131 if (pp_funcs && pp_funcs->set_xgmi_pstate) in amdgpu_dpm_set_xgmi_pstate()
1132 ret = pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle, in amdgpu_dpm_set_xgmi_pstate()
1142 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_set_df_cstate() local
1145 if (pp_funcs && pp_funcs->set_df_cstate) in amdgpu_dpm_set_df_cstate()
1146 ret = pp_funcs->set_df_cstate(pp_handle, cstate); in amdgpu_dpm_set_df_cstate()
1164 const struct amd_pm_funcs *pp_funcs = in amdgpu_dpm_enable_mgpu_fan_boost() local
1165 adev->powerplay.pp_funcs; in amdgpu_dpm_enable_mgpu_fan_boost()
1168 if (pp_funcs && pp_funcs->enable_mgpu_fan_boost) in amdgpu_dpm_enable_mgpu_fan_boost()
1169 ret = pp_funcs->enable_mgpu_fan_boost(pp_handle); in amdgpu_dpm_enable_mgpu_fan_boost()
1178 const struct amd_pm_funcs *pp_funcs = in amdgpu_dpm_set_clockgating_by_smu() local
1179 adev->powerplay.pp_funcs; in amdgpu_dpm_set_clockgating_by_smu()
1182 if (pp_funcs && pp_funcs->set_clockgating_by_smu) in amdgpu_dpm_set_clockgating_by_smu()
1183 ret = pp_funcs->set_clockgating_by_smu(pp_handle, in amdgpu_dpm_set_clockgating_by_smu()
1193 const struct amd_pm_funcs *pp_funcs = in amdgpu_dpm_smu_i2c_bus_access() local
1194 adev->powerplay.pp_funcs; in amdgpu_dpm_smu_i2c_bus_access()
1197 if (pp_funcs && pp_funcs->smu_i2c_bus_access) in amdgpu_dpm_smu_i2c_bus_access()
1198 ret = pp_funcs->smu_i2c_bus_access(pp_handle, in amdgpu_dpm_smu_i2c_bus_access()
1212 if (adev->powerplay.pp_funcs && in amdgpu_pm_acpi_event_handler()
1213 adev->powerplay.pp_funcs->enable_bapm) in amdgpu_pm_acpi_event_handler()
1225 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; in amdgpu_dpm_read_sensor() local
1231 if (pp_funcs && pp_funcs->read_sensor) in amdgpu_dpm_read_sensor()
1232 ret = pp_funcs->read_sensor((adev)->powerplay.pp_handle, in amdgpu_dpm_read_sensor()
1283 if (single_display && adev->powerplay.pp_funcs->vblank_too_short) { in amdgpu_dpm_pick_power_state()
1432 if (amdgpu_dpm == 1 && adev->powerplay.pp_funcs->print_power_state) { in amdgpu_dpm_change_power_state_locked()
1441 if (adev->powerplay.pp_funcs->display_configuration_changed) in amdgpu_dpm_change_power_state_locked()
1448 if (adev->powerplay.pp_funcs->check_state_equal) { in amdgpu_dpm_change_power_state_locked()
1462 if (adev->powerplay.pp_funcs->force_performance_level) { in amdgpu_dpm_change_power_state_locked()
1492 if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_pm_compute_clocks()
1504 if (adev->powerplay.pp_funcs->display_configuration_change) in amdgpu_pm_compute_clocks()
1505 adev->powerplay.pp_funcs->display_configuration_change( in amdgpu_pm_compute_clocks()
1582 if (adev->powerplay.pp_funcs->print_power_state == NULL) in amdgpu_pm_print_power_states()
1604 if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) { in amdgpu_pm_load_smu_firmware()
1605 r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); in amdgpu_pm_load_smu_firmware()