Lines Matching refs:pps
51 enum pipe pipe = intel_dp->pps.pps_pipe; in vlv_power_sequencer_kick()
137 intel_dp->pps.active_pipe != INVALID_PIPE && in vlv_find_free_pps()
138 intel_dp->pps.active_pipe != in vlv_find_free_pps()
139 intel_dp->pps.pps_pipe); in vlv_find_free_pps()
141 if (intel_dp->pps.pps_pipe != INVALID_PIPE) in vlv_find_free_pps()
142 pipes &= ~(1 << intel_dp->pps.pps_pipe); in vlv_find_free_pps()
145 intel_dp->pps.pps_pipe != INVALID_PIPE); in vlv_find_free_pps()
147 if (intel_dp->pps.active_pipe != INVALID_PIPE) in vlv_find_free_pps()
148 pipes &= ~(1 << intel_dp->pps.active_pipe); in vlv_find_free_pps()
170 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE && in vlv_power_sequencer_pipe()
171 intel_dp->pps.active_pipe != intel_dp->pps.pps_pipe); in vlv_power_sequencer_pipe()
173 if (intel_dp->pps.pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
174 return intel_dp->pps.pps_pipe; in vlv_power_sequencer_pipe()
186 intel_dp->pps.pps_pipe = pipe; in vlv_power_sequencer_pipe()
190 pipe_name(intel_dp->pps.pps_pipe), in vlv_power_sequencer_pipe()
204 return intel_dp->pps.pps_pipe; in vlv_power_sequencer_pipe()
218 if (!intel_dp->pps.pps_reset) in bxt_power_sequencer_idx()
221 intel_dp->pps.pps_reset = false; in bxt_power_sequencer_idx()
287 intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
290 if (intel_dp->pps.pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
291 intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
294 if (intel_dp->pps.pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
295 intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
299 if (intel_dp->pps.pps_pipe == INVALID_PIPE) { in vlv_initial_power_sequencer_setup()
311 pipe_name(intel_dp->pps.pps_pipe)); in vlv_initial_power_sequencer_setup()
338 intel_dp->pps.active_pipe != INVALID_PIPE); in intel_pps_reset_all()
344 intel_dp->pps.pps_reset = true; in intel_pps_reset_all()
346 intel_dp->pps.pps_pipe = INVALID_PIPE; in intel_pps_reset_all()
411 intel_dp->pps.pps_pipe == INVALID_PIPE) in edp_have_panel_power()
424 intel_dp->pps.pps_pipe == INVALID_PIPE) in edp_have_panel_vdd()
514 panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time); in wait_panel_power_cycle()
518 if (panel_power_off_duration < (s64)intel_dp->pps.panel_power_cycle_delay) in wait_panel_power_cycle()
520 intel_dp->pps.panel_power_cycle_delay - panel_power_off_duration); in wait_panel_power_cycle()
538 wait_remaining_ms_from_jiffies(intel_dp->pps.last_power_on, in wait_backlight_on()
539 intel_dp->pps.backlight_on_delay); in wait_backlight_on()
544 wait_remaining_ms_from_jiffies(intel_dp->pps.last_backlight_off, in edp_wait_backlight_off()
545 intel_dp->pps.backlight_off_delay); in edp_wait_backlight_off()
579 bool need_to_disable = !intel_dp->pps.want_panel_vdd; in intel_pps_vdd_on_unlocked()
586 cancel_delayed_work(&intel_dp->pps.panel_vdd_work); in intel_pps_vdd_on_unlocked()
587 intel_dp->pps.want_panel_vdd = true; in intel_pps_vdd_on_unlocked()
592 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref); in intel_pps_vdd_on_unlocked()
593 intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv, in intel_pps_vdd_on_unlocked()
622 msleep(intel_dp->pps.panel_power_up_delay); in intel_pps_vdd_on_unlocked()
660 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.want_panel_vdd); in intel_pps_vdd_off_sync_unlocked()
684 intel_dp->pps.panel_power_off_time = ktime_get_boottime(); in intel_pps_vdd_off_sync_unlocked()
688 fetch_and_zero(&intel_dp->pps.vdd_wakeref)); in intel_pps_vdd_off_sync_unlocked()
698 cancel_delayed_work_sync(&intel_dp->pps.panel_vdd_work); in intel_pps_vdd_off_sync()
709 struct intel_pps *pps = container_of(to_delayed_work(__work), in edp_panel_vdd_work() local
711 struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps); in edp_panel_vdd_work()
715 if (!intel_dp->pps.want_panel_vdd) in edp_panel_vdd_work()
729 delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5); in edp_panel_vdd_schedule_off()
730 schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay); in edp_panel_vdd_schedule_off()
747 I915_STATE_WARN(!intel_dp->pps.want_panel_vdd, "[ENCODER:%d:%s] VDD not forced on", in intel_pps_vdd_off_unlocked()
751 intel_dp->pps.want_panel_vdd = false; in intel_pps_vdd_off_unlocked()
799 intel_dp->pps.last_power_on = jiffies; in intel_pps_on_unlocked()
834 drm_WARN(&dev_priv->drm, !intel_dp->pps.want_panel_vdd, in intel_pps_off_unlocked()
846 intel_dp->pps.want_panel_vdd = false; in intel_pps_off_unlocked()
852 intel_dp->pps.panel_power_off_time = ktime_get_boottime(); in intel_pps_off_unlocked()
857 fetch_and_zero(&intel_dp->pps.vdd_wakeref)); in intel_pps_off_unlocked()
917 intel_dp->pps.last_backlight_off = jiffies; in intel_pps_backlight_off()
951 enum pipe pipe = intel_dp->pps.pps_pipe; in vlv_detach_power_sequencer()
954 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE); in vlv_detach_power_sequencer()
977 intel_dp->pps.pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
990 drm_WARN(&dev_priv->drm, intel_dp->pps.active_pipe == pipe, in vlv_steal_power_sequencer()
995 if (intel_dp->pps.pps_pipe != pipe) in vlv_steal_power_sequencer()
1017 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE); in vlv_pps_init()
1019 if (intel_dp->pps.pps_pipe != INVALID_PIPE && in vlv_pps_init()
1020 intel_dp->pps.pps_pipe != crtc->pipe) { in vlv_pps_init()
1035 intel_dp->pps.active_pipe = crtc->pipe; in vlv_pps_init()
1041 intel_dp->pps.pps_pipe = crtc->pipe; in vlv_pps_init()
1045 pipe_name(intel_dp->pps.pps_pipe), encoder->base.base.id, in vlv_pps_init()
1071 drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref); in intel_pps_vdd_sanitize()
1072 intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv, in intel_pps_vdd_sanitize()
1093 intel_dp->pps.panel_power_off_time = ktime_get_boottime(); in pps_init_timestamps()
1094 intel_dp->pps.last_power_on = jiffies; in pps_init_timestamps()
1095 intel_dp->pps.last_backlight_off = jiffies; in pps_init_timestamps()
1145 struct edp_power_seq *sw = &intel_dp->pps.pps_delays; in intel_pps_verify_state()
1161 *final = &intel_dp->pps.pps_delays; in pps_init_delays()
1173 vbt = dev_priv->vbt.edp.pps; in pps_init_delays()
1218 intel_dp->pps.panel_power_up_delay = get_delay(t1_t3); in pps_init_delays()
1219 intel_dp->pps.backlight_on_delay = get_delay(t8); in pps_init_delays()
1220 intel_dp->pps.backlight_off_delay = get_delay(t9); in pps_init_delays()
1221 intel_dp->pps.panel_power_down_delay = get_delay(t10); in pps_init_delays()
1222 intel_dp->pps.panel_power_cycle_delay = get_delay(t11_t12); in pps_init_delays()
1227 intel_dp->pps.panel_power_up_delay, in pps_init_delays()
1228 intel_dp->pps.panel_power_down_delay, in pps_init_delays()
1229 intel_dp->pps.panel_power_cycle_delay); in pps_init_delays()
1232 intel_dp->pps.backlight_on_delay, in pps_init_delays()
1233 intel_dp->pps.backlight_off_delay); in pps_init_delays()
1259 const struct edp_power_seq *seq = &intel_dp->pps.pps_delays; in pps_init_registers()
1372 INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); in intel_pps_init()