Lines Matching refs:val
213 static inline uint32_t AXXX_CP_RB_CNTL_BUFSZ(uint32_t val) in AXXX_CP_RB_CNTL_BUFSZ() argument
215 return ((val) << AXXX_CP_RB_CNTL_BUFSZ__SHIFT) & AXXX_CP_RB_CNTL_BUFSZ__MASK; in AXXX_CP_RB_CNTL_BUFSZ()
219 static inline uint32_t AXXX_CP_RB_CNTL_BLKSZ(uint32_t val) in AXXX_CP_RB_CNTL_BLKSZ() argument
221 return ((val) << AXXX_CP_RB_CNTL_BLKSZ__SHIFT) & AXXX_CP_RB_CNTL_BLKSZ__MASK; in AXXX_CP_RB_CNTL_BLKSZ()
225 static inline uint32_t AXXX_CP_RB_CNTL_BUF_SWAP(uint32_t val) in AXXX_CP_RB_CNTL_BUF_SWAP() argument
227 return ((val) << AXXX_CP_RB_CNTL_BUF_SWAP__SHIFT) & AXXX_CP_RB_CNTL_BUF_SWAP__MASK; in AXXX_CP_RB_CNTL_BUF_SWAP()
236 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_SWAP(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_SWAP() argument
238 return ((val) << AXXX_CP_RB_RPTR_ADDR_SWAP__SHIFT) & AXXX_CP_RB_RPTR_ADDR_SWAP__MASK; in AXXX_CP_RB_RPTR_ADDR_SWAP()
242 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_ADDR(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_ADDR() argument
244 return ((val >> 2) << AXXX_CP_RB_RPTR_ADDR_ADDR__SHIFT) & AXXX_CP_RB_RPTR_ADDR_ADDR__MASK; in AXXX_CP_RB_RPTR_ADDR_ADDR()
260 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START() argument
262 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START()
266 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START() argument
268 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START()
272 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START() argument
274 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_S… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START()
280 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_MEQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_MEQ_END() argument
282 return ((val) << AXXX_CP_MEQ_THRESHOLDS_MEQ_END__SHIFT) & AXXX_CP_MEQ_THRESHOLDS_MEQ_END__MASK; in AXXX_CP_MEQ_THRESHOLDS_MEQ_END()
286 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_ROQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_ROQ_END() argument
288 return ((val) << AXXX_CP_MEQ_THRESHOLDS_ROQ_END__SHIFT) & AXXX_CP_MEQ_THRESHOLDS_ROQ_END__MASK; in AXXX_CP_MEQ_THRESHOLDS_ROQ_END()
294 static inline uint32_t AXXX_CP_CSQ_AVAIL_RING(uint32_t val) in AXXX_CP_CSQ_AVAIL_RING() argument
296 return ((val) << AXXX_CP_CSQ_AVAIL_RING__SHIFT) & AXXX_CP_CSQ_AVAIL_RING__MASK; in AXXX_CP_CSQ_AVAIL_RING()
300 static inline uint32_t AXXX_CP_CSQ_AVAIL_IB1(uint32_t val) in AXXX_CP_CSQ_AVAIL_IB1() argument
302 return ((val) << AXXX_CP_CSQ_AVAIL_IB1__SHIFT) & AXXX_CP_CSQ_AVAIL_IB1__MASK; in AXXX_CP_CSQ_AVAIL_IB1()
306 static inline uint32_t AXXX_CP_CSQ_AVAIL_IB2(uint32_t val) in AXXX_CP_CSQ_AVAIL_IB2() argument
308 return ((val) << AXXX_CP_CSQ_AVAIL_IB2__SHIFT) & AXXX_CP_CSQ_AVAIL_IB2__MASK; in AXXX_CP_CSQ_AVAIL_IB2()
314 static inline uint32_t AXXX_CP_STQ_AVAIL_ST(uint32_t val) in AXXX_CP_STQ_AVAIL_ST() argument
316 return ((val) << AXXX_CP_STQ_AVAIL_ST__SHIFT) & AXXX_CP_STQ_AVAIL_ST__MASK; in AXXX_CP_STQ_AVAIL_ST()
322 static inline uint32_t AXXX_CP_MEQ_AVAIL_MEQ(uint32_t val) in AXXX_CP_MEQ_AVAIL_MEQ() argument
324 return ((val) << AXXX_CP_MEQ_AVAIL_MEQ__SHIFT) & AXXX_CP_MEQ_AVAIL_MEQ__MASK; in AXXX_CP_MEQ_AVAIL_MEQ()
330 static inline uint32_t AXXX_SCRATCH_UMSK_UMSK(uint32_t val) in AXXX_SCRATCH_UMSK_UMSK() argument
332 return ((val) << AXXX_SCRATCH_UMSK_UMSK__SHIFT) & AXXX_SCRATCH_UMSK_UMSK__MASK; in AXXX_SCRATCH_UMSK_UMSK()
336 static inline uint32_t AXXX_SCRATCH_UMSK_SWAP(uint32_t val) in AXXX_SCRATCH_UMSK_SWAP() argument
338 return ((val) << AXXX_SCRATCH_UMSK_SWAP__SHIFT) & AXXX_SCRATCH_UMSK_SWAP__MASK; in AXXX_SCRATCH_UMSK_SWAP()
389 static inline uint32_t AXXX_CP_CSQ_RB_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_RB_STAT_RPTR() argument
391 return ((val) << AXXX_CP_CSQ_RB_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_RB_STAT_RPTR__MASK; in AXXX_CP_CSQ_RB_STAT_RPTR()
395 static inline uint32_t AXXX_CP_CSQ_RB_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_RB_STAT_WPTR() argument
397 return ((val) << AXXX_CP_CSQ_RB_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_RB_STAT_WPTR__MASK; in AXXX_CP_CSQ_RB_STAT_WPTR()
403 static inline uint32_t AXXX_CP_CSQ_IB1_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_IB1_STAT_RPTR() argument
405 return ((val) << AXXX_CP_CSQ_IB1_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_IB1_STAT_RPTR__MASK; in AXXX_CP_CSQ_IB1_STAT_RPTR()
409 static inline uint32_t AXXX_CP_CSQ_IB1_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_IB1_STAT_WPTR() argument
411 return ((val) << AXXX_CP_CSQ_IB1_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_IB1_STAT_WPTR__MASK; in AXXX_CP_CSQ_IB1_STAT_WPTR()
417 static inline uint32_t AXXX_CP_CSQ_IB2_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_IB2_STAT_RPTR() argument
419 return ((val) << AXXX_CP_CSQ_IB2_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_IB2_STAT_RPTR__MASK; in AXXX_CP_CSQ_IB2_STAT_RPTR()
423 static inline uint32_t AXXX_CP_CSQ_IB2_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_IB2_STAT_WPTR() argument
425 return ((val) << AXXX_CP_CSQ_IB2_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_IB2_STAT_WPTR__MASK; in AXXX_CP_CSQ_IB2_STAT_WPTR()
459 static inline uint32_t AXXX_CP_STAT_CP_BUSY(uint32_t val) in AXXX_CP_STAT_CP_BUSY() argument
461 return ((val) << AXXX_CP_STAT_CP_BUSY__SHIFT) & AXXX_CP_STAT_CP_BUSY__MASK; in AXXX_CP_STAT_CP_BUSY()
465 static inline uint32_t AXXX_CP_STAT_VS_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_VS_EVENT_FIFO_BUSY() argument
467 return ((val) << AXXX_CP_STAT_VS_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_VS_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_VS_EVENT_FIFO_BUSY()
471 static inline uint32_t AXXX_CP_STAT_PS_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_PS_EVENT_FIFO_BUSY() argument
473 return ((val) << AXXX_CP_STAT_PS_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_PS_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_PS_EVENT_FIFO_BUSY()
477 static inline uint32_t AXXX_CP_STAT_CF_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_CF_EVENT_FIFO_BUSY() argument
479 return ((val) << AXXX_CP_STAT_CF_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_CF_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_CF_EVENT_FIFO_BUSY()
483 static inline uint32_t AXXX_CP_STAT_RB_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_RB_EVENT_FIFO_BUSY() argument
485 return ((val) << AXXX_CP_STAT_RB_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_RB_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_RB_EVENT_FIFO_BUSY()
489 static inline uint32_t AXXX_CP_STAT_ME_BUSY(uint32_t val) in AXXX_CP_STAT_ME_BUSY() argument
491 return ((val) << AXXX_CP_STAT_ME_BUSY__SHIFT) & AXXX_CP_STAT_ME_BUSY__MASK; in AXXX_CP_STAT_ME_BUSY()
495 static inline uint32_t AXXX_CP_STAT_MIU_WR_C_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_WR_C_BUSY() argument
497 return ((val) << AXXX_CP_STAT_MIU_WR_C_BUSY__SHIFT) & AXXX_CP_STAT_MIU_WR_C_BUSY__MASK; in AXXX_CP_STAT_MIU_WR_C_BUSY()
501 static inline uint32_t AXXX_CP_STAT_CP_3D_BUSY(uint32_t val) in AXXX_CP_STAT_CP_3D_BUSY() argument
503 return ((val) << AXXX_CP_STAT_CP_3D_BUSY__SHIFT) & AXXX_CP_STAT_CP_3D_BUSY__MASK; in AXXX_CP_STAT_CP_3D_BUSY()
507 static inline uint32_t AXXX_CP_STAT_CP_NRT_BUSY(uint32_t val) in AXXX_CP_STAT_CP_NRT_BUSY() argument
509 return ((val) << AXXX_CP_STAT_CP_NRT_BUSY__SHIFT) & AXXX_CP_STAT_CP_NRT_BUSY__MASK; in AXXX_CP_STAT_CP_NRT_BUSY()
513 static inline uint32_t AXXX_CP_STAT_RBIU_SCRATCH_BUSY(uint32_t val) in AXXX_CP_STAT_RBIU_SCRATCH_BUSY() argument
515 return ((val) << AXXX_CP_STAT_RBIU_SCRATCH_BUSY__SHIFT) & AXXX_CP_STAT_RBIU_SCRATCH_BUSY__MASK; in AXXX_CP_STAT_RBIU_SCRATCH_BUSY()
519 static inline uint32_t AXXX_CP_STAT_RCIU_ME_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_ME_BUSY() argument
521 return ((val) << AXXX_CP_STAT_RCIU_ME_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_ME_BUSY__MASK; in AXXX_CP_STAT_RCIU_ME_BUSY()
525 static inline uint32_t AXXX_CP_STAT_RCIU_PFP_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_PFP_BUSY() argument
527 return ((val) << AXXX_CP_STAT_RCIU_PFP_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_PFP_BUSY__MASK; in AXXX_CP_STAT_RCIU_PFP_BUSY()
531 static inline uint32_t AXXX_CP_STAT_MEQ_RING_BUSY(uint32_t val) in AXXX_CP_STAT_MEQ_RING_BUSY() argument
533 return ((val) << AXXX_CP_STAT_MEQ_RING_BUSY__SHIFT) & AXXX_CP_STAT_MEQ_RING_BUSY__MASK; in AXXX_CP_STAT_MEQ_RING_BUSY()
537 static inline uint32_t AXXX_CP_STAT_PFP_BUSY(uint32_t val) in AXXX_CP_STAT_PFP_BUSY() argument
539 return ((val) << AXXX_CP_STAT_PFP_BUSY__SHIFT) & AXXX_CP_STAT_PFP_BUSY__MASK; in AXXX_CP_STAT_PFP_BUSY()
543 static inline uint32_t AXXX_CP_STAT_ST_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_ST_QUEUE_BUSY() argument
545 return ((val) << AXXX_CP_STAT_ST_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_ST_QUEUE_BUSY__MASK; in AXXX_CP_STAT_ST_QUEUE_BUSY()
549 static inline uint32_t AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY() argument
551 …return ((val) << AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY__MA… in AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY()
555 static inline uint32_t AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY() argument
557 …return ((val) << AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY__MA… in AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY()
561 static inline uint32_t AXXX_CP_STAT_RING_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_RING_QUEUE_BUSY() argument
563 return ((val) << AXXX_CP_STAT_RING_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_RING_QUEUE_BUSY__MASK; in AXXX_CP_STAT_RING_QUEUE_BUSY()
567 static inline uint32_t AXXX_CP_STAT_CSF_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_BUSY() argument
569 return ((val) << AXXX_CP_STAT_CSF_BUSY__SHIFT) & AXXX_CP_STAT_CSF_BUSY__MASK; in AXXX_CP_STAT_CSF_BUSY()
573 static inline uint32_t AXXX_CP_STAT_CSF_ST_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_ST_BUSY() argument
575 return ((val) << AXXX_CP_STAT_CSF_ST_BUSY__SHIFT) & AXXX_CP_STAT_CSF_ST_BUSY__MASK; in AXXX_CP_STAT_CSF_ST_BUSY()
579 static inline uint32_t AXXX_CP_STAT_EVENT_BUSY(uint32_t val) in AXXX_CP_STAT_EVENT_BUSY() argument
581 return ((val) << AXXX_CP_STAT_EVENT_BUSY__SHIFT) & AXXX_CP_STAT_EVENT_BUSY__MASK; in AXXX_CP_STAT_EVENT_BUSY()
585 static inline uint32_t AXXX_CP_STAT_CSF_INDIRECT2_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_INDIRECT2_BUSY() argument
587 return ((val) << AXXX_CP_STAT_CSF_INDIRECT2_BUSY__SHIFT) & AXXX_CP_STAT_CSF_INDIRECT2_BUSY__MASK; in AXXX_CP_STAT_CSF_INDIRECT2_BUSY()
591 static inline uint32_t AXXX_CP_STAT_CSF_INDIRECTS_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_INDIRECTS_BUSY() argument
593 return ((val) << AXXX_CP_STAT_CSF_INDIRECTS_BUSY__SHIFT) & AXXX_CP_STAT_CSF_INDIRECTS_BUSY__MASK; in AXXX_CP_STAT_CSF_INDIRECTS_BUSY()
597 static inline uint32_t AXXX_CP_STAT_CSF_RING_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_RING_BUSY() argument
599 return ((val) << AXXX_CP_STAT_CSF_RING_BUSY__SHIFT) & AXXX_CP_STAT_CSF_RING_BUSY__MASK; in AXXX_CP_STAT_CSF_RING_BUSY()
603 static inline uint32_t AXXX_CP_STAT_RCIU_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_BUSY() argument
605 return ((val) << AXXX_CP_STAT_RCIU_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_BUSY__MASK; in AXXX_CP_STAT_RCIU_BUSY()
609 static inline uint32_t AXXX_CP_STAT_RBIU_BUSY(uint32_t val) in AXXX_CP_STAT_RBIU_BUSY() argument
611 return ((val) << AXXX_CP_STAT_RBIU_BUSY__SHIFT) & AXXX_CP_STAT_RBIU_BUSY__MASK; in AXXX_CP_STAT_RBIU_BUSY()
615 static inline uint32_t AXXX_CP_STAT_MIU_RD_RETURN_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_RD_RETURN_BUSY() argument
617 return ((val) << AXXX_CP_STAT_MIU_RD_RETURN_BUSY__SHIFT) & AXXX_CP_STAT_MIU_RD_RETURN_BUSY__MASK; in AXXX_CP_STAT_MIU_RD_RETURN_BUSY()
621 static inline uint32_t AXXX_CP_STAT_MIU_RD_REQ_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_RD_REQ_BUSY() argument
623 return ((val) << AXXX_CP_STAT_MIU_RD_REQ_BUSY__SHIFT) & AXXX_CP_STAT_MIU_RD_REQ_BUSY__MASK; in AXXX_CP_STAT_MIU_RD_REQ_BUSY()