Lines Matching refs:i1
361 …_t REG_MDP4_OVLP_STAGE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE() argument
363 …REG_MDP4_OVLP_STAGE_OP(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_OP() argument
383 …P4_OVLP_STAGE_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_FG_ALPHA() argument
385 …P4_OVLP_STAGE_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_BG_ALPHA() argument
387 …OVLP_STAGE_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_TRANSP_LOW0() argument
389 …OVLP_STAGE_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_TRANSP_LOW1() argument
391 …VLP_STAGE_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH0() argument
393 …VLP_STAGE_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_OVLP(i0) + __offse… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH1() argument
405 …_MDP4_OVLP_STAGE_CO3(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offset_… in REG_MDP4_OVLP_STAGE_CO3() argument
407 …4_OVLP_STAGE_CO3_SEL(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_OVLP(i0) + __offset_… in REG_MDP4_OVLP_STAGE_CO3_SEL() argument
423 …nt32_t REG_MDP4_OVLP_CSC_MV(uint32_t i0, uint32_t i1) { return 0x00002400 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_MV() argument
425 …_t REG_MDP4_OVLP_CSC_MV_VAL(uint32_t i0, uint32_t i1) { return 0x00002400 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_MV_VAL() argument
427 …_t REG_MDP4_OVLP_CSC_PRE_BV(uint32_t i0, uint32_t i1) { return 0x00002500 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_PRE_BV() argument
429 …EG_MDP4_OVLP_CSC_PRE_BV_VAL(uint32_t i0, uint32_t i1) { return 0x00002500 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_PRE_BV_VAL() argument
431 …t REG_MDP4_OVLP_CSC_POST_BV(uint32_t i0, uint32_t i1) { return 0x00002580 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_POST_BV() argument
433 …G_MDP4_OVLP_CSC_POST_BV_VAL(uint32_t i0, uint32_t i1) { return 0x00002580 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_POST_BV_VAL() argument
435 …_t REG_MDP4_OVLP_CSC_PRE_LV(uint32_t i0, uint32_t i1) { return 0x00002600 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_PRE_LV() argument
437 …EG_MDP4_OVLP_CSC_PRE_LV_VAL(uint32_t i0, uint32_t i1) { return 0x00002600 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_PRE_LV_VAL() argument
439 …t REG_MDP4_OVLP_CSC_POST_LV(uint32_t i0, uint32_t i1) { return 0x00002680 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_POST_LV() argument
441 …G_MDP4_OVLP_CSC_POST_LV_VAL(uint32_t i0, uint32_t i1) { return 0x00002680 + __offset_OVLP(i0) + 0x… in REG_MDP4_OVLP_CSC_POST_LV_VAL() argument
447 …nline uint32_t REG_MDP4_LUTN_LUT(uint32_t i0, uint32_t i1) { return 0x00094800 + 0x400*i0 + 0x4*i1… in REG_MDP4_LUTN_LUT() argument
449 …e uint32_t REG_MDP4_LUTN_LUT_VAL(uint32_t i0, uint32_t i1) { return 0x00094800 + 0x400*i0 + 0x4*i1… in REG_MDP4_LUTN_LUT_VAL() argument
578 …2_t REG_MDP4_DMA_CSC_MV(enum mdp4_dma i0, uint32_t i1) { return 0x00003400 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_MV() argument
580 …REG_MDP4_DMA_CSC_MV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003400 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_MV_VAL() argument
582 …REG_MDP4_DMA_CSC_PRE_BV(enum mdp4_dma i0, uint32_t i1) { return 0x00003500 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_PRE_BV() argument
584 …MDP4_DMA_CSC_PRE_BV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003500 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_PRE_BV_VAL() argument
586 …EG_MDP4_DMA_CSC_POST_BV(enum mdp4_dma i0, uint32_t i1) { return 0x00003580 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_POST_BV() argument
588 …DP4_DMA_CSC_POST_BV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003580 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_POST_BV_VAL() argument
590 …REG_MDP4_DMA_CSC_PRE_LV(enum mdp4_dma i0, uint32_t i1) { return 0x00003600 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_PRE_LV() argument
592 …MDP4_DMA_CSC_PRE_LV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003600 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_PRE_LV_VAL() argument
594 …EG_MDP4_DMA_CSC_POST_LV(enum mdp4_dma i0, uint32_t i1) { return 0x00003680 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_POST_LV() argument
596 …DP4_DMA_CSC_POST_LV_VAL(enum mdp4_dma i0, uint32_t i1) { return 0x00003680 + __offset_DMA(i0) + 0x… in REG_MDP4_DMA_CSC_POST_LV_VAL() argument
829 …32_t REG_MDP4_PIPE_CSC_MV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_MV() argument
831 … REG_MDP4_PIPE_CSC_MV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024400 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_MV_VAL() argument
833 … REG_MDP4_PIPE_CSC_PRE_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024500 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_PRE_BV() argument
835 …_MDP4_PIPE_CSC_PRE_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024500 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_PRE_BV_VAL() argument
837 …REG_MDP4_PIPE_CSC_POST_BV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024580 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_POST_BV() argument
839 …MDP4_PIPE_CSC_POST_BV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024580 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_POST_BV_VAL() argument
841 … REG_MDP4_PIPE_CSC_PRE_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024600 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_PRE_LV() argument
843 …_MDP4_PIPE_CSC_PRE_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024600 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_PRE_LV_VAL() argument
845 …REG_MDP4_PIPE_CSC_POST_LV(enum mdp4_pipe i0, uint32_t i1) { return 0x00024680 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_POST_LV() argument
847 …MDP4_PIPE_CSC_POST_LV_VAL(enum mdp4_pipe i0, uint32_t i1) { return 0x00024680 + 0x10000*i0 + 0x4*i… in REG_MDP4_PIPE_CSC_POST_LV_VAL() argument