Lines Matching refs:bo
45 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
52 static void radeon_update_memory_usage(struct ttm_buffer_object *bo, in radeon_update_memory_usage() argument
55 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); in radeon_update_memory_usage()
60 atomic64_add(bo->base.size, &rdev->gtt_usage); in radeon_update_memory_usage()
62 atomic64_sub(bo->base.size, &rdev->gtt_usage); in radeon_update_memory_usage()
66 atomic64_add(bo->base.size, &rdev->vram_usage); in radeon_update_memory_usage()
68 atomic64_sub(bo->base.size, &rdev->vram_usage); in radeon_update_memory_usage()
75 struct radeon_bo *bo; in radeon_ttm_bo_destroy() local
77 bo = container_of(tbo, struct radeon_bo, tbo); in radeon_ttm_bo_destroy()
79 mutex_lock(&bo->rdev->gem.mutex); in radeon_ttm_bo_destroy()
80 list_del_init(&bo->list); in radeon_ttm_bo_destroy()
81 mutex_unlock(&bo->rdev->gem.mutex); in radeon_ttm_bo_destroy()
82 radeon_bo_clear_surface_reg(bo); in radeon_ttm_bo_destroy()
83 WARN_ON_ONCE(!list_empty(&bo->va)); in radeon_ttm_bo_destroy()
84 if (bo->tbo.base.import_attach) in radeon_ttm_bo_destroy()
85 drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg); in radeon_ttm_bo_destroy()
86 drm_gem_object_release(&bo->tbo.base); in radeon_ttm_bo_destroy()
87 kfree(bo); in radeon_ttm_bo_destroy()
90 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo) in radeon_ttm_bo_is_radeon_bo() argument
92 if (bo->destroy == &radeon_ttm_bo_destroy) in radeon_ttm_bo_is_radeon_bo()
157 struct radeon_bo *bo; in radeon_bo_create() local
173 bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL); in radeon_bo_create()
174 if (bo == NULL) in radeon_bo_create()
176 drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size); in radeon_bo_create()
177 bo->rdev = rdev; in radeon_bo_create()
178 bo->surface_reg = -1; in radeon_bo_create()
179 INIT_LIST_HEAD(&bo->list); in radeon_bo_create()
180 INIT_LIST_HEAD(&bo->va); in radeon_bo_create()
181 bo->initial_domain = domain & (RADEON_GEM_DOMAIN_VRAM | in radeon_bo_create()
185 bo->flags = flags; in radeon_bo_create()
188 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
194 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
200 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
211 if (bo->flags & RADEON_GEM_GTT_WC) in radeon_bo_create()
214 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
220 bo->flags &= ~RADEON_GEM_GTT_WC; in radeon_bo_create()
223 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_create()
226 r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type, in radeon_bo_create()
227 &bo->placement, page_align, !kernel, sg, resv, in radeon_bo_create()
233 *bo_ptr = bo; in radeon_bo_create()
235 trace_radeon_bo_create(bo); in radeon_bo_create()
240 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr) in radeon_bo_kmap() argument
245 if (bo->kptr) { in radeon_bo_kmap()
247 *ptr = bo->kptr; in radeon_bo_kmap()
251 r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.resource->num_pages, &bo->kmap); in radeon_bo_kmap()
255 bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem); in radeon_bo_kmap()
257 *ptr = bo->kptr; in radeon_bo_kmap()
259 radeon_bo_check_tiling(bo, 0, 0); in radeon_bo_kmap()
263 void radeon_bo_kunmap(struct radeon_bo *bo) in radeon_bo_kunmap() argument
265 if (bo->kptr == NULL) in radeon_bo_kunmap()
267 bo->kptr = NULL; in radeon_bo_kunmap()
268 radeon_bo_check_tiling(bo, 0, 0); in radeon_bo_kunmap()
269 ttm_bo_kunmap(&bo->kmap); in radeon_bo_kunmap()
272 struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo) in radeon_bo_ref() argument
274 if (bo == NULL) in radeon_bo_ref()
277 ttm_bo_get(&bo->tbo); in radeon_bo_ref()
278 return bo; in radeon_bo_ref()
281 void radeon_bo_unref(struct radeon_bo **bo) in radeon_bo_unref() argument
285 if ((*bo) == NULL) in radeon_bo_unref()
287 tbo = &((*bo)->tbo); in radeon_bo_unref()
289 *bo = NULL; in radeon_bo_unref()
292 int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, in radeon_bo_pin_restricted() argument
298 if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm)) in radeon_bo_pin_restricted()
301 if (bo->tbo.pin_count) { in radeon_bo_pin_restricted()
302 ttm_bo_pin(&bo->tbo); in radeon_bo_pin_restricted()
304 *gpu_addr = radeon_bo_gpu_offset(bo); in radeon_bo_pin_restricted()
310 domain_start = bo->rdev->mc.vram_start; in radeon_bo_pin_restricted()
312 domain_start = bo->rdev->mc.gtt_start; in radeon_bo_pin_restricted()
314 (radeon_bo_gpu_offset(bo) - domain_start)); in radeon_bo_pin_restricted()
319 if (bo->prime_shared_count && domain == RADEON_GEM_DOMAIN_VRAM) { in radeon_bo_pin_restricted()
324 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_pin_restricted()
325 for (i = 0; i < bo->placement.num_placement; i++) { in radeon_bo_pin_restricted()
327 if ((bo->placements[i].mem_type == TTM_PL_VRAM) && in radeon_bo_pin_restricted()
328 !(bo->flags & RADEON_GEM_NO_CPU_ACCESS) && in radeon_bo_pin_restricted()
329 (!max_offset || max_offset > bo->rdev->mc.visible_vram_size)) in radeon_bo_pin_restricted()
330 bo->placements[i].lpfn = in radeon_bo_pin_restricted()
331 bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; in radeon_bo_pin_restricted()
333 bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; in radeon_bo_pin_restricted()
336 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); in radeon_bo_pin_restricted()
338 ttm_bo_pin(&bo->tbo); in radeon_bo_pin_restricted()
340 *gpu_addr = radeon_bo_gpu_offset(bo); in radeon_bo_pin_restricted()
342 bo->rdev->vram_pin_size += radeon_bo_size(bo); in radeon_bo_pin_restricted()
344 bo->rdev->gart_pin_size += radeon_bo_size(bo); in radeon_bo_pin_restricted()
346 dev_err(bo->rdev->dev, "%p pin failed\n", bo); in radeon_bo_pin_restricted()
351 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) in radeon_bo_pin() argument
353 return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr); in radeon_bo_pin()
356 void radeon_bo_unpin(struct radeon_bo *bo) in radeon_bo_unpin() argument
358 ttm_bo_unpin(&bo->tbo); in radeon_bo_unpin()
359 if (!bo->tbo.pin_count) { in radeon_bo_unpin()
360 if (bo->tbo.resource->mem_type == TTM_PL_VRAM) in radeon_bo_unpin()
361 bo->rdev->vram_pin_size -= radeon_bo_size(bo); in radeon_bo_unpin()
363 bo->rdev->gart_pin_size -= radeon_bo_size(bo); in radeon_bo_unpin()
388 struct radeon_bo *bo, *n; in radeon_bo_force_delete() local
394 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { in radeon_bo_force_delete()
396 &bo->tbo.base, bo, (unsigned long)bo->tbo.base.size, in radeon_bo_force_delete()
397 *((unsigned long *)&bo->tbo.base.refcount)); in radeon_bo_force_delete()
398 mutex_lock(&bo->rdev->gem.mutex); in radeon_bo_force_delete()
399 list_del_init(&bo->list); in radeon_bo_force_delete()
400 mutex_unlock(&bo->rdev->gem.mutex); in radeon_bo_force_delete()
402 drm_gem_object_put(&bo->tbo.base); in radeon_bo_force_delete()
502 struct radeon_bo *bo = lobj->robj; in radeon_bo_list_validate() local
503 if (!bo->tbo.pin_count) { in radeon_bo_list_validate()
507 radeon_mem_type_to_domain(bo->tbo.resource->mem_type); in radeon_bo_list_validate()
525 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_list_validate()
527 radeon_uvd_force_into_uvd_segment(bo, allowed); in radeon_bo_list_validate()
530 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); in radeon_bo_list_validate()
544 lobj->gpu_offset = radeon_bo_gpu_offset(bo); in radeon_bo_list_validate()
545 lobj->tiling_flags = bo->tiling_flags; in radeon_bo_list_validate()
556 int radeon_bo_get_surface_reg(struct radeon_bo *bo) in radeon_bo_get_surface_reg() argument
558 struct radeon_device *rdev = bo->rdev; in radeon_bo_get_surface_reg()
564 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_surface_reg()
566 if (!bo->tiling_flags) in radeon_bo_get_surface_reg()
569 if (bo->surface_reg >= 0) { in radeon_bo_get_surface_reg()
570 reg = &rdev->surface_regs[bo->surface_reg]; in radeon_bo_get_surface_reg()
571 i = bo->surface_reg; in radeon_bo_get_surface_reg()
579 if (!reg->bo) in radeon_bo_get_surface_reg()
582 old_object = reg->bo; in radeon_bo_get_surface_reg()
593 old_object = reg->bo; in radeon_bo_get_surface_reg()
601 bo->surface_reg = i; in radeon_bo_get_surface_reg()
602 reg->bo = bo; in radeon_bo_get_surface_reg()
605 radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch, in radeon_bo_get_surface_reg()
606 bo->tbo.resource->start << PAGE_SHIFT, in radeon_bo_get_surface_reg()
607 bo->tbo.base.size); in radeon_bo_get_surface_reg()
611 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo) in radeon_bo_clear_surface_reg() argument
613 struct radeon_device *rdev = bo->rdev; in radeon_bo_clear_surface_reg()
616 if (bo->surface_reg == -1) in radeon_bo_clear_surface_reg()
619 reg = &rdev->surface_regs[bo->surface_reg]; in radeon_bo_clear_surface_reg()
620 radeon_clear_surface_reg(rdev, bo->surface_reg); in radeon_bo_clear_surface_reg()
622 reg->bo = NULL; in radeon_bo_clear_surface_reg()
623 bo->surface_reg = -1; in radeon_bo_clear_surface_reg()
626 int radeon_bo_set_tiling_flags(struct radeon_bo *bo, in radeon_bo_set_tiling_flags() argument
629 struct radeon_device *rdev = bo->rdev; in radeon_bo_set_tiling_flags()
677 r = radeon_bo_reserve(bo, false); in radeon_bo_set_tiling_flags()
680 bo->tiling_flags = tiling_flags; in radeon_bo_set_tiling_flags()
681 bo->pitch = pitch; in radeon_bo_set_tiling_flags()
682 radeon_bo_unreserve(bo); in radeon_bo_set_tiling_flags()
686 void radeon_bo_get_tiling_flags(struct radeon_bo *bo, in radeon_bo_get_tiling_flags() argument
690 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_tiling_flags()
693 *tiling_flags = bo->tiling_flags; in radeon_bo_get_tiling_flags()
695 *pitch = bo->pitch; in radeon_bo_get_tiling_flags()
698 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, in radeon_bo_check_tiling() argument
702 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_check_tiling()
704 if (!(bo->tiling_flags & RADEON_TILING_SURFACE)) in radeon_bo_check_tiling()
708 radeon_bo_clear_surface_reg(bo); in radeon_bo_check_tiling()
712 if (bo->tbo.resource->mem_type != TTM_PL_VRAM) { in radeon_bo_check_tiling()
716 if (bo->surface_reg >= 0) in radeon_bo_check_tiling()
717 radeon_bo_clear_surface_reg(bo); in radeon_bo_check_tiling()
721 if ((bo->surface_reg >= 0) && !has_moved) in radeon_bo_check_tiling()
724 return radeon_bo_get_surface_reg(bo); in radeon_bo_check_tiling()
727 void radeon_bo_move_notify(struct ttm_buffer_object *bo, in radeon_bo_move_notify() argument
733 radeon_update_memory_usage(bo, old_type, -1); in radeon_bo_move_notify()
735 radeon_update_memory_usage(bo, new_mem->mem_type, 1); in radeon_bo_move_notify()
737 if (!radeon_ttm_bo_is_radeon_bo(bo)) in radeon_bo_move_notify()
740 rbo = container_of(bo, struct radeon_bo, tbo); in radeon_bo_move_notify()
745 vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) in radeon_bo_fault_reserve_notify() argument
753 if (!radeon_ttm_bo_is_radeon_bo(bo)) in radeon_bo_fault_reserve_notify()
755 rbo = container_of(bo, struct radeon_bo, tbo); in radeon_bo_fault_reserve_notify()
758 if (bo->resource->mem_type != TTM_PL_VRAM) in radeon_bo_fault_reserve_notify()
761 size = bo->resource->num_pages << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
762 offset = bo->resource->start << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
779 r = ttm_bo_validate(bo, &rbo->placement, &ctx); in radeon_bo_fault_reserve_notify()
782 r = ttm_bo_validate(bo, &rbo->placement, &ctx); in radeon_bo_fault_reserve_notify()
784 offset = bo->resource->start << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
795 ttm_bo_move_to_lru_tail_unlocked(bo); in radeon_bo_fault_reserve_notify()
807 void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence, in radeon_bo_fence() argument
810 struct dma_resv *resv = bo->tbo.base.resv; in radeon_bo_fence()