Lines Matching refs:i2c
173 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos) argument
174 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos) argument
176 static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num);
177 static void __xiic_start_xfer(struct xiic_i2c *i2c);
187 static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value) in xiic_setreg8() argument
189 if (i2c->endianness == LITTLE) in xiic_setreg8()
190 iowrite8(value, i2c->base + reg); in xiic_setreg8()
192 iowrite8(value, i2c->base + reg + 3); in xiic_setreg8()
195 static inline u8 xiic_getreg8(struct xiic_i2c *i2c, int reg) in xiic_getreg8() argument
199 if (i2c->endianness == LITTLE) in xiic_getreg8()
200 ret = ioread8(i2c->base + reg); in xiic_getreg8()
202 ret = ioread8(i2c->base + reg + 3); in xiic_getreg8()
206 static inline void xiic_setreg16(struct xiic_i2c *i2c, int reg, u16 value) in xiic_setreg16() argument
208 if (i2c->endianness == LITTLE) in xiic_setreg16()
209 iowrite16(value, i2c->base + reg); in xiic_setreg16()
211 iowrite16be(value, i2c->base + reg + 2); in xiic_setreg16()
214 static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value) in xiic_setreg32() argument
216 if (i2c->endianness == LITTLE) in xiic_setreg32()
217 iowrite32(value, i2c->base + reg); in xiic_setreg32()
219 iowrite32be(value, i2c->base + reg); in xiic_setreg32()
222 static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg) in xiic_getreg32() argument
226 if (i2c->endianness == LITTLE) in xiic_getreg32()
227 ret = ioread32(i2c->base + reg); in xiic_getreg32()
229 ret = ioread32be(i2c->base + reg); in xiic_getreg32()
233 static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask) in xiic_irq_dis() argument
235 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_dis()
236 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask); in xiic_irq_dis()
239 static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_en() argument
241 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_en()
242 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask); in xiic_irq_en()
245 static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr() argument
247 u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_irq_clr()
248 xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); in xiic_irq_clr()
251 static inline void xiic_irq_clr_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr_en() argument
253 xiic_irq_clr(i2c, mask); in xiic_irq_clr_en()
254 xiic_irq_en(i2c, mask); in xiic_irq_clr_en()
257 static int xiic_clear_rx_fifo(struct xiic_i2c *i2c) in xiic_clear_rx_fifo() argument
263 for (sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
265 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)) { in xiic_clear_rx_fifo()
266 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_clear_rx_fifo()
268 dev_err(i2c->dev, "Failed to clear rx fifo\n"); in xiic_clear_rx_fifo()
276 static int xiic_reinit(struct xiic_i2c *i2c) in xiic_reinit() argument
280 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_reinit()
283 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); in xiic_reinit()
286 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); in xiic_reinit()
289 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); in xiic_reinit()
292 ret = xiic_clear_rx_fifo(i2c); in xiic_reinit()
297 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); in xiic_reinit()
299 xiic_irq_clr_en(i2c, XIIC_INTR_ARB_LOST_MASK); in xiic_reinit()
304 static void xiic_deinit(struct xiic_i2c *i2c) in xiic_deinit() argument
308 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_deinit()
311 cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET); in xiic_deinit()
312 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK); in xiic_deinit()
315 static void xiic_read_rx(struct xiic_i2c *i2c) in xiic_read_rx() argument
320 bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1; in xiic_read_rx()
322 dev_dbg(i2c->adap.dev.parent, in xiic_read_rx()
324 __func__, bytes_in_fifo, xiic_rx_space(i2c), in xiic_read_rx()
325 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_read_rx()
326 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_read_rx()
328 if (bytes_in_fifo > xiic_rx_space(i2c)) in xiic_read_rx()
329 bytes_in_fifo = xiic_rx_space(i2c); in xiic_read_rx()
332 i2c->rx_msg->buf[i2c->rx_pos++] = in xiic_read_rx()
333 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_read_rx()
335 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, in xiic_read_rx()
336 (xiic_rx_space(i2c) > IIC_RX_FIFO_DEPTH) ? in xiic_read_rx()
337 IIC_RX_FIFO_DEPTH - 1 : xiic_rx_space(i2c) - 1); in xiic_read_rx()
340 static int xiic_tx_fifo_space(struct xiic_i2c *i2c) in xiic_tx_fifo_space() argument
343 return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
346 static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) in xiic_fill_tx_fifo() argument
348 u8 fifo_space = xiic_tx_fifo_space(i2c); in xiic_fill_tx_fifo()
349 int len = xiic_tx_space(i2c); in xiic_fill_tx_fifo()
353 dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", in xiic_fill_tx_fifo()
357 u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; in xiic_fill_tx_fifo()
358 if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) { in xiic_fill_tx_fifo()
361 dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); in xiic_fill_tx_fifo()
363 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_fill_tx_fifo()
367 static void xiic_wakeup(struct xiic_i2c *i2c, int code) in xiic_wakeup() argument
369 i2c->tx_msg = NULL; in xiic_wakeup()
370 i2c->rx_msg = NULL; in xiic_wakeup()
371 i2c->nmsgs = 0; in xiic_wakeup()
372 i2c->state = code; in xiic_wakeup()
373 complete(&i2c->completion); in xiic_wakeup()
378 struct xiic_i2c *i2c = dev_id; in xiic_process() local
390 mutex_lock(&i2c->lock); in xiic_process()
391 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_process()
392 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_process()
395 dev_dbg(i2c->adap.dev.parent, "%s: IER: 0x%x, ISR: 0x%x, pend: 0x%x\n", in xiic_process()
397 dev_dbg(i2c->adap.dev.parent, "%s: SR: 0x%x, msg: %p, nmsgs: %d\n", in xiic_process()
398 __func__, xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_process()
399 i2c->tx_msg, i2c->nmsgs); in xiic_process()
412 dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__); in xiic_process()
418 xiic_reinit(i2c); in xiic_process()
420 if (i2c->rx_msg) { in xiic_process()
424 if (i2c->tx_msg) { in xiic_process()
433 if (!i2c->rx_msg) { in xiic_process()
434 dev_dbg(i2c->adap.dev.parent, in xiic_process()
436 xiic_clear_rx_fifo(i2c); in xiic_process()
440 xiic_read_rx(i2c); in xiic_process()
441 if (xiic_rx_space(i2c) == 0) { in xiic_process()
443 i2c->rx_msg = NULL; in xiic_process()
448 dev_dbg(i2c->adap.dev.parent, in xiic_process()
450 __func__, i2c->nmsgs); in xiic_process()
456 if (i2c->nmsgs > 1) { in xiic_process()
457 i2c->nmsgs--; in xiic_process()
458 i2c->tx_msg++; in xiic_process()
459 dev_dbg(i2c->adap.dev.parent, in xiic_process()
470 xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK); in xiic_process()
472 if (!i2c->tx_msg) in xiic_process()
477 if (i2c->nmsgs == 1 && !i2c->rx_msg && in xiic_process()
478 xiic_tx_space(i2c) == 0) in xiic_process()
489 if (!i2c->tx_msg) { in xiic_process()
490 dev_dbg(i2c->adap.dev.parent, in xiic_process()
495 xiic_fill_tx_fifo(i2c); in xiic_process()
498 if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) { in xiic_process()
499 dev_dbg(i2c->adap.dev.parent, in xiic_process()
501 __func__, i2c->nmsgs); in xiic_process()
502 if (i2c->nmsgs > 1) { in xiic_process()
503 i2c->nmsgs--; in xiic_process()
504 i2c->tx_msg++; in xiic_process()
507 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
509 dev_dbg(i2c->adap.dev.parent, in xiic_process()
513 } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1)) in xiic_process()
517 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
520 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr); in xiic_process()
522 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr); in xiic_process()
524 __xiic_start_xfer(i2c); in xiic_process()
526 xiic_wakeup(i2c, wakeup_code); in xiic_process()
530 mutex_unlock(&i2c->lock); in xiic_process()
534 static int xiic_bus_busy(struct xiic_i2c *i2c) in xiic_bus_busy() argument
536 u8 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_bus_busy()
541 static int xiic_busy(struct xiic_i2c *i2c) in xiic_busy() argument
546 if (i2c->tx_msg || i2c->rx_msg) in xiic_busy()
554 if (i2c->singlemaster) { in xiic_busy()
562 err = xiic_bus_busy(i2c); in xiic_busy()
565 err = xiic_bus_busy(i2c); in xiic_busy()
571 static void xiic_start_recv(struct xiic_i2c *i2c) in xiic_start_recv() argument
574 struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; in xiic_start_recv()
577 xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK); in xiic_start_recv()
588 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1); in xiic_start_recv()
592 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
595 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
597 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
598 msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0)); in xiic_start_recv()
600 if (i2c->nmsgs == 1) in xiic_start_recv()
602 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
605 i2c->tx_pos = msg->len; in xiic_start_recv()
608 static void xiic_start_send(struct xiic_i2c *i2c) in xiic_start_send() argument
610 struct i2c_msg *msg = i2c->tx_msg; in xiic_start_send()
612 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d", in xiic_start_send()
614 dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", in xiic_start_send()
615 __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), in xiic_start_send()
616 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_start_send()
622 if ((i2c->nmsgs == 1) && msg->len == 0) in xiic_start_send()
626 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_start_send()
630 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_ERROR_MASK | in xiic_start_send()
632 ((i2c->nmsgs > 1 || xiic_tx_space(i2c)) ? in xiic_start_send()
635 xiic_fill_tx_fifo(i2c); in xiic_start_send()
638 static void __xiic_start_xfer(struct xiic_i2c *i2c) in __xiic_start_xfer() argument
640 int fifo_space = xiic_tx_fifo_space(i2c); in __xiic_start_xfer()
641 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", in __xiic_start_xfer()
642 __func__, i2c->tx_msg, fifo_space); in __xiic_start_xfer()
644 if (!i2c->tx_msg) in __xiic_start_xfer()
647 i2c->rx_pos = 0; in __xiic_start_xfer()
648 i2c->tx_pos = 0; in __xiic_start_xfer()
649 i2c->state = STATE_START; in __xiic_start_xfer()
650 if (i2c->tx_msg->flags & I2C_M_RD) { in __xiic_start_xfer()
652 xiic_start_recv(i2c); in __xiic_start_xfer()
654 xiic_start_send(i2c); in __xiic_start_xfer()
658 static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) in xiic_start_xfer() argument
662 mutex_lock(&i2c->lock); in xiic_start_xfer()
664 ret = xiic_busy(i2c); in xiic_start_xfer()
668 i2c->tx_msg = msgs; in xiic_start_xfer()
669 i2c->rx_msg = NULL; in xiic_start_xfer()
670 i2c->nmsgs = num; in xiic_start_xfer()
671 init_completion(&i2c->completion); in xiic_start_xfer()
673 ret = xiic_reinit(i2c); in xiic_start_xfer()
675 __xiic_start_xfer(i2c); in xiic_start_xfer()
678 mutex_unlock(&i2c->lock); in xiic_start_xfer()
685 struct xiic_i2c *i2c = i2c_get_adapdata(adap); in xiic_xfer() local
689 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)); in xiic_xfer()
691 err = pm_runtime_resume_and_get(i2c->dev); in xiic_xfer()
695 err = xiic_start_xfer(i2c, msgs, num); in xiic_xfer()
701 err = wait_for_completion_timeout(&i2c->completion, XIIC_XFER_TIMEOUT); in xiic_xfer()
702 mutex_lock(&i2c->lock); in xiic_xfer()
704 i2c->tx_msg = NULL; in xiic_xfer()
705 i2c->rx_msg = NULL; in xiic_xfer()
706 i2c->nmsgs = 0; in xiic_xfer()
709 i2c->tx_msg = NULL; in xiic_xfer()
710 i2c->rx_msg = NULL; in xiic_xfer()
711 i2c->nmsgs = 0; in xiic_xfer()
713 err = (i2c->state == STATE_DONE) ? num : -EIO; in xiic_xfer()
715 mutex_unlock(&i2c->lock); in xiic_xfer()
716 pm_runtime_mark_last_busy(i2c->dev); in xiic_xfer()
717 pm_runtime_put_autosuspend(i2c->dev); in xiic_xfer()
746 struct xiic_i2c *i2c; in xiic_i2c_probe() local
753 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); in xiic_i2c_probe()
754 if (!i2c) in xiic_i2c_probe()
758 i2c->base = devm_ioremap_resource(&pdev->dev, res); in xiic_i2c_probe()
759 if (IS_ERR(i2c->base)) in xiic_i2c_probe()
760 return PTR_ERR(i2c->base); in xiic_i2c_probe()
769 platform_set_drvdata(pdev, i2c); in xiic_i2c_probe()
770 i2c->adap = xiic_adapter; in xiic_i2c_probe()
771 i2c_set_adapdata(&i2c->adap, i2c); in xiic_i2c_probe()
772 i2c->adap.dev.parent = &pdev->dev; in xiic_i2c_probe()
773 i2c->adap.dev.of_node = pdev->dev.of_node; in xiic_i2c_probe()
775 mutex_init(&i2c->lock); in xiic_i2c_probe()
777 i2c->clk = devm_clk_get(&pdev->dev, NULL); in xiic_i2c_probe()
778 if (IS_ERR(i2c->clk)) in xiic_i2c_probe()
779 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk), in xiic_i2c_probe()
782 ret = clk_prepare_enable(i2c->clk); in xiic_i2c_probe()
787 i2c->dev = &pdev->dev; in xiic_i2c_probe()
788 pm_runtime_set_autosuspend_delay(i2c->dev, XIIC_PM_TIMEOUT); in xiic_i2c_probe()
789 pm_runtime_use_autosuspend(i2c->dev); in xiic_i2c_probe()
790 pm_runtime_set_active(i2c->dev); in xiic_i2c_probe()
791 pm_runtime_enable(i2c->dev); in xiic_i2c_probe()
794 pdev->name, i2c); in xiic_i2c_probe()
801 i2c->singlemaster = in xiic_i2c_probe()
809 i2c->endianness = LITTLE; in xiic_i2c_probe()
810 xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); in xiic_i2c_probe()
812 sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET); in xiic_i2c_probe()
814 i2c->endianness = BIG; in xiic_i2c_probe()
816 ret = xiic_reinit(i2c); in xiic_i2c_probe()
823 ret = i2c_add_adapter(&i2c->adap); in xiic_i2c_probe()
825 xiic_deinit(i2c); in xiic_i2c_probe()
832 i2c_new_client_device(&i2c->adap, pdata->devices + i); in xiic_i2c_probe()
840 clk_disable_unprepare(i2c->clk); in xiic_i2c_probe()
846 struct xiic_i2c *i2c = platform_get_drvdata(pdev); in xiic_i2c_remove() local
850 i2c_del_adapter(&i2c->adap); in xiic_i2c_remove()
852 ret = pm_runtime_resume_and_get(i2c->dev); in xiic_i2c_remove()
856 xiic_deinit(i2c); in xiic_i2c_remove()
857 pm_runtime_put_sync(i2c->dev); in xiic_i2c_remove()
858 clk_disable_unprepare(i2c->clk); in xiic_i2c_remove()
876 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_suspend() local
878 clk_disable(i2c->clk); in xiic_i2c_runtime_suspend()
885 struct xiic_i2c *i2c = dev_get_drvdata(dev); in xiic_i2c_runtime_resume() local
888 ret = clk_enable(i2c->clk); in xiic_i2c_runtime_resume()