Lines Matching refs:pasid
531 u32 pasid; in iommu_print_event() local
536 pasid = (event[0] & EVENT_DOMID_MASK_HI) | in iommu_print_event()
552 amd_iommu_report_page_fault(devid, pasid, address, flags); in iommu_print_event()
560 pasid, address, flags); in iommu_print_event()
572 pasid, address, flags); in iommu_print_event()
590 pasid, address, flags); in iommu_print_event()
599 pasid = PPR_PASID(*((u64 *)__evt)); in iommu_print_event()
603 pasid, address, flags, tag); in iommu_print_event()
638 fault.pasid = PPR_PASID(raw[0]); in iommu_handle_ppr_entry()
952 static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, u32 pasid, in build_inv_iommu_pasid() argument
959 cmd->data[0] = pasid; in build_inv_iommu_pasid()
970 static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, u32 pasid, in build_inv_iotlb_pasid() argument
978 cmd->data[0] |= ((pasid >> 8) & 0xff) << 16; in build_inv_iotlb_pasid()
981 cmd->data[1] |= (pasid & 0xff) << 16; in build_inv_iotlb_pasid()
990 static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, u32 pasid, in build_complete_ppr() argument
997 cmd->data[1] = pasid; in build_complete_ppr()
2372 static int __flush_pasid(struct protection_domain *domain, u32 pasid, in __flush_pasid() argument
2382 build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size); in __flush_pasid()
2415 build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid, in __flush_pasid()
2433 static int __amd_iommu_flush_page(struct protection_domain *domain, u32 pasid, in __amd_iommu_flush_page() argument
2436 return __flush_pasid(domain, pasid, address, false); in __amd_iommu_flush_page()
2439 int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid, in amd_iommu_flush_page() argument
2447 ret = __amd_iommu_flush_page(domain, pasid, address); in amd_iommu_flush_page()
2454 static int __amd_iommu_flush_tlb(struct protection_domain *domain, u32 pasid) in __amd_iommu_flush_tlb() argument
2456 return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, in __amd_iommu_flush_tlb()
2460 int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid) in amd_iommu_flush_tlb() argument
2467 ret = __amd_iommu_flush_tlb(domain, pasid); in amd_iommu_flush_tlb()
2474 static u64 *__get_gcr3_pte(u64 *root, int level, u32 pasid, bool alloc) in __get_gcr3_pte() argument
2481 index = (pasid >> (9 * level)) & 0x1ff; in __get_gcr3_pte()
2506 static int __set_gcr3(struct protection_domain *domain, u32 pasid, in __set_gcr3() argument
2514 pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); in __set_gcr3()
2520 return __amd_iommu_flush_tlb(domain, pasid); in __set_gcr3()
2523 static int __clear_gcr3(struct protection_domain *domain, u32 pasid) in __clear_gcr3() argument
2530 pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); in __clear_gcr3()
2536 return __amd_iommu_flush_tlb(domain, pasid); in __clear_gcr3()
2539 int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid, in amd_iommu_domain_set_gcr3() argument
2547 ret = __set_gcr3(domain, pasid, cr3); in amd_iommu_domain_set_gcr3()
2554 int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid) in amd_iommu_domain_clear_gcr3() argument
2561 ret = __clear_gcr3(domain, pasid); in amd_iommu_domain_clear_gcr3()
2568 int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid, in amd_iommu_complete_ppr() argument
2578 build_complete_ppr(&cmd, dev_data->devid, pasid, status, in amd_iommu_complete_ppr()