Lines Matching refs:afu
21 static int afu_control(struct cxl_afu *afu, u64 command, u64 clear, in afu_control() argument
28 spin_lock(&afu->afu_cntl_lock); in afu_control()
31 trace_cxl_afu_ctrl(afu, command); in afu_control()
33 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
34 cxl_p2n_write(afu, CXL_AFU_Cntl_An, (AFU_Cntl & ~clear) | command); in afu_control()
36 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
39 dev_warn(&afu->dev, "WARNING: AFU control timed out!\n"); in afu_control()
44 if (!cxl_ops->link_ok(afu->adapter, afu)) { in afu_control()
45 afu->enabled = enabled; in afu_control()
53 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
62 cxl_p2n_write(afu, CXL_AFU_Cntl_An, AFU_Cntl & ~CXL_AFU_Cntl_An_RA); in afu_control()
66 afu->enabled = enabled; in afu_control()
68 trace_cxl_afu_ctrl_done(afu, command, rc); in afu_control()
69 spin_unlock(&afu->afu_cntl_lock); in afu_control()
74 static int afu_enable(struct cxl_afu *afu) in afu_enable() argument
78 return afu_control(afu, CXL_AFU_Cntl_An_E, 0, in afu_enable()
83 int cxl_afu_disable(struct cxl_afu *afu) in cxl_afu_disable() argument
87 return afu_control(afu, 0, CXL_AFU_Cntl_An_E, in cxl_afu_disable()
93 static int native_afu_reset(struct cxl_afu *afu) in native_afu_reset() argument
100 rc = afu_control(afu, CXL_AFU_Cntl_An_RA, 0, in native_afu_reset()
110 if (afu->current_mode == 0) { in native_afu_reset()
111 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in native_afu_reset()
113 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in native_afu_reset()
119 static int native_afu_check_and_enable(struct cxl_afu *afu) in native_afu_check_and_enable() argument
121 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_check_and_enable()
125 if (afu->enabled) in native_afu_check_and_enable()
127 return afu_enable(afu); in native_afu_check_and_enable()
130 int cxl_psl_purge(struct cxl_afu *afu) in cxl_psl_purge() argument
132 u64 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
133 u64 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in cxl_psl_purge()
140 trace_cxl_psl_ctrl(afu, CXL_PSL_SCNTL_An_Pc); in cxl_psl_purge()
149 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
150 dev_warn(&afu->dev, "PSL Purge called with link down, ignoring\n"); in cxl_psl_purge()
157 cxl_afu_disable(afu); in cxl_psl_purge()
160 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, in cxl_psl_purge()
163 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
167 dev_warn(&afu->dev, "WARNING: PSL Purge timed out!\n"); in cxl_psl_purge()
171 if (!cxl_ops->link_ok(afu->adapter, afu)) { in cxl_psl_purge()
176 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in cxl_psl_purge()
181 dar = cxl_p2n_read(afu, CXL_PSL_DAR_An); in cxl_psl_purge()
182 …dev_notice(&afu->dev, "PSL purge terminating pending translation, DSISR: 0x%016llx, DAR: 0x%016llx… in cxl_psl_purge()
184 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); in cxl_psl_purge()
186 … dev_notice(&afu->dev, "PSL purge acknowledging pending non-translation fault, DSISR: 0x%016llx\n", in cxl_psl_purge()
188 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A); in cxl_psl_purge()
192 PSL_CNTL = cxl_p1n_read(afu, CXL_PSL_SCNTL_An); in cxl_psl_purge()
197 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, in cxl_psl_purge()
200 trace_cxl_psl_ctrl_done(afu, CXL_PSL_SCNTL_An_Pc, rc); in cxl_psl_purge()
222 static int cxl_alloc_spa(struct cxl_afu *afu, int mode) in cxl_alloc_spa() argument
227 afu->native->spa_order = -1; in cxl_alloc_spa()
229 afu->native->spa_order++; in cxl_alloc_spa()
230 spa_size = (1 << afu->native->spa_order) * PAGE_SIZE; in cxl_alloc_spa()
233 dev_warn(&afu->dev, "num_of_processes too large for the SPA, limiting to %i (0x%x)\n", in cxl_alloc_spa()
234 afu->native->spa_max_procs, afu->native->spa_size); in cxl_alloc_spa()
236 afu->num_procs = afu->native->spa_max_procs; in cxl_alloc_spa()
240 afu->native->spa_size = spa_size; in cxl_alloc_spa()
241 afu->native->spa_max_procs = spa_max_procs(afu->native->spa_size); in cxl_alloc_spa()
242 } while (afu->native->spa_max_procs < afu->num_procs); in cxl_alloc_spa()
244 if (!(afu->native->spa = (struct cxl_process_element *) in cxl_alloc_spa()
245 __get_free_pages(GFP_KERNEL | __GFP_ZERO, afu->native->spa_order))) { in cxl_alloc_spa()
250 1<<afu->native->spa_order, afu->native->spa_max_procs, afu->num_procs); in cxl_alloc_spa()
255 static void attach_spa(struct cxl_afu *afu) in attach_spa() argument
259 afu->native->sw_command_status = (__be64 *)((char *)afu->native->spa + in attach_spa()
260 ((afu->native->spa_max_procs + 3) * 128)); in attach_spa()
262 spap = virt_to_phys(afu->native->spa) & CXL_PSL_SPAP_Addr; in attach_spa()
263 spap |= ((afu->native->spa_size >> (12 - CXL_PSL_SPAP_Size_Shift)) - 1) & CXL_PSL_SPAP_Size; in attach_spa()
266 afu->native->spa, afu->native->spa_max_procs, in attach_spa()
267 afu->native->sw_command_status, spap); in attach_spa()
268 cxl_p1n_write(afu, CXL_PSL_SPAP_An, spap); in attach_spa()
271 static inline void detach_spa(struct cxl_afu *afu) in detach_spa() argument
273 cxl_p1n_write(afu, CXL_PSL_SPAP_An, 0); in detach_spa()
276 void cxl_release_spa(struct cxl_afu *afu) in cxl_release_spa() argument
278 if (afu->native->spa) { in cxl_release_spa()
279 free_pages((unsigned long) afu->native->spa, in cxl_release_spa()
280 afu->native->spa_order); in cxl_release_spa()
281 afu->native->spa = NULL; in cxl_release_spa()
387 static int cxl_write_sstp(struct cxl_afu *afu, u64 sstp0, u64 sstp1) in cxl_write_sstp() argument
392 cxl_p2n_write(afu, CXL_SSTP1_An, 0); in cxl_write_sstp()
395 if ((rc = cxl_afu_slbia(afu))) in cxl_write_sstp()
399 cxl_p2n_write(afu, CXL_SSTP0_An, sstp0); in cxl_write_sstp()
402 cxl_p2n_write(afu, CXL_SSTP1_An, sstp1); in cxl_write_sstp()
410 struct cxl *adapter = ctx->afu->adapter; in slb_invalid()
413 WARN_ON(!mutex_is_locked(&ctx->afu->native->spa_mutex)); in slb_invalid()
439 WARN_ON(!ctx->afu->enabled); in do_process_element_cmd()
443 *(ctx->afu->native->sw_command_status) = cpu_to_be64(cmd | 0 | ctx->pe); in do_process_element_cmd()
445 cxl_p1n_write(ctx->afu, CXL_PSL_LLCMD_An, cmd | ctx->pe); in do_process_element_cmd()
448 dev_warn(&ctx->afu->dev, "WARNING: Process Element Command timed out!\n"); in do_process_element_cmd()
452 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in do_process_element_cmd()
453 dev_warn(&ctx->afu->dev, "WARNING: Device link down, aborting Process Element Command!\n"); in do_process_element_cmd()
457 state = be64_to_cpup(ctx->afu->native->sw_command_status); in do_process_element_cmd()
485 mutex_lock(&ctx->afu->native->spa_mutex); in add_process_element()
490 mutex_unlock(&ctx->afu->native->spa_mutex); in add_process_element()
502 mutex_lock(&ctx->afu->native->spa_mutex); in terminate_process_element()
508 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in terminate_process_element()
513 mutex_unlock(&ctx->afu->native->spa_mutex); in terminate_process_element()
521 mutex_lock(&ctx->afu->native->spa_mutex); in remove_process_element()
527 if (cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) in remove_process_element()
535 mutex_unlock(&ctx->afu->native->spa_mutex); in remove_process_element()
542 if (!ctx->afu->pp_size || ctx->master) { in cxl_assign_psn_space()
543 ctx->psn_phys = ctx->afu->psn_phys; in cxl_assign_psn_space()
544 ctx->psn_size = ctx->afu->adapter->ps_size; in cxl_assign_psn_space()
546 ctx->psn_phys = ctx->afu->psn_phys + in cxl_assign_psn_space()
547 (ctx->afu->native->pp_offset + ctx->afu->pp_size * ctx->pe); in cxl_assign_psn_space()
548 ctx->psn_size = ctx->afu->pp_size; in cxl_assign_psn_space()
552 static int activate_afu_directed(struct cxl_afu *afu) in activate_afu_directed() argument
556 dev_info(&afu->dev, "Activating AFU directed mode\n"); in activate_afu_directed()
558 afu->num_procs = afu->max_procs_virtualised; in activate_afu_directed()
559 if (afu->native->spa == NULL) { in activate_afu_directed()
560 if (cxl_alloc_spa(afu, CXL_MODE_DIRECTED)) in activate_afu_directed()
563 attach_spa(afu); in activate_afu_directed()
565 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_AFU); in activate_afu_directed()
567 cxl_p1n_write(afu, CXL_PSL_AMOR_An, 0xFFFFFFFFFFFFFFFFULL); in activate_afu_directed()
568 cxl_p1n_write(afu, CXL_PSL_ID_An, CXL_PSL_ID_An_F | CXL_PSL_ID_An_L); in activate_afu_directed()
570 afu->current_mode = CXL_MODE_DIRECTED; in activate_afu_directed()
572 if ((rc = cxl_chardev_m_afu_add(afu))) in activate_afu_directed()
575 if ((rc = cxl_sysfs_afu_m_add(afu))) in activate_afu_directed()
578 if ((rc = cxl_chardev_s_afu_add(afu))) in activate_afu_directed()
583 cxl_sysfs_afu_m_remove(afu); in activate_afu_directed()
585 cxl_chardev_afu_remove(afu); in activate_afu_directed()
707 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in process_element_entry_psl9()
729 result = cxl_ops->afu_check_and_enable(ctx->afu); in cxl_attach_afu_directed_psl9()
770 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in cxl_attach_afu_directed_psl8()
780 if ((result = cxl_ops->afu_check_and_enable(ctx->afu))) in cxl_attach_afu_directed_psl8()
786 static int deactivate_afu_directed(struct cxl_afu *afu) in deactivate_afu_directed() argument
788 dev_info(&afu->dev, "Deactivating AFU directed mode\n"); in deactivate_afu_directed()
790 afu->current_mode = 0; in deactivate_afu_directed()
791 afu->num_procs = 0; in deactivate_afu_directed()
793 cxl_sysfs_afu_m_remove(afu); in deactivate_afu_directed()
794 cxl_chardev_afu_remove(afu); in deactivate_afu_directed()
821 if (afu->adapter->native->sl_ops->needs_reset_before_disable) in deactivate_afu_directed()
822 cxl_ops->afu_reset(afu); in deactivate_afu_directed()
823 cxl_afu_disable(afu); in deactivate_afu_directed()
824 cxl_psl_purge(afu); in deactivate_afu_directed()
829 int cxl_activate_dedicated_process_psl9(struct cxl_afu *afu) in cxl_activate_dedicated_process_psl9() argument
831 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl9()
840 afu->num_procs = 1; in cxl_activate_dedicated_process_psl9()
841 if (afu->native->spa == NULL) { in cxl_activate_dedicated_process_psl9()
842 if (cxl_alloc_spa(afu, CXL_MODE_DEDICATED)) in cxl_activate_dedicated_process_psl9()
845 attach_spa(afu); in cxl_activate_dedicated_process_psl9()
847 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_Process); in cxl_activate_dedicated_process_psl9()
848 cxl_p1n_write(afu, CXL_PSL_ID_An, CXL_PSL_ID_An_F | CXL_PSL_ID_An_L); in cxl_activate_dedicated_process_psl9()
850 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl9()
852 return cxl_chardev_d_afu_add(afu); in cxl_activate_dedicated_process_psl9()
855 int cxl_activate_dedicated_process_psl8(struct cxl_afu *afu) in cxl_activate_dedicated_process_psl8() argument
857 dev_info(&afu->dev, "Activating dedicated process mode\n"); in cxl_activate_dedicated_process_psl8()
859 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_Process); in cxl_activate_dedicated_process_psl8()
861 cxl_p1n_write(afu, CXL_PSL_CtxTime_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
862 cxl_p1n_write(afu, CXL_PSL_SPAP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
863 cxl_p1n_write(afu, CXL_PSL_AMOR_An, 0xFFFFFFFFFFFFFFFFULL); in cxl_activate_dedicated_process_psl8()
864 cxl_p1n_write(afu, CXL_PSL_LPID_An, mfspr(SPRN_LPID)); in cxl_activate_dedicated_process_psl8()
865 cxl_p1n_write(afu, CXL_HAURP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
866 cxl_p1n_write(afu, CXL_PSL_SDR_An, mfspr(SPRN_SDR1)); in cxl_activate_dedicated_process_psl8()
868 cxl_p2n_write(afu, CXL_CSRP_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
869 cxl_p2n_write(afu, CXL_AURP0_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
870 cxl_p2n_write(afu, CXL_AURP1_An, 0); /* disable */ in cxl_activate_dedicated_process_psl8()
872 afu->current_mode = CXL_MODE_DEDICATED; in cxl_activate_dedicated_process_psl8()
873 afu->num_procs = 1; in cxl_activate_dedicated_process_psl8()
875 return cxl_chardev_d_afu_add(afu); in cxl_activate_dedicated_process_psl8()
890 struct cxl_afu *afu = ctx->afu; in cxl_update_dedicated_ivtes_psl8() local
892 cxl_p1n_write(afu, CXL_PSL_IVTE_Offset_An, in cxl_update_dedicated_ivtes_psl8()
897 cxl_p1n_write(afu, CXL_PSL_IVTE_Limit_An, (u64) in cxl_update_dedicated_ivtes_psl8()
906 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl9() local
914 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl9()
915 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl9()
925 result = cxl_ops->afu_reset(afu); in cxl_attach_dedicated_process_psl9()
929 return afu_enable(afu); in cxl_attach_dedicated_process_psl9()
934 struct cxl_afu *afu = ctx->afu; in cxl_attach_dedicated_process_psl8() local
941 cxl_p2n_write(afu, CXL_PSL_PID_TID_An, pid); in cxl_attach_dedicated_process_psl8()
943 cxl_p1n_write(afu, CXL_PSL_SR_An, calculate_sr(ctx)); in cxl_attach_dedicated_process_psl8()
945 if ((rc = cxl_write_sstp(afu, ctx->sstp0, ctx->sstp1))) in cxl_attach_dedicated_process_psl8()
950 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) in cxl_attach_dedicated_process_psl8()
951 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in cxl_attach_dedicated_process_psl8()
953 cxl_p2n_write(afu, CXL_PSL_AMR_An, amr); in cxl_attach_dedicated_process_psl8()
958 if ((rc = cxl_ops->afu_reset(afu))) in cxl_attach_dedicated_process_psl8()
961 cxl_p2n_write(afu, CXL_PSL_WED_An, wed); in cxl_attach_dedicated_process_psl8()
963 return afu_enable(afu); in cxl_attach_dedicated_process_psl8()
966 static int deactivate_dedicated_process(struct cxl_afu *afu) in deactivate_dedicated_process() argument
968 dev_info(&afu->dev, "Deactivating dedicated process mode\n"); in deactivate_dedicated_process()
970 afu->current_mode = 0; in deactivate_dedicated_process()
971 afu->num_procs = 0; in deactivate_dedicated_process()
973 cxl_chardev_afu_remove(afu); in deactivate_dedicated_process()
978 static int native_afu_deactivate_mode(struct cxl_afu *afu, int mode) in native_afu_deactivate_mode() argument
981 return deactivate_afu_directed(afu); in native_afu_deactivate_mode()
983 return deactivate_dedicated_process(afu); in native_afu_deactivate_mode()
987 static int native_afu_activate_mode(struct cxl_afu *afu, int mode) in native_afu_activate_mode() argument
991 if (!(mode & afu->modes_supported)) in native_afu_activate_mode()
994 if (!cxl_ops->link_ok(afu->adapter, afu)) { in native_afu_activate_mode()
1000 return activate_afu_directed(afu); in native_afu_activate_mode()
1002 (afu->adapter->native->sl_ops->activate_dedicated_process)) in native_afu_activate_mode()
1003 return afu->adapter->native->sl_ops->activate_dedicated_process(afu); in native_afu_activate_mode()
1011 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) { in native_attach_process()
1017 if ((ctx->afu->current_mode == CXL_MODE_DIRECTED) && in native_attach_process()
1018 (ctx->afu->adapter->native->sl_ops->attach_afu_directed)) in native_attach_process()
1019 return ctx->afu->adapter->native->sl_ops->attach_afu_directed(ctx, wed, amr); in native_attach_process()
1021 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_attach_process()
1022 (ctx->afu->adapter->native->sl_ops->attach_dedicated_process)) in native_attach_process()
1023 return ctx->afu->adapter->native->sl_ops->attach_dedicated_process(ctx, wed, amr); in native_attach_process()
1046 cxl_ops->afu_reset(ctx->afu); in detach_process_native_dedicated()
1047 cxl_afu_disable(ctx->afu); in detach_process_native_dedicated()
1048 cxl_psl_purge(ctx->afu); in detach_process_native_dedicated()
1054 if (ctx->afu->current_mode == CXL_MODE_DIRECTED) in native_update_ivtes()
1056 if ((ctx->afu->current_mode == CXL_MODE_DEDICATED) && in native_update_ivtes()
1057 (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)) in native_update_ivtes()
1058 return ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); in native_update_ivtes()
1078 if (ctx->afu->current_mode == CXL_MODE_DEDICATED) in native_detach_process()
1084 static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info) in native_get_irq_info() argument
1089 if (!cxl_ops->link_ok(afu->adapter, afu)) in native_get_irq_info()
1092 info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in native_get_irq_info()
1093 info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An); in native_get_irq_info()
1095 info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An); in native_get_irq_info()
1096 info->afu_err = cxl_p2n_read(afu, CXL_AFU_ERR_An); in native_get_irq_info()
1097 info->errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An); in native_get_irq_info()
1107 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1); in cxl_native_irq_dump_regs_psl9()
1109 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl9()
1110 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl9()
1111 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl9()
1112 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl9()
1120 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR1); in cxl_native_irq_dump_regs_psl8()
1121 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR2); in cxl_native_irq_dump_regs_psl8()
1122 fir_slice = cxl_p1n_read(ctx->afu, CXL_PSL_FIR_SLICE_An); in cxl_native_irq_dump_regs_psl8()
1123 afu_debug = cxl_p1n_read(ctx->afu, CXL_AFU_DEBUG_An); in cxl_native_irq_dump_regs_psl8()
1125 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in cxl_native_irq_dump_regs_psl8()
1126 dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2); in cxl_native_irq_dump_regs_psl8()
1127 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { in cxl_native_irq_dump_regs_psl8()
1128 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in cxl_native_irq_dump_regs_psl8()
1129 cxl_afu_decode_psl_serr(ctx->afu, serr); in cxl_native_irq_dump_regs_psl8()
1131 dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in cxl_native_irq_dump_regs_psl8()
1132 dev_crit(&ctx->afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in cxl_native_irq_dump_regs_psl8()
1139 dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%016llx\n", errstat); in native_handle_psl_slice_error()
1141 if (ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers) in native_handle_psl_slice_error()
1142 ctx->afu->adapter->native->sl_ops->psl_irq_dump_registers(ctx); in native_handle_psl_slice_error()
1144 if (ctx->afu->adapter->native->sl_ops->debugfs_stop_trace) { in native_handle_psl_slice_error()
1145 dev_crit(&ctx->afu->dev, "STOPPING CXL TRACE\n"); in native_handle_psl_slice_error()
1146 ctx->afu->adapter->native->sl_ops->debugfs_stop_trace(ctx->afu->adapter); in native_handle_psl_slice_error()
1152 static bool cxl_is_translation_fault(struct cxl_afu *afu, u64 dsisr) in cxl_is_translation_fault() argument
1163 irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info *irq_info) in cxl_fail_irq_psl() argument
1165 if (cxl_is_translation_fault(afu, irq_info->dsisr)) in cxl_fail_irq_psl()
1166 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE); in cxl_fail_irq_psl()
1168 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A); in cxl_fail_irq_psl()
1175 struct cxl_afu *afu = data; in native_irq_multiplexed() local
1178 u64 phreg = cxl_p2n_read(afu, CXL_PSL_PEHandle_An); in native_irq_multiplexed()
1183 dev_warn(&afu->dev, in native_irq_multiplexed()
1190 if ((res = native_get_irq_info(afu, &irq_info))) { in native_irq_multiplexed()
1192 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1193 return afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1198 ctx = idr_find(&afu->contexts_idr, ph); in native_irq_multiplexed()
1200 if (afu->adapter->native->sl_ops->handle_interrupt) in native_irq_multiplexed()
1201 ret = afu->adapter->native->sl_ops->handle_interrupt(irq, ctx, &irq_info); in native_irq_multiplexed()
1211 if (afu->adapter->native->sl_ops->fail_irq) in native_irq_multiplexed()
1212 ret = afu->adapter->native->sl_ops->fail_irq(afu, &irq_info); in native_irq_multiplexed()
1227 ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff; in native_irq_wait()
1230 dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An); in native_irq_wait()
1244 dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i" in native_irq_wait()
1251 struct cxl_afu *afu = data; in native_slice_irq_err() local
1258 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in native_slice_irq_err()
1259 errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An); in native_slice_irq_err()
1260 afu_error = cxl_p2n_read(afu, CXL_AFU_ERR_An); in native_slice_irq_err()
1261 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in native_slice_irq_err()
1262 cxl_afu_decode_psl_serr(afu, serr); in native_slice_irq_err()
1265 fir_slice = cxl_p1n_read(afu, CXL_PSL_FIR_SLICE_An); in native_slice_irq_err()
1266 afu_debug = cxl_p1n_read(afu, CXL_AFU_DEBUG_An); in native_slice_irq_err()
1267 dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in native_slice_irq_err()
1268 dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug); in native_slice_irq_err()
1270 dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%016llx\n", errstat); in native_slice_irq_err()
1271 dev_crit(&afu->dev, "AFU_ERR_An: 0x%.16llx\n", afu_error); in native_slice_irq_err()
1272 dev_crit(&afu->dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr); in native_slice_irq_err()
1277 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in native_slice_irq_err()
1278 dev_info(&afu->dev, "Further such interrupts will be masked until the AFU is reset\n"); in native_slice_irq_err()
1360 int cxl_native_register_serr_irq(struct cxl_afu *afu) in cxl_native_register_serr_irq() argument
1365 afu->err_irq_name = kasprintf(GFP_KERNEL, "cxl-%s-err", in cxl_native_register_serr_irq()
1366 dev_name(&afu->dev)); in cxl_native_register_serr_irq()
1367 if (!afu->err_irq_name) in cxl_native_register_serr_irq()
1370 if ((rc = cxl_register_one_irq(afu->adapter, native_slice_irq_err, afu, in cxl_native_register_serr_irq()
1371 &afu->serr_hwirq, in cxl_native_register_serr_irq()
1372 &afu->serr_virq, afu->err_irq_name))) { in cxl_native_register_serr_irq()
1373 kfree(afu->err_irq_name); in cxl_native_register_serr_irq()
1374 afu->err_irq_name = NULL; in cxl_native_register_serr_irq()
1378 serr = cxl_p1n_read(afu, CXL_PSL_SERR_An); in cxl_native_register_serr_irq()
1380 serr = (serr & 0x00ffffffffff0000ULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1386 serr = (serr & ~0xff0000007fffffffULL) | (afu->serr_hwirq & 0xffff); in cxl_native_register_serr_irq()
1388 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr); in cxl_native_register_serr_irq()
1393 void cxl_native_release_serr_irq(struct cxl_afu *afu) in cxl_native_release_serr_irq() argument
1395 if (afu->serr_virq == 0 || in cxl_native_release_serr_irq()
1396 afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq)) in cxl_native_release_serr_irq()
1399 cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000); in cxl_native_release_serr_irq()
1400 cxl_unmap_irq(afu->serr_virq, afu); in cxl_native_release_serr_irq()
1401 cxl_ops->release_one_irq(afu->adapter, afu->serr_hwirq); in cxl_native_release_serr_irq()
1402 kfree(afu->err_irq_name); in cxl_native_release_serr_irq()
1403 afu->serr_virq = 0; in cxl_native_release_serr_irq()
1406 int cxl_native_register_psl_irq(struct cxl_afu *afu) in cxl_native_register_psl_irq() argument
1410 afu->psl_irq_name = kasprintf(GFP_KERNEL, "cxl-%s", in cxl_native_register_psl_irq()
1411 dev_name(&afu->dev)); in cxl_native_register_psl_irq()
1412 if (!afu->psl_irq_name) in cxl_native_register_psl_irq()
1415 if ((rc = cxl_register_one_irq(afu->adapter, native_irq_multiplexed, in cxl_native_register_psl_irq()
1416 afu, &afu->native->psl_hwirq, &afu->native->psl_virq, in cxl_native_register_psl_irq()
1417 afu->psl_irq_name))) { in cxl_native_register_psl_irq()
1418 kfree(afu->psl_irq_name); in cxl_native_register_psl_irq()
1419 afu->psl_irq_name = NULL; in cxl_native_register_psl_irq()
1424 void cxl_native_release_psl_irq(struct cxl_afu *afu) in cxl_native_release_psl_irq() argument
1426 if (afu->native->psl_virq == 0 || in cxl_native_release_psl_irq()
1427 afu->native->psl_virq != in cxl_native_release_psl_irq()
1428 irq_find_mapping(NULL, afu->native->psl_hwirq)) in cxl_native_release_psl_irq()
1431 cxl_unmap_irq(afu->native->psl_virq, afu); in cxl_native_release_psl_irq()
1432 cxl_ops->release_one_irq(afu->adapter, afu->native->psl_hwirq); in cxl_native_release_psl_irq()
1433 kfree(afu->psl_irq_name); in cxl_native_release_psl_irq()
1434 afu->native->psl_virq = 0; in cxl_native_release_psl_irq()
1437 static void recover_psl_err(struct cxl_afu *afu, u64 errstat) in recover_psl_err() argument
1444 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An); in recover_psl_err()
1445 cxl_p2n_write(afu, CXL_PSL_DSISR_An, dsisr & ~CXL_PSL_DSISR_An_PE); in recover_psl_err()
1448 cxl_p2n_write(afu, CXL_PSL_ErrStat_An, errstat); in recover_psl_err()
1455 cxl_p2n_write(ctx->afu, CXL_PSL_TFC_An, tfc); in native_ack_irq()
1457 recover_psl_err(ctx->afu, psl_reset_mask); in native_ack_irq()
1462 int cxl_check_error(struct cxl_afu *afu) in cxl_check_error() argument
1464 return (cxl_p1n_read(afu, CXL_PSL_SCNTL_An) == ~0ULL); in cxl_check_error()
1473 static int native_afu_cr_read64(struct cxl_afu *afu, int cr, u64 off, u64 *out) in native_afu_cr_read64() argument
1475 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read64()
1477 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read64()
1479 *out = in_le64(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read64()
1480 (cr * afu->crs_len) + off); in native_afu_cr_read64()
1484 static int native_afu_cr_read32(struct cxl_afu *afu, int cr, u64 off, u32 *out) in native_afu_cr_read32() argument
1486 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_read32()
1488 if (unlikely(off >= afu->crs_len)) in native_afu_cr_read32()
1490 *out = in_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_read32()
1491 (cr * afu->crs_len) + off); in native_afu_cr_read32()
1495 static int native_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off, u16 *out) in native_afu_cr_read16() argument
1501 rc = native_afu_cr_read32(afu, cr, aligned_off, &val); in native_afu_cr_read16()
1507 static int native_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off, u8 *out) in native_afu_cr_read8() argument
1513 rc = native_afu_cr_read32(afu, cr, aligned_off, &val); in native_afu_cr_read8()
1519 static int native_afu_cr_write32(struct cxl_afu *afu, int cr, u64 off, u32 in) in native_afu_cr_write32() argument
1521 if (unlikely(!cxl_ops->link_ok(afu->adapter, afu))) in native_afu_cr_write32()
1523 if (unlikely(off >= afu->crs_len)) in native_afu_cr_write32()
1525 out_le32(afu->native->afu_desc_mmio + afu->crs_offset + in native_afu_cr_write32()
1526 (cr * afu->crs_len) + off, in); in native_afu_cr_write32()
1530 static int native_afu_cr_write16(struct cxl_afu *afu, int cr, u64 off, u16 in) in native_afu_cr_write16() argument
1536 rc = native_afu_cr_read32(afu, cr, aligned_off, &val32); in native_afu_cr_write16()
1544 rc = native_afu_cr_write32(afu, cr, aligned_off, val32); in native_afu_cr_write16()
1548 static int native_afu_cr_write8(struct cxl_afu *afu, int cr, u64 off, u8 in) in native_afu_cr_write8() argument
1554 rc = native_afu_cr_read32(afu, cr, aligned_off, &val32); in native_afu_cr_write8()
1561 rc = native_afu_cr_write32(afu, cr, aligned_off, val32); in native_afu_cr_write8()