Lines Matching refs:host
118 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
144 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
152 struct dw_mci *host = s->private; in dw_mci_regs_show() local
154 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
156 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
157 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
158 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
159 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
160 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
161 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
163 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
172 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
179 debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); in dw_mci_init_debugfs()
181 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
183 &host->pending_events); in dw_mci_init_debugfs()
185 &host->completed_events); in dw_mci_init_debugfs()
187 fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); in dw_mci_init_debugfs()
192 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
196 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
198 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
201 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
204 dev_err(host->dev, in dw_mci_ctrl_reset()
213 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
227 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
231 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
237 struct dw_mci *host = slot->host; in mci_send_cmd() local
240 mci_writel(host, CMDARG, arg); in mci_send_cmd()
242 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
243 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
245 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
256 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
278 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
279 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
292 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
294 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
321 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
329 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
354 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
360 static inline void dw_mci_set_cto(struct dw_mci *host) in dw_mci_set_cto() argument
367 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
368 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
373 host->bus_hz); in dw_mci_set_cto()
391 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
392 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
393 mod_timer(&host->cto_timer, in dw_mci_set_cto()
395 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
398 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
401 host->cmd = cmd; in dw_mci_start_command()
402 dev_vdbg(host->dev, in dw_mci_start_command()
406 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
408 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
410 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
414 dw_mci_set_cto(host); in dw_mci_start_command()
417 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
419 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
421 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
425 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
427 if (host->using_dma) { in dw_mci_stop_dma()
428 host->dma_ops->stop(host); in dw_mci_stop_dma()
429 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
433 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
436 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
438 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
441 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
449 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
451 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
454 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
457 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
462 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
465 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
468 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
471 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
476 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
477 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
479 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
481 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
484 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
489 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
496 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
497 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
501 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
505 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
508 host->ring_size = in dw_mci_idmac_init()
512 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
514 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
518 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
529 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
530 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
536 host->ring_size = in dw_mci_idmac_init()
540 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
541 i < host->ring_size - 1; in dw_mci_idmac_init()
543 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
550 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
554 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
556 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
558 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
559 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
563 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
564 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
568 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
569 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
573 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
579 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
588 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
644 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
645 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
646 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
651 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
660 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
718 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
719 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
720 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
724 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
729 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
730 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
732 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
741 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
742 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
745 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
747 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
753 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
755 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
758 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
772 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
774 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
777 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
782 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
784 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
786 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
791 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
797 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
801 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
806 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
808 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
812 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
816 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
822 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
826 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
827 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
830 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
835 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
838 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
839 if (!host->dms) in dw_mci_edmac_init()
842 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
843 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
844 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
846 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
847 kfree(host->dms); in dw_mci_edmac_init()
848 host->dms = NULL; in dw_mci_edmac_init()
855 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
857 if (host->dms) { in dw_mci_edmac_exit()
858 if (host->dms->ch) { in dw_mci_edmac_exit()
859 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
860 host->dms->ch = NULL; in dw_mci_edmac_exit()
862 kfree(host->dms); in dw_mci_edmac_exit()
863 host->dms = NULL; in dw_mci_edmac_exit()
876 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
902 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
920 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
926 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
938 if (!slot->host->use_dma || !data) in dw_mci_post_req()
942 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
953 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
976 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
979 spin_lock_bh(&host->lock); in dw_mci_get_cd()
985 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
990 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
994 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
1000 if (!host->use_dma) in dw_mci_adjust_fifoth()
1003 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
1004 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1027 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1030 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
1041 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1042 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1050 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1058 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1059 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1060 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1063 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1064 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1075 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1079 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1082 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1088 host->using_dma = 0; in dw_mci_submit_data_dma()
1091 if (!host->use_dma) in dw_mci_submit_data_dma()
1094 sg_len = dw_mci_pre_dma_transfer(host, data, COOKIE_MAPPED); in dw_mci_submit_data_dma()
1096 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1100 host->using_dma = 1; in dw_mci_submit_data_dma()
1102 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1103 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1105 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1106 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1114 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1115 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1118 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1120 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1123 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1124 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1126 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1127 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1129 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1130 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1132 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1141 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1149 WARN_ON(host->data); in dw_mci_submit_data()
1150 host->sg = NULL; in dw_mci_submit_data()
1151 host->data = data; in dw_mci_submit_data()
1154 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1156 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1158 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1160 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1161 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1166 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1167 host->sg = data->sg; in dw_mci_submit_data()
1168 host->part_buf_start = 0; in dw_mci_submit_data()
1169 host->part_buf_count = 0; in dw_mci_submit_data()
1171 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1173 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1174 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1176 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1177 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1179 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1181 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1189 if (host->wm_aligned) in dw_mci_submit_data()
1190 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data()
1192 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1193 host->prev_blksz = 0; in dw_mci_submit_data()
1200 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1206 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1213 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1219 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1221 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1222 div = host->bus_hz / clock; in dw_mci_setup_bus()
1223 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1230 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1239 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1240 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1241 host->bus_hz, div); in dw_mci_setup_bus()
1253 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1254 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1260 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1269 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1276 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1277 host->bus_hz; in dw_mci_setup_bus()
1280 host->current_speed = clock; in dw_mci_setup_bus()
1283 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1286 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1296 host->mrq = mrq; in __dw_mci_start_request()
1298 host->pending_events = 0; in __dw_mci_start_request()
1299 host->completed_events = 0; in __dw_mci_start_request()
1300 host->cmd_status = 0; in __dw_mci_start_request()
1301 host->data_status = 0; in __dw_mci_start_request()
1302 host->dir_status = 0; in __dw_mci_start_request()
1306 mci_writel(host, TMOUT, 0xFFFFFFFF); in __dw_mci_start_request()
1307 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1308 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1318 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1322 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1337 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1338 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1339 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1341 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1344 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1347 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1354 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1358 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1362 host->state); in dw_mci_queue_request()
1366 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1374 host->state = STATE_IDLE; in dw_mci_queue_request()
1377 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1378 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1379 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1381 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1388 struct dw_mci *host = slot->host; in dw_mci_request() local
1404 spin_lock_bh(&host->lock); in dw_mci_request()
1406 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1408 spin_unlock_bh(&host->lock); in dw_mci_request()
1414 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1430 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1440 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1441 slot->host->timing = ios->timing; in dw_mci_set_ios()
1450 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1458 dev_err(slot->host->dev, in dw_mci_set_ios()
1465 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1467 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1470 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1474 dev_err(slot->host->dev, in dw_mci_set_ios()
1477 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1481 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1485 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1500 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1502 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1504 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1506 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1512 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1513 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1525 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1533 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1534 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1547 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1562 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1578 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1589 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1592 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1593 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1595 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1605 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1607 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1610 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1616 struct dw_mci *host = slot->host; in dw_mci_prepare_sdio_irq() local
1627 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_prepare_sdio_irq()
1637 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_sdio_irq()
1645 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq() local
1649 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1652 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1657 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1659 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1665 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1672 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1674 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1687 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1688 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1700 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1701 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1704 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1709 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
1719 if (host->sg) { in dw_mci_reset()
1720 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1721 host->sg = NULL; in dw_mci_reset()
1724 if (host->use_dma) in dw_mci_reset()
1727 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
1732 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
1734 if (!host->use_dma) { in dw_mci_reset()
1740 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1744 dev_err(host->dev, in dw_mci_reset()
1751 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
1755 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1756 dev_err(host->dev, in dw_mci_reset()
1763 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1765 dw_mci_idmac_init(host); in dw_mci_reset()
1771 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1795 struct dw_mci *host = container_of(t, struct dw_mci, fault_timer); in dw_mci_fault_timer() local
1798 spin_lock_irqsave(&host->irq_lock, flags); in dw_mci_fault_timer()
1804 if (!host->data_status) { in dw_mci_fault_timer()
1805 host->data_status = SDMMC_INT_DCRC; in dw_mci_fault_timer()
1806 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_fault_timer()
1807 tasklet_schedule(&host->tasklet); in dw_mci_fault_timer()
1810 spin_unlock_irqrestore(&host->irq_lock, flags); in dw_mci_fault_timer()
1815 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1817 struct mmc_data *data = host->data; in dw_mci_start_fault_timer()
1822 if (!should_fail(&host->fail_data_crc, 1)) in dw_mci_start_fault_timer()
1828 hrtimer_start(&host->fault_timer, in dw_mci_start_fault_timer()
1833 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1835 hrtimer_cancel(&host->fault_timer); in dw_mci_stop_fault_timer()
1838 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1840 host->fail_data_crc = (struct fault_attr) FAULT_ATTR_INITIALIZER; in dw_mci_init_fault()
1842 hrtimer_init(&host->fault_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in dw_mci_init_fault()
1843 host->fault_timer.function = dw_mci_fault_timer; in dw_mci_init_fault()
1846 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1850 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1854 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1859 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1860 __releases(&host->lock) in dw_mci_request_end()
1861 __acquires(&host->lock) in dw_mci_request_end()
1864 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1866 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1868 host->slot->mrq = NULL; in dw_mci_request_end()
1869 host->mrq = NULL; in dw_mci_request_end()
1870 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1871 slot = list_entry(host->queue.next, in dw_mci_request_end()
1874 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1876 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1877 dw_mci_start_request(host, slot); in dw_mci_request_end()
1879 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1881 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1882 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1884 host->state = STATE_IDLE; in dw_mci_request_end()
1887 spin_unlock(&host->lock); in dw_mci_request_end()
1889 spin_lock(&host->lock); in dw_mci_request_end()
1892 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1894 u32 status = host->cmd_status; in dw_mci_command_complete()
1896 host->cmd_status = 0; in dw_mci_command_complete()
1901 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1902 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1903 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1904 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1906 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1925 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1927 u32 status = host->data_status; in dw_mci_data_complete()
1935 if (host->dir_status == in dw_mci_data_complete()
1944 } else if (host->dir_status == in dw_mci_data_complete()
1953 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1959 dw_mci_reset(host); in dw_mci_data_complete()
1968 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
1975 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
1976 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
1981 host->bus_hz); in dw_mci_set_drto()
1986 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
1987 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
1988 mod_timer(&host->dto_timer, in dw_mci_set_drto()
1990 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
1993 static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host) in dw_mci_clear_pending_cmd_complete() argument
1995 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
2005 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
2006 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
2011 static bool dw_mci_clear_pending_data_complete(struct dw_mci *host) in dw_mci_clear_pending_data_complete() argument
2013 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
2017 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
2018 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
2025 struct dw_mci *host = from_tasklet(host, t, tasklet); in dw_mci_tasklet_func() local
2033 spin_lock(&host->lock); in dw_mci_tasklet_func()
2035 state = host->state; in dw_mci_tasklet_func()
2036 data = host->data; in dw_mci_tasklet_func()
2037 mrq = host->mrq; in dw_mci_tasklet_func()
2049 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
2052 cmd = host->cmd; in dw_mci_tasklet_func()
2053 host->cmd = NULL; in dw_mci_tasklet_func()
2054 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2055 err = dw_mci_command_complete(host, cmd); in dw_mci_tasklet_func()
2057 __dw_mci_start_request(host, host->slot, in dw_mci_tasklet_func()
2085 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_tasklet_func()
2090 send_stop_abort(host, data); in dw_mci_tasklet_func()
2091 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2097 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2114 &host->pending_events)) { in dw_mci_tasklet_func()
2115 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2117 send_stop_abort(host, data); in dw_mci_tasklet_func()
2118 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2124 &host->pending_events)) { in dw_mci_tasklet_func()
2129 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2130 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2134 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2150 &host->pending_events)) { in dw_mci_tasklet_func()
2151 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2153 send_stop_abort(host, data); in dw_mci_tasklet_func()
2154 dw_mci_stop_dma(host); in dw_mci_tasklet_func()
2163 if (!dw_mci_clear_pending_data_complete(host)) { in dw_mci_tasklet_func()
2169 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2170 dw_mci_set_drto(host); in dw_mci_tasklet_func()
2174 dw_mci_stop_fault_timer(host); in dw_mci_tasklet_func()
2175 host->data = NULL; in dw_mci_tasklet_func()
2176 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2177 err = dw_mci_data_complete(host, data); in dw_mci_tasklet_func()
2183 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2189 send_stop_abort(host, data); in dw_mci_tasklet_func()
2201 &host->pending_events)) { in dw_mci_tasklet_func()
2202 host->cmd = NULL; in dw_mci_tasklet_func()
2203 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2217 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_tasklet_func()
2222 dw_mci_reset(host); in dw_mci_tasklet_func()
2224 dw_mci_stop_fault_timer(host); in dw_mci_tasklet_func()
2225 host->cmd = NULL; in dw_mci_tasklet_func()
2226 host->data = NULL; in dw_mci_tasklet_func()
2229 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2231 host->cmd_status = 0; in dw_mci_tasklet_func()
2233 dw_mci_request_end(host, mrq); in dw_mci_tasklet_func()
2238 &host->pending_events)) in dw_mci_tasklet_func()
2246 host->state = state; in dw_mci_tasklet_func()
2248 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2253 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2255 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2256 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2260 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2262 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2263 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2264 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2269 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2271 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2273 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2275 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2276 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2282 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2284 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2285 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2286 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2289 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2291 struct mmc_data *data = host->data; in dw_mci_push_data16()
2295 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2296 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2300 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2301 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2302 host->part_buf_count = 0; in dw_mci_push_data16()
2318 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2326 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2331 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2335 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2339 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2351 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2363 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2367 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2368 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2372 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2374 struct mmc_data *data = host->data; in dw_mci_push_data32()
2378 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2379 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2383 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2384 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2385 host->part_buf_count = 0; in dw_mci_push_data32()
2401 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2409 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2414 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2418 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2422 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2434 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2446 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2450 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2451 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2455 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2457 struct mmc_data *data = host->data; in dw_mci_push_data64()
2461 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2462 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2467 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2468 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2469 host->part_buf_count = 0; in dw_mci_push_data64()
2485 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2493 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2498 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2502 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2506 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2518 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2531 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2535 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2536 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2540 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2545 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2552 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2555 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2557 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2560 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2561 int shift = host->data_shift; in dw_mci_read_data_pio()
2570 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2576 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2577 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2581 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2588 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2589 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2592 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2604 host->sg = NULL; in dw_mci_read_data_pio()
2606 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2609 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2611 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2614 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2615 int shift = host->data_shift; in dw_mci_write_data_pio()
2618 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2625 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2632 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2633 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2637 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2644 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2645 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2658 host->sg = NULL; in dw_mci_write_data_pio()
2660 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2663 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2665 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2667 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2668 host->cmd_status = status; in dw_mci_cmd_interrupt()
2672 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2673 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2675 dw_mci_start_fault_timer(host); in dw_mci_cmd_interrupt()
2678 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2680 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2683 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2688 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2690 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2692 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2696 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2698 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2705 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2706 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2707 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2709 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2713 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2715 del_timer(&host->cto_timer); in dw_mci_interrupt()
2716 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2717 host->cmd_status = pending; in dw_mci_interrupt()
2719 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2721 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2725 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2728 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2729 host->data_status = pending; in dw_mci_interrupt()
2731 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2732 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2734 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2738 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2740 del_timer(&host->dto_timer); in dw_mci_interrupt()
2742 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2743 if (!host->data_status) in dw_mci_interrupt()
2744 host->data_status = pending; in dw_mci_interrupt()
2746 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2747 if (host->sg != NULL) in dw_mci_interrupt()
2748 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2750 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2751 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2753 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2757 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2758 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2759 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2763 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2764 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2765 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2769 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2771 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2772 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2774 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2778 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2779 dw_mci_handle_cd(host); in dw_mci_interrupt()
2783 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2791 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2795 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2796 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2798 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2800 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2801 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2802 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2805 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2807 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2809 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2810 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2811 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2820 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps() local
2821 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2825 if (host->pdata->caps) in dw_mci_init_slot_caps()
2826 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2828 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2829 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2831 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2832 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2836 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2841 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2848 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2849 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2862 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot() argument
2868 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2874 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
2876 slot->host = host; in dw_mci_init_slot()
2877 host->slot = slot; in dw_mci_init_slot()
2898 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2899 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2902 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2904 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
2942 slot->host->slot = NULL; in dw_mci_cleanup_slot()
2946 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
2949 struct device *dev = host->dev; in dw_mci_init_dma()
2962 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
2963 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
2964 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
2965 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
2966 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
2967 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
2973 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
2978 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
2982 host->dma_64bit_address = 1; in dw_mci_init_dma()
2983 dev_info(host->dev, in dw_mci_init_dma()
2985 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
2986 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
2990 host->dma_64bit_address = 0; in dw_mci_init_dma()
2991 dev_info(host->dev, in dw_mci_init_dma()
2996 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
2998 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
2999 if (!host->sg_cpu) { in dw_mci_init_dma()
3000 dev_err(host->dev, in dw_mci_init_dma()
3006 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
3007 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
3015 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
3016 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
3019 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
3020 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
3021 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
3022 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
3027 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
3034 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
3035 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
3040 struct dw_mci *host = from_timer(host, t, cmd11_timer); in dw_mci_cmd11_timer() local
3042 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
3043 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
3047 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
3048 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
3049 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
3054 struct dw_mci *host = from_timer(host, t, cto_timer); in dw_mci_cto_timer() local
3058 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3068 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3071 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3074 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3076 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3084 switch (host->state) { in dw_mci_cto_timer()
3093 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3094 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3095 tasklet_schedule(&host->tasklet); in dw_mci_cto_timer()
3098 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3099 host->state); in dw_mci_cto_timer()
3104 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3109 struct dw_mci *host = from_timer(host, t, dto_timer); in dw_mci_dto_timer() local
3113 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3119 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3122 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3125 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3127 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3135 switch (host->state) { in dw_mci_dto_timer()
3143 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3144 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3145 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3146 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
3149 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3150 host->state); in dw_mci_dto_timer()
3155 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3159 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3162 struct device *dev = host->dev; in dw_mci_parse_dt()
3163 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3183 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3186 host->wm_aligned = true; in dw_mci_parse_dt()
3192 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3201 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3207 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
3216 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3219 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3220 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3221 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3223 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3224 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3228 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3230 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3234 if (!host->pdata) { in dw_mci_probe()
3235 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3236 if (IS_ERR(host->pdata)) in dw_mci_probe()
3237 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3241 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3242 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3243 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3245 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3247 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3252 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3253 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3254 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3255 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3257 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3259 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3263 if (host->pdata->bus_hz) { in dw_mci_probe()
3264 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3266 dev_warn(host->dev, in dw_mci_probe()
3268 host->pdata->bus_hz); in dw_mci_probe()
3270 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3273 if (!host->bus_hz) { in dw_mci_probe()
3274 dev_err(host->dev, in dw_mci_probe()
3280 if (host->pdata->rstc) { in dw_mci_probe()
3281 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3283 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3287 ret = drv_data->init(host); in dw_mci_probe()
3289 dev_err(host->dev, in dw_mci_probe()
3295 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3296 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3297 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3299 spin_lock_init(&host->lock); in dw_mci_probe()
3300 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3301 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3303 dw_mci_init_fault(host); in dw_mci_probe()
3309 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3311 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3312 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3314 host->data_shift = 1; in dw_mci_probe()
3316 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3317 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3319 host->data_shift = 3; in dw_mci_probe()
3325 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3326 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3328 host->data_shift = 2; in dw_mci_probe()
3332 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3337 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3338 dw_mci_init_dma(host); in dw_mci_probe()
3341 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3342 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3345 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3351 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3358 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3361 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3363 host->fifo_depth = fifo_size; in dw_mci_probe()
3364 host->fifoth_val = in dw_mci_probe()
3366 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3369 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3370 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3376 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3377 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3379 if (host->data_addr_override) in dw_mci_probe()
3380 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3381 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3382 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3384 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3386 tasklet_setup(&host->tasklet, dw_mci_tasklet_func); in dw_mci_probe()
3387 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3388 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3396 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3400 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3402 dev_info(host->dev, in dw_mci_probe()
3404 host->irq, width, fifo_size); in dw_mci_probe()
3407 ret = dw_mci_init_slot(host); in dw_mci_probe()
3409 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3414 dw_mci_enable_cd(host); in dw_mci_probe()
3419 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3420 host->dma_ops->exit(host); in dw_mci_probe()
3422 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3425 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3428 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3434 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3436 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3437 if (host->slot) in dw_mci_remove()
3438 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3440 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3441 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3444 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3445 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3447 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3448 host->dma_ops->exit(host); in dw_mci_remove()
3450 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3452 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3453 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3462 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_suspend() local
3464 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3465 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3467 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3469 if (host->slot && in dw_mci_runtime_suspend()
3470 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3471 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3472 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3481 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_resume() local
3483 if (host->slot && in dw_mci_runtime_resume()
3484 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3485 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3486 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3491 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3495 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_runtime_resume()
3496 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3501 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3502 host->dma_ops->init(host); in dw_mci_runtime_resume()
3508 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3509 host->prev_blksz = 0; in dw_mci_runtime_resume()
3512 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3514 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3515 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3518 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()
3521 if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3522 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3525 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3528 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3529 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3532 dw_mci_enable_cd(host); in dw_mci_runtime_resume()
3537 if (host->slot && in dw_mci_runtime_resume()
3538 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3539 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3540 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()