Lines Matching refs:inl
688 imr = inl(DE4X5_IMR);\
699 imr = inl(DE4X5_IMR);\
708 omr = inl(DE4X5_OMR);\
714 omr = inl(DE4X5_OMR);\
1066 i=inl(DE4X5_BMR);\
1072 for (i=0;i<5;i++) {inl(DE4X5_BMR); mdelay(1);}\
1116 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { in de4x5_hw_init()
1345 printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); in de4x5_open()
1346 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); in de4x5_open()
1347 printk("\timr: 0x%08x\n", inl(DE4X5_IMR)); in de4x5_open()
1348 printk("\tomr: 0x%08x\n", inl(DE4X5_OMR)); in de4x5_open()
1349 printk("\tsisr: 0x%08x\n", inl(DE4X5_SISR)); in de4x5_open()
1350 printk("\tsicr: 0x%08x\n", inl(DE4X5_SICR)); in de4x5_open()
1351 printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR)); in de4x5_open()
1352 printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR)); in de4x5_open()
1407 omr = inl(DE4X5_OMR) & ~OMR_PR; /* Turn off promiscuous mode */ in de4x5_sw_reset()
1445 inl(DE4X5_STS)); in de4x5_sw_reset()
1490 …08x\n OMR:%08x\n Stale skb: %s\n",dev->name, inl(DE4X5_STS), netif_queue_stopped(dev), inl(DE4X5_… in de4x5_queue_pkt()
1558 sts = inl(DE4X5_STS); /* Read IRQ status */ in de4x5_interrupt()
1615 if (inl(DE4X5_MFC) & MFC_FOCM) { in de4x5_rx()
1777 omr = inl(DE4X5_OMR); in de4x5_txur()
1781 while (inl(DE4X5_STS) & STS_TS); in de4x5_txur()
1800 omr = inl(DE4X5_OMR); in de4x5_rx_ovfc()
1802 while (inl(DE4X5_STS) & STS_RS); in de4x5_rx_ovfc()
1827 dev->name, inl(DE4X5_STS)); in de4x5_close()
1856 lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR)); in de4x5_get_stats()
1928 omr = inl(DE4X5_OMR); in set_multicast_list()
1960 omr = inl(DE4X5_OMR); in SetMulticastFilter()
2025 cfid = (u32) inl(PCI_CFID); in de4x5_eisa_probe()
2026 lp->cfrv = (u_short) inl(PCI_CFRV); in de4x5_eisa_probe()
2369 inl(DE4X5_MFC); /* Zero the lost frames counter */ in autoconf_media()
2575 omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */ in dc21041_autoconf()
2622 omr = inl(DE4X5_OMR); /* Set up half duplex for TP */ in dc21041_autoconf()
2632 if (inl(DE4X5_SISR) & SISR_NRA) { in dc21041_autoconf()
2656 omr = inl(DE4X5_OMR); /* Set up half duplex for AUI */ in dc21041_autoconf()
2665 if (!(inl(DE4X5_SISR) & SISR_SRA) && (lp->autosense == AUTO)) { in dc21041_autoconf()
2687 omr = inl(DE4X5_OMR); /* Set up half duplex for BNC */ in dc21041_autoconf()
2726 omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */ in dc21041_autoconf()
3035 omr = inl(DE4X5_OMR); /* Set up half duplex for AUI */ in dc2114x_autoconf()
3044 if (!(inl(DE4X5_SISR) & SISR_SRA) && (lp->autosense == AUTO)) { in dc2114x_autoconf()
3066 omr = inl(DE4X5_OMR); /* Set up half duplex for BNC */ in dc2114x_autoconf()
3343 sts = inl(DE4X5_STS); in test_media()
3348 csr12 = inl(DE4X5_SISR); in test_media()
3353 sts = inl(DE4X5_STS) & ~TIMER_CB; in test_media()
3375 sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR); in test_tp()
3484 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0; in is_spd_100()
3507 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0; in is_100_up()
3529 (~inl(DE4X5_SISR)&SISR_LS10): in is_10_up()
3546 return (inl(DE4X5_SISR) & SISR_LPN) >> 12; in is_anc_capable()
3572 sisr = inl(DE4X5_SISR); in ping_media()
3739 lp->cache.csr0 = inl(DE4X5_BMR); in de4x5_cache_state()
3740 lp->cache.csr6 = (inl(DE4X5_OMR) & ~(OMR_ST | OMR_SR)); in de4x5_cache_state()
3741 lp->cache.csr7 = inl(DE4X5_IMR); in de4x5_cache_state()
3799 sts = inl(DE4X5_STS); in test_ans()
3803 ans = inl(DE4X5_SISR) & SISR_ANS; in test_ans()
3804 sts = inl(DE4X5_STS) & ~TIMER_CB; in test_ans()
3822 if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */ in de4x5_setup_intr()
3825 sts = inl(DE4X5_STS); /* Reset any pending (stale) interrupts */ in de4x5_setup_intr()
4044 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4047 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4072 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4074 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4289 tmp = inl(addr); in getfrom_srom()
4920 return (inl(ioaddr) >> 19) & 1; in getfrom_mii()
5090 omr = (inl(DE4X5_OMR) & ~(OMR_PS | OMR_HBD | OMR_TTM | OMR_PCS | OMR_SCR | in de4x5_switch_mac_port()
5111 inl(DE4X5_MFC); in de4x5_switch_mac_port()
5136 return inl(DE4X5_GEP); in gep_rd()
5138 return inl(DE4X5_SIGR) & 0x000fffff; in gep_rd()
5420 omr = inl(DE4X5_OMR); in de4x5_siocdevprivate()
5444 tmp.addr[0] = inl(DE4X5_OMR); in de4x5_siocdevprivate()
5456 tmp.lval[0] = inl(DE4X5_STS); j+=4; in de4x5_siocdevprivate()
5457 tmp.lval[1] = inl(DE4X5_BMR); j+=4; in de4x5_siocdevprivate()
5458 tmp.lval[2] = inl(DE4X5_IMR); j+=4; in de4x5_siocdevprivate()
5459 tmp.lval[3] = inl(DE4X5_OMR); j+=4; in de4x5_siocdevprivate()
5460 tmp.lval[4] = inl(DE4X5_SISR); j+=4; in de4x5_siocdevprivate()
5461 tmp.lval[5] = inl(DE4X5_SICR); j+=4; in de4x5_siocdevprivate()
5462 tmp.lval[6] = inl(DE4X5_STRR); j+=4; in de4x5_siocdevprivate()
5463 tmp.lval[7] = inl(DE4X5_SIGR); j+=4; in de4x5_siocdevprivate()