Lines Matching refs:c2
496 struct mvpp2_cls_c2_entry *c2) in mvpp2_cls_c2_write() argument
499 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, c2->index); in mvpp2_cls_c2_write()
502 if (c2->valid) in mvpp2_cls_c2_write()
508 mvpp2_write(priv, MVPP22_CLS_C2_ACT, c2->act); in mvpp2_cls_c2_write()
510 mvpp2_write(priv, MVPP22_CLS_C2_ATTR0, c2->attr[0]); in mvpp2_cls_c2_write()
511 mvpp2_write(priv, MVPP22_CLS_C2_ATTR1, c2->attr[1]); in mvpp2_cls_c2_write()
512 mvpp2_write(priv, MVPP22_CLS_C2_ATTR2, c2->attr[2]); in mvpp2_cls_c2_write()
513 mvpp2_write(priv, MVPP22_CLS_C2_ATTR3, c2->attr[3]); in mvpp2_cls_c2_write()
515 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA0, c2->tcam[0]); in mvpp2_cls_c2_write()
516 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA1, c2->tcam[1]); in mvpp2_cls_c2_write()
517 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA2, c2->tcam[2]); in mvpp2_cls_c2_write()
518 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA3, c2->tcam[3]); in mvpp2_cls_c2_write()
520 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_DATA4, c2->tcam[4]); in mvpp2_cls_c2_write()
524 struct mvpp2_cls_c2_entry *c2) in mvpp2_cls_c2_read() argument
529 c2->index = index; in mvpp2_cls_c2_read()
531 c2->tcam[0] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA0); in mvpp2_cls_c2_read()
532 c2->tcam[1] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA1); in mvpp2_cls_c2_read()
533 c2->tcam[2] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA2); in mvpp2_cls_c2_read()
534 c2->tcam[3] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA3); in mvpp2_cls_c2_read()
535 c2->tcam[4] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA4); in mvpp2_cls_c2_read()
537 c2->act = mvpp2_read(priv, MVPP22_CLS_C2_ACT); in mvpp2_cls_c2_read()
539 c2->attr[0] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR0); in mvpp2_cls_c2_read()
540 c2->attr[1] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR1); in mvpp2_cls_c2_read()
541 c2->attr[2] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR2); in mvpp2_cls_c2_read()
542 c2->attr[3] = mvpp2_read(priv, MVPP22_CLS_C2_ATTR3); in mvpp2_cls_c2_read()
545 c2->valid = !(val & MVPP22_CLS_C2_TCAM_INV_BIT); in mvpp2_cls_c2_read()
863 struct mvpp2_cls_c2_entry c2; in mvpp2_port_c2_cls_init() local
866 memset(&c2, 0, sizeof(c2)); in mvpp2_port_c2_cls_init()
868 c2.index = MVPP22_CLS_C2_RSS_ENTRY(port->id); in mvpp2_port_c2_cls_init()
871 c2.tcam[4] = MVPP22_CLS_C2_PORT_ID(pmap); in mvpp2_port_c2_cls_init()
872 c2.tcam[4] |= MVPP22_CLS_C2_TCAM_EN(MVPP22_CLS_C2_PORT_ID(pmap)); in mvpp2_port_c2_cls_init()
875 c2.tcam[4] |= MVPP22_CLS_C2_TCAM_EN(MVPP22_CLS_C2_LU_TYPE(MVPP2_CLS_LU_TYPE_MASK)); in mvpp2_port_c2_cls_init()
876 c2.tcam[4] |= MVPP22_CLS_C2_LU_TYPE(MVPP22_CLS_LU_TYPE_ALL); in mvpp2_port_c2_cls_init()
879 c2.act = MVPP22_CLS_C2_ACT_RSS_EN(MVPP22_C2_UPD_LOCK); in mvpp2_port_c2_cls_init()
882 c2.act |= MVPP22_CLS_C2_ACT_FWD(MVPP22_C2_FWD_SW_LOCK); in mvpp2_port_c2_cls_init()
887 c2.act |= MVPP22_CLS_C2_ACT_QHIGH(MVPP22_C2_UPD) | in mvpp2_port_c2_cls_init()
893 c2.attr[0] = MVPP22_CLS_C2_ATTR0_QHIGH(qh) | in mvpp2_port_c2_cls_init()
896 c2.valid = true; in mvpp2_port_c2_cls_init()
898 mvpp2_cls_c2_write(port->priv, &c2); in mvpp2_port_c2_cls_init()
906 struct mvpp2_cls_c2_entry c2; in mvpp2_cls_init() local
931 memset(&c2, 0, sizeof(c2)); in mvpp2_cls_init()
932 c2.valid = false; in mvpp2_cls_init()
934 c2.index = index; in mvpp2_cls_init()
935 mvpp2_cls_c2_write(priv, &c2); in mvpp2_cls_init()
986 struct mvpp2_cls_c2_entry c2; in mvpp2_rss_port_c2_enable() local
989 mvpp2_cls_c2_read(port->priv, MVPP22_CLS_C2_RSS_ENTRY(port->id), &c2); in mvpp2_rss_port_c2_enable()
997 c2.attr[0] = MVPP22_CLS_C2_ATTR0_QHIGH(qh) | in mvpp2_rss_port_c2_enable()
1000 c2.attr[2] |= MVPP22_CLS_C2_ATTR2_RSS_EN; in mvpp2_rss_port_c2_enable()
1002 mvpp2_cls_c2_write(port->priv, &c2); in mvpp2_rss_port_c2_enable()
1007 struct mvpp2_cls_c2_entry c2; in mvpp2_rss_port_c2_disable() local
1010 mvpp2_cls_c2_read(port->priv, MVPP22_CLS_C2_RSS_ENTRY(port->id), &c2); in mvpp2_rss_port_c2_disable()
1016 c2.attr[0] = MVPP22_CLS_C2_ATTR0_QHIGH(qh) | in mvpp2_rss_port_c2_disable()
1019 c2.attr[2] &= ~MVPP22_CLS_C2_ATTR2_RSS_EN; in mvpp2_rss_port_c2_disable()
1021 mvpp2_cls_c2_write(port->priv, &c2); in mvpp2_rss_port_c2_disable()
1051 struct mvpp2_cls_c2_entry c2; in mvpp22_port_c2_lookup_disable() local
1053 mvpp2_cls_c2_read(port->priv, entry, &c2); in mvpp22_port_c2_lookup_disable()
1056 c2.tcam[4] &= ~(MVPP22_CLS_C2_PORT_ID(BIT(port->id))); in mvpp22_port_c2_lookup_disable()
1058 mvpp2_cls_c2_write(port->priv, &c2); in mvpp22_port_c2_lookup_disable()
1081 struct mvpp2_cls_c2_entry c2; in mvpp2_port_c2_tcam_rule_add() local
1088 memset(&c2, 0, sizeof(c2)); in mvpp2_port_c2_tcam_rule_add()
1093 c2.index = index; in mvpp2_port_c2_tcam_rule_add()
1097 rule->c2_index = c2.index; in mvpp2_port_c2_tcam_rule_add()
1099 c2.tcam[3] = (rule->c2_tcam & 0xffff) | in mvpp2_port_c2_tcam_rule_add()
1101 c2.tcam[2] = ((rule->c2_tcam >> 16) & 0xffff) | in mvpp2_port_c2_tcam_rule_add()
1103 c2.tcam[1] = ((rule->c2_tcam >> 32) & 0xffff) | in mvpp2_port_c2_tcam_rule_add()
1105 c2.tcam[0] = ((rule->c2_tcam >> 48) & 0xffff) | in mvpp2_port_c2_tcam_rule_add()
1109 c2.tcam[4] = MVPP22_CLS_C2_PORT_ID(pmap); in mvpp2_port_c2_tcam_rule_add()
1110 c2.tcam[4] |= MVPP22_CLS_C2_TCAM_EN(MVPP22_CLS_C2_PORT_ID(pmap)); in mvpp2_port_c2_tcam_rule_add()
1113 c2.tcam[4] |= MVPP22_CLS_C2_TCAM_EN(MVPP22_CLS_C2_LU_TYPE(MVPP2_CLS_LU_TYPE_MASK)); in mvpp2_port_c2_tcam_rule_add()
1114 c2.tcam[4] |= MVPP22_CLS_C2_LU_TYPE(rule->loc); in mvpp2_port_c2_tcam_rule_add()
1117 c2.act = MVPP22_CLS_C2_ACT_COLOR(MVPP22_C2_COL_RED_LOCK); in mvpp2_port_c2_tcam_rule_add()
1124 c2.act = MVPP22_CLS_C2_ACT_COLOR(MVPP22_C2_COL_NO_UPD_LOCK); in mvpp2_port_c2_tcam_rule_add()
1128 c2.attr[2] |= MVPP22_CLS_C2_ATTR2_RSS_EN; in mvpp2_port_c2_tcam_rule_add()
1134 c2.act = MVPP22_CLS_C2_ACT_RSS_EN(MVPP22_C2_UPD_LOCK); in mvpp2_port_c2_tcam_rule_add()
1137 c2.act |= MVPP22_CLS_C2_ACT_FWD(MVPP22_C2_FWD_SW_LOCK); in mvpp2_port_c2_tcam_rule_add()
1139 c2.act |= MVPP22_CLS_C2_ACT_QHIGH(MVPP22_C2_UPD_LOCK) | in mvpp2_port_c2_tcam_rule_add()
1157 c2.attr[0] = MVPP22_CLS_C2_ATTR0_QHIGH(qh) | in mvpp2_port_c2_tcam_rule_add()
1161 c2.valid = true; in mvpp2_port_c2_tcam_rule_add()
1163 mvpp2_cls_c2_write(port->priv, &c2); in mvpp2_port_c2_tcam_rule_add()