Lines Matching refs:plat
149 ret = clk_prepare_enable(priv->plat->stmmac_clk); in stmmac_bus_clks_config()
152 ret = clk_prepare_enable(priv->plat->pclk); in stmmac_bus_clks_config()
154 clk_disable_unprepare(priv->plat->stmmac_clk); in stmmac_bus_clks_config()
157 if (priv->plat->clks_config) { in stmmac_bus_clks_config()
158 ret = priv->plat->clks_config(priv->plat->bsp_priv, enabled); in stmmac_bus_clks_config()
160 clk_disable_unprepare(priv->plat->stmmac_clk); in stmmac_bus_clks_config()
161 clk_disable_unprepare(priv->plat->pclk); in stmmac_bus_clks_config()
166 clk_disable_unprepare(priv->plat->stmmac_clk); in stmmac_bus_clks_config()
167 clk_disable_unprepare(priv->plat->pclk); in stmmac_bus_clks_config()
168 if (priv->plat->clks_config) in stmmac_bus_clks_config()
169 priv->plat->clks_config(priv->plat->bsp_priv, enabled); in stmmac_bus_clks_config()
199 u32 rx_queues_cnt = priv->plat->rx_queues_to_use; in __stmmac_disable_all_queues()
200 u32 tx_queues_cnt = priv->plat->tx_queues_to_use; in __stmmac_disable_all_queues()
226 u32 rx_queues_cnt = priv->plat->rx_queues_to_use; in stmmac_disable_all_queues()
248 u32 rx_queues_cnt = priv->plat->rx_queues_to_use; in stmmac_enable_all_queues()
249 u32 tx_queues_cnt = priv->plat->tx_queues_to_use; in stmmac_enable_all_queues()
299 clk_rate = clk_get_rate(priv->plat->stmmac_clk); in stmmac_clk_csr_set()
323 if (priv->plat->has_sun8i) { in stmmac_clk_csr_set()
334 if (priv->plat->has_xgmac) { in stmmac_clk_csr_set()
405 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_enable_eee_mode()
419 priv->plat->en_tx_lpi_clockgating); in stmmac_enable_eee_mode()
489 priv->plat->mult_fact_100ns, in stmmac_eee_init()
502 priv->plat->mult_fact_100ns, in stmmac_eee_init()
506 if (priv->plat->has_gmac4 && priv->tx_lpi_timer <= STMMAC_ET_MAX) { in stmmac_eee_init()
524 if (priv->plat->has_gmac4 && priv->plat->clk_ptp_rate) in stmmac_cdc_adjust()
525 return (2 * NSEC_PER_SEC) / priv->plat->clk_ptp_rate; in stmmac_cdc_adjust()
590 if (priv->plat->has_gmac4 || priv->plat->has_xgmac) in stmmac_get_rx_hwtstamp()
842 bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; in stmmac_init_tstamp_counter()
851 ret = clk_prepare_enable(priv->plat->clk_ptp_ref); in stmmac_init_tstamp_counter()
864 priv->plat->clk_ptp_rate, in stmmac_init_tstamp_counter()
877 priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate); in stmmac_init_tstamp_counter()
899 bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; in stmmac_init_ptp()
931 clk_disable_unprepare(priv->plat->clk_ptp_ref); in stmmac_release_ptp()
943 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_mac_flow_ctrl()
956 int tx_cnt = priv->plat->tx_queues_to_use; in stmmac_validate()
957 int max_speed = priv->plat->max_speed; in stmmac_validate()
976 } else if (priv->plat->has_gmac4) { in stmmac_validate()
981 } else if (priv->plat->has_xgmac) { in stmmac_validate()
1058 struct stmmac_fpe_cfg *fpe_cfg = priv->plat->fpe_cfg; in stmmac_fpe_link_state_handle()
1159 if (priv->plat->fix_mac_speed) in stmmac_mac_link_up()
1160 priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed); in stmmac_mac_link_up()
1201 int interface = priv->plat->interface; in stmmac_check_pcs_mode()
1231 node = priv->plat->phylink_node; in stmmac_init_phy()
1240 int addr = priv->plat->phy_addr; in stmmac_init_phy()
1252 if (!priv->plat->pmt) { in stmmac_init_phy()
1264 struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data; in stmmac_phy_setup()
1265 struct fwnode_handle *fwnode = of_fwnode_handle(priv->plat->phylink_node); in stmmac_phy_setup()
1266 int mode = priv->plat->phy_interface; in stmmac_phy_setup()
1272 if (priv->plat->mdio_bus_data) in stmmac_phy_setup()
1293 u32 rx_cnt = priv->plat->rx_queues_to_use; in stmmac_display_rx_rings()
1320 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_display_tx_rings()
1436 u32 rx_queue_cnt = priv->plat->rx_queues_to_use; in stmmac_clear_descriptors()
1437 u32 tx_queue_cnt = priv->plat->tx_queues_to_use; in stmmac_clear_descriptors()
1731 u32 rx_count = priv->plat->rx_queues_to_use; in init_dma_rx_desc_rings()
1833 tx_queue_cnt = priv->plat->tx_queues_to_use; in init_dma_tx_desc_rings()
1896 u32 tx_queue_cnt = priv->plat->tx_queues_to_use; in stmmac_free_tx_skbufs()
1941 u32 rx_count = priv->plat->rx_queues_to_use; in free_dma_rx_desc_resources()
1984 u32 tx_count = priv->plat->tx_queues_to_use; in free_dma_tx_desc_resources()
2075 u32 rx_count = priv->plat->rx_queues_to_use; in alloc_dma_rx_desc_resources()
2150 u32 tx_count = priv->plat->tx_queues_to_use; in alloc_dma_tx_desc_resources()
2211 u32 rx_queues_count = priv->plat->rx_queues_to_use; in stmmac_mac_enable_rx_queues()
2216 mode = priv->plat->rx_queues_cfg[queue].mode_to_use; in stmmac_mac_enable_rx_queues()
2281 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_start_all_dma()
2282 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_start_all_dma()
2300 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_stop_all_dma()
2301 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_stop_all_dma()
2319 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_dma_operation_mode()
2320 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_dma_operation_mode()
2321 int rxfifosz = priv->plat->rx_fifo_size; in stmmac_dma_operation_mode()
2322 int txfifosz = priv->plat->tx_fifo_size; in stmmac_dma_operation_mode()
2337 if (priv->plat->force_thresh_dma_mode) { in stmmac_dma_operation_mode()
2340 } else if (priv->plat->force_sf_dma_mode || priv->plat->tx_coe) { in stmmac_dma_operation_mode()
2361 qmode = priv->plat->rx_queues_cfg[chan].mode_to_use; in stmmac_dma_operation_mode()
2379 qmode = priv->plat->tx_queues_cfg[chan].mode_to_use; in stmmac_dma_operation_mode()
2679 stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, in stmmac_tx_err()
2700 u8 rxqmode = priv->plat->rx_queues_cfg[chan].mode_to_use; in stmmac_set_dma_operation_mode()
2701 u8 txqmode = priv->plat->tx_queues_cfg[chan].mode_to_use; in stmmac_set_dma_operation_mode()
2702 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_set_dma_operation_mode()
2703 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_set_dma_operation_mode()
2704 int rxfifosz = priv->plat->rx_fifo_size; in stmmac_set_dma_operation_mode()
2705 int txfifosz = priv->plat->tx_fifo_size; in stmmac_set_dma_operation_mode()
2748 if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) { in stmmac_napi_check()
2757 if ((status & handle_tx) && (chan < priv->plat->tx_queues_to_use)) { in stmmac_napi_check()
2778 u32 tx_channel_count = priv->plat->tx_queues_to_use; in stmmac_dma_interrupt()
2779 u32 rx_channel_count = priv->plat->rx_queues_to_use; in stmmac_dma_interrupt()
2799 if (priv->plat->force_thresh_dma_mode) in stmmac_dma_interrupt()
2882 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_init_dma_engine()
2883 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_init_dma_engine()
2891 if (!priv->plat->dma_cfg || !priv->plat->dma_cfg->pbl) { in stmmac_init_dma_engine()
2906 stmmac_dma_init(priv, priv->ioaddr, priv->plat->dma_cfg, atds); in stmmac_init_dma_engine()
2908 if (priv->plat->axi) in stmmac_init_dma_engine()
2909 stmmac_axi(priv, priv->ioaddr, priv->plat->axi); in stmmac_init_dma_engine()
2913 stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan); in stmmac_init_dma_engine()
2919 stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, in stmmac_init_dma_engine()
2933 stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, in stmmac_init_dma_engine()
2991 u32 tx_channel_count = priv->plat->tx_queues_to_use; in stmmac_init_coalesce()
2992 u32 rx_channel_count = priv->plat->rx_queues_to_use; in stmmac_init_coalesce()
3011 u32 rx_channels_count = priv->plat->rx_queues_to_use; in stmmac_set_rings_length()
3012 u32 tx_channels_count = priv->plat->tx_queues_to_use; in stmmac_set_rings_length()
3033 u32 tx_queues_count = priv->plat->tx_queues_to_use; in stmmac_set_tx_queue_weight()
3038 weight = priv->plat->tx_queues_cfg[queue].weight; in stmmac_set_tx_queue_weight()
3050 u32 tx_queues_count = priv->plat->tx_queues_to_use; in stmmac_configure_cbs()
3056 mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use; in stmmac_configure_cbs()
3061 priv->plat->tx_queues_cfg[queue].send_slope, in stmmac_configure_cbs()
3062 priv->plat->tx_queues_cfg[queue].idle_slope, in stmmac_configure_cbs()
3063 priv->plat->tx_queues_cfg[queue].high_credit, in stmmac_configure_cbs()
3064 priv->plat->tx_queues_cfg[queue].low_credit, in stmmac_configure_cbs()
3076 u32 rx_queues_count = priv->plat->rx_queues_to_use; in stmmac_rx_queue_dma_chan_map()
3081 chan = priv->plat->rx_queues_cfg[queue].chan; in stmmac_rx_queue_dma_chan_map()
3093 u32 rx_queues_count = priv->plat->rx_queues_to_use; in stmmac_mac_config_rx_queues_prio()
3098 if (!priv->plat->rx_queues_cfg[queue].use_prio) in stmmac_mac_config_rx_queues_prio()
3101 prio = priv->plat->rx_queues_cfg[queue].prio; in stmmac_mac_config_rx_queues_prio()
3113 u32 tx_queues_count = priv->plat->tx_queues_to_use; in stmmac_mac_config_tx_queues_prio()
3118 if (!priv->plat->tx_queues_cfg[queue].use_prio) in stmmac_mac_config_tx_queues_prio()
3121 prio = priv->plat->tx_queues_cfg[queue].prio; in stmmac_mac_config_tx_queues_prio()
3133 u32 rx_queues_count = priv->plat->rx_queues_to_use; in stmmac_mac_config_rx_queues_routing()
3139 if (priv->plat->rx_queues_cfg[queue].pkt_route == 0x0) in stmmac_mac_config_rx_queues_routing()
3142 packet = priv->plat->rx_queues_cfg[queue].pkt_route; in stmmac_mac_config_rx_queues_routing()
3149 if (!priv->dma_cap.rssen || !priv->plat->rss_en) { in stmmac_mac_config_rss()
3160 priv->plat->rx_queues_to_use); in stmmac_mac_config_rss()
3170 u32 rx_queues_count = priv->plat->rx_queues_to_use; in stmmac_mtl_configuration()
3171 u32 tx_queues_count = priv->plat->tx_queues_to_use; in stmmac_mtl_configuration()
3179 priv->plat->rx_sched_algorithm); in stmmac_mtl_configuration()
3184 priv->plat->tx_sched_algorithm); in stmmac_mtl_configuration()
3218 priv->plat->safety_feat_cfg); in stmmac_safety_feat_configuration()
3261 u32 rx_cnt = priv->plat->rx_queues_to_use; in stmmac_hw_setup()
3262 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_hw_setup()
3280 int speed = priv->plat->mac_port_sel_speed; in stmmac_hw_setup()
3303 priv->plat->rx_coe = STMMAC_RX_COE_NONE; in stmmac_hw_setup()
3379 netif_set_real_num_rx_queues(dev, priv->plat->rx_queues_to_use); in stmmac_hw_setup()
3380 netif_set_real_num_tx_queues(dev, priv->plat->tx_queues_to_use); in stmmac_hw_setup()
3388 if (priv->plat->fpe_cfg->enable) in stmmac_hw_setup()
3399 clk_disable_unprepare(priv->plat->clk_ptp_ref); in stmmac_hw_teardown()
3410 irq_idx = priv->plat->tx_queues_to_use; in stmmac_free_irq()
3419 irq_idx = priv->plat->rx_queues_to_use; in stmmac_free_irq()
3550 for (i = 0; i < priv->plat->rx_queues_to_use; i++) { in stmmac_request_irq_multi_msi()
3575 for (i = 0; i < priv->plat->tx_queues_to_use; i++) { in stmmac_request_irq_multi_msi()
3663 if (priv->plat->multi_msi_en) in stmmac_request_irq()
3683 int mode = priv->plat->phy_interface; in stmmac_open()
3729 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) { in stmmac_open()
3731 int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en; in stmmac_open()
3775 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) in stmmac_open()
3819 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) in stmmac_release()
4247 if (priv->plat->has_gmac4 && (gso & SKB_GSO_UDP_L4)) in stmmac_xmit()
4284 enh_desc = priv->plat->enh_desc; in stmmac_xmit()
4677 while (index >= priv->plat->tx_queues_to_use) in stmmac_xdp_get_tx_queue()
4678 index -= priv->plat->tx_queues_to_use; in stmmac_xdp_get_tx_queue()
5486 int txfifosz = priv->plat->tx_fifo_size; in stmmac_change_mtu()
5492 txfifosz /= priv->plat->tx_queues_to_use; in stmmac_change_mtu()
5522 if (priv->plat->rx_coe == STMMAC_RX_COE_NONE) in stmmac_fix_features()
5525 if (!priv->plat->tx_coe) in stmmac_fix_features()
5533 if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN)) in stmmac_fix_features()
5537 if ((priv->plat->tso_en) && (priv->dma_cap.tsoen)) { in stmmac_fix_features()
5554 priv->hw->rx_csum = priv->plat->rx_coe; in stmmac_set_features()
5566 for (chan = 0; chan < priv->plat->rx_queues_to_use; chan++) in stmmac_set_features()
5575 struct stmmac_fpe_cfg *fpe_cfg = priv->plat->fpe_cfg; in stmmac_fpe_event_status()
5617 u32 rx_cnt = priv->plat->rx_queues_to_use; in stmmac_common_interrupt()
5618 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_common_interrupt()
5623 xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; in stmmac_common_interrupt()
5641 if ((priv->plat->has_gmac) || xmac) { in stmmac_common_interrupt()
5767 if (priv->plat->force_thresh_dma_mode) in stmmac_msi_intr_tx()
5821 if (priv->plat->multi_msi_en) { in stmmac_poll_controller()
5822 for (i = 0; i < priv->plat->rx_queues_to_use; i++) in stmmac_poll_controller()
5825 for (i = 0; i < priv->plat->tx_queues_to_use; i++) in stmmac_poll_controller()
5999 u32 rx_count = priv->plat->rx_queues_to_use; in stmmac_rings_status_show()
6000 u32 tx_count = priv->plat->tx_queues_to_use; in stmmac_rings_status_show()
6396 stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, in stmmac_enable_rx_queue()
6457 stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, in stmmac_enable_tx_queue()
6488 if (queue >= priv->plat->rx_queues_to_use || in stmmac_xsk_wakeup()
6489 queue >= priv->plat->tx_queues_to_use) in stmmac_xsk_wakeup()
6577 if (priv->plat->has_sun8i) in stmmac_hw_init()
6596 priv->plat->enh_desc = priv->dma_cap.enh_desc; in stmmac_hw_init()
6597 priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up && in stmmac_hw_init()
6598 !priv->plat->use_phy_wol; in stmmac_hw_init()
6599 priv->hw->pmt = priv->plat->pmt; in stmmac_hw_init()
6608 if (priv->plat->force_thresh_dma_mode) in stmmac_hw_init()
6609 priv->plat->tx_coe = 0; in stmmac_hw_init()
6611 priv->plat->tx_coe = priv->dma_cap.tx_coe; in stmmac_hw_init()
6614 priv->plat->rx_coe = priv->dma_cap.rx_coe; in stmmac_hw_init()
6617 priv->plat->rx_coe = STMMAC_RX_COE_TYPE2; in stmmac_hw_init()
6619 priv->plat->rx_coe = STMMAC_RX_COE_TYPE1; in stmmac_hw_init()
6625 if (priv->plat->rx_coe) { in stmmac_hw_init()
6626 priv->hw->rx_csum = priv->plat->rx_coe; in stmmac_hw_init()
6631 if (priv->plat->tx_coe) in stmmac_hw_init()
6634 if (priv->plat->pmt) { in stmmac_hw_init()
6642 priv->hw->vlan_fail_q_en = priv->plat->vlan_fail_q_en; in stmmac_hw_init()
6643 priv->hw->vlan_fail_q = priv->plat->vlan_fail_q; in stmmac_hw_init()
6658 (priv->plat->has_xgmac)) && (!priv->plat->riwt_off)) { in stmmac_hw_init()
6672 maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use); in stmmac_napi_add()
6681 if (queue < priv->plat->rx_queues_to_use) { in stmmac_napi_add()
6685 if (queue < priv->plat->tx_queues_to_use) { in stmmac_napi_add()
6690 if (queue < priv->plat->rx_queues_to_use && in stmmac_napi_add()
6691 queue < priv->plat->tx_queues_to_use) { in stmmac_napi_add()
6704 maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use); in stmmac_napi_del()
6709 if (queue < priv->plat->rx_queues_to_use) in stmmac_napi_del()
6711 if (queue < priv->plat->tx_queues_to_use) in stmmac_napi_del()
6713 if (queue < priv->plat->rx_queues_to_use && in stmmac_napi_del()
6714 queue < priv->plat->tx_queues_to_use) { in stmmac_napi_del()
6730 priv->plat->rx_queues_to_use = rx_cnt; in stmmac_reinit_queues()
6731 priv->plat->tx_queues_to_use = tx_cnt; in stmmac_reinit_queues()
6763 struct stmmac_fpe_cfg *fpe_cfg = priv->plat->fpe_cfg; in stmmac_fpe_lp_task()
6778 priv->plat->tx_queues_to_use, in stmmac_fpe_lp_task()
6779 priv->plat->rx_queues_to_use, in stmmac_fpe_lp_task()
6807 if (priv->plat->fpe_cfg->hs_enable != enable) { in stmmac_fpe_handshake()
6812 priv->plat->fpe_cfg->lo_fpe_state = FPE_STATE_OFF; in stmmac_fpe_handshake()
6813 priv->plat->fpe_cfg->lp_fpe_state = FPE_STATE_OFF; in stmmac_fpe_handshake()
6816 priv->plat->fpe_cfg->hs_enable = enable; in stmmac_fpe_handshake()
6852 priv->plat = plat_dat; in stmmac_dvr_probe()
6855 priv->plat->dma_cfg->multi_msi_en = priv->plat->multi_msi_en; in stmmac_dvr_probe()
6895 priv->plat->phy_addr = phyaddr; in stmmac_dvr_probe()
6897 if (priv->plat->stmmac_rst) { in stmmac_dvr_probe()
6898 ret = reset_control_assert(priv->plat->stmmac_rst); in stmmac_dvr_probe()
6899 reset_control_deassert(priv->plat->stmmac_rst); in stmmac_dvr_probe()
6904 reset_control_reset(priv->plat->stmmac_rst); in stmmac_dvr_probe()
6907 ret = reset_control_deassert(priv->plat->stmmac_ahb_rst); in stmmac_dvr_probe()
6920 priv->plat->dma_cfg->dche = false; in stmmac_dvr_probe()
6934 if ((priv->plat->tso_en) && (priv->dma_cap.tsoen)) { in stmmac_dvr_probe()
6936 if (priv->plat->has_gmac4) in stmmac_dvr_probe()
6954 if (priv->plat->addr64) in stmmac_dvr_probe()
6955 priv->dma_cap.addr64 = priv->plat->addr64; in stmmac_dvr_probe()
6969 priv->plat->dma_cfg->eame = true; in stmmac_dvr_probe()
6999 rxq = priv->plat->rx_queues_to_use; in stmmac_dvr_probe()
7004 if (priv->dma_cap.rssen && priv->plat->rss_en) in stmmac_dvr_probe()
7009 if (priv->plat->has_xgmac) in stmmac_dvr_probe()
7011 else if ((priv->plat->enh_desc) || (priv->synopsys_id >= DWMAC_CORE_4_00)) in stmmac_dvr_probe()
7018 if ((priv->plat->maxmtu < ndev->max_mtu) && in stmmac_dvr_probe()
7019 (priv->plat->maxmtu >= ndev->min_mtu)) in stmmac_dvr_probe()
7020 ndev->max_mtu = priv->plat->maxmtu; in stmmac_dvr_probe()
7021 else if (priv->plat->maxmtu < ndev->min_mtu) in stmmac_dvr_probe()
7024 __func__, priv->plat->maxmtu); in stmmac_dvr_probe()
7040 if (priv->plat->clk_csr >= 0) in stmmac_dvr_probe()
7041 priv->clk_csr = priv->plat->clk_csr; in stmmac_dvr_probe()
7058 __func__, priv->plat->bus_id); in stmmac_dvr_probe()
7063 if (priv->plat->speed_mode_2500) in stmmac_dvr_probe()
7064 priv->plat->speed_mode_2500(ndev, priv->plat->bsp_priv); in stmmac_dvr_probe()
7066 if (priv->plat->mdio_bus_data && priv->plat->mdio_bus_data->has_xpcs) { in stmmac_dvr_probe()
7085 if (priv->plat->serdes_powerup) { in stmmac_dvr_probe()
7086 ret = priv->plat->serdes_powerup(ndev, in stmmac_dvr_probe()
7087 priv->plat->bsp_priv); in stmmac_dvr_probe()
7144 if (priv->plat->serdes_powerdown) in stmmac_dvr_remove()
7145 priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv); in stmmac_dvr_remove()
7151 if (priv->plat->stmmac_rst) in stmmac_dvr_remove()
7152 reset_control_assert(priv->plat->stmmac_rst); in stmmac_dvr_remove()
7153 reset_control_assert(priv->plat->stmmac_ahb_rst); in stmmac_dvr_remove()
7189 for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) in stmmac_suspend()
7200 if (priv->plat->serdes_powerdown) in stmmac_suspend()
7201 priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv); in stmmac_suspend()
7204 if (device_may_wakeup(priv->device) && priv->plat->pmt) { in stmmac_suspend()
7215 if (device_may_wakeup(priv->device) && priv->plat->pmt) { in stmmac_suspend()
7227 priv->plat->tx_queues_to_use, in stmmac_suspend()
7228 priv->plat->rx_queues_to_use, false); in stmmac_suspend()
7245 u32 rx_cnt = priv->plat->rx_queues_to_use; in stmmac_reset_queues_param()
7246 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_reset_queues_param()
7288 if (device_may_wakeup(priv->device) && priv->plat->pmt) { in stmmac_resume()
7300 if (priv->plat->serdes_powerup) { in stmmac_resume()
7301 ret = priv->plat->serdes_powerup(ndev, in stmmac_resume()
7302 priv->plat->bsp_priv); in stmmac_resume()
7309 if (device_may_wakeup(priv->device) && priv->plat->pmt) { in stmmac_resume()