Lines Matching refs:trans
12 iwl_pcie_ctxt_info_dbg_enable(struct iwl_trans *trans, in iwl_pcie_ctxt_info_dbg_enable() argument
20 if (!iwl_trans_dbg_ini_valid(trans)) { in iwl_pcie_ctxt_info_dbg_enable()
21 struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon; in iwl_pcie_ctxt_info_dbg_enable()
23 iwl_pcie_alloc_fw_monitor(trans, 0); in iwl_pcie_ctxt_info_dbg_enable()
28 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
38 fw_mon_cfg = &trans->dbg.fw_mon_cfg[alloc_id]; in iwl_pcie_ctxt_info_dbg_enable()
43 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
49 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
54 if (trans->dbg.fw_mon_ini[alloc_id].num_frags) { in iwl_pcie_ctxt_info_dbg_enable()
56 &trans->dbg.fw_mon_ini[alloc_id].frags[0]; in iwl_pcie_ctxt_info_dbg_enable()
60 dbg_cfg->debug_token_config = cpu_to_le32(trans->dbg.ucode_preset); in iwl_pcie_ctxt_info_dbg_enable()
61 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
64 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
67 trans->dbg.fw_mon_ini[alloc_id].num_frags); in iwl_pcie_ctxt_info_dbg_enable()
71 IWL_ERR(trans, "WRT: Invalid buffer destination\n"); in iwl_pcie_ctxt_info_dbg_enable()
78 int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, in iwl_pcie_ctxt_info_gen3_init() argument
81 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_init()
89 trans->cfg->min_txq_size); in iwl_pcie_ctxt_info_gen3_init()
112 prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch), in iwl_pcie_ctxt_info_gen3_init()
122 cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV)); in iwl_pcie_ctxt_info_gen3_init()
132 iwl_pcie_ctxt_info_dbg_enable(trans, &prph_sc_ctrl->hwm_cfg, in iwl_pcie_ctxt_info_gen3_init()
137 ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); in iwl_pcie_ctxt_info_gen3_init()
152 prph_info = dma_alloc_coherent(trans->dev, PAGE_SIZE, in iwl_pcie_ctxt_info_gen3_init()
161 ctxt_info_gen3 = dma_alloc_coherent(trans->dev, in iwl_pcie_ctxt_info_gen3_init()
183 cpu_to_le64(trans->txqs.txq[trans->txqs.cmd.q_id]->dma_addr); in iwl_pcie_ctxt_info_gen3_init()
189 cpu_to_le16(RX_QUEUE_CB_SIZE(trans->cfg->num_rbds)); in iwl_pcie_ctxt_info_gen3_init()
196 trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len, in iwl_pcie_ctxt_info_gen3_init()
204 memcpy(trans_pcie->iml, trans->iml, trans->iml_len); in iwl_pcie_ctxt_info_gen3_init()
206 iwl_enable_fw_load_int_ctx_info(trans); in iwl_pcie_ctxt_info_gen3_init()
209 iwl_write64(trans, CSR_CTXT_INFO_ADDR, in iwl_pcie_ctxt_info_gen3_init()
211 iwl_write64(trans, CSR_IML_DATA_ADDR, in iwl_pcie_ctxt_info_gen3_init()
213 iwl_write32(trans, CSR_IML_SIZE_ADDR, trans->iml_len); in iwl_pcie_ctxt_info_gen3_init()
215 iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL, in iwl_pcie_ctxt_info_gen3_init()
221 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3), in iwl_pcie_ctxt_info_gen3_init()
226 dma_free_coherent(trans->dev, PAGE_SIZE, prph_info, in iwl_pcie_ctxt_info_gen3_init()
230 dma_free_coherent(trans->dev, in iwl_pcie_ctxt_info_gen3_init()
238 void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans, bool alive) in iwl_pcie_ctxt_info_gen3_free() argument
240 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_gen3_free()
243 dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml, in iwl_pcie_ctxt_info_gen3_free()
249 iwl_pcie_ctxt_info_free_fw_img(trans); in iwl_pcie_ctxt_info_gen3_free()
258 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3), in iwl_pcie_ctxt_info_gen3_free()
264 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch), in iwl_pcie_ctxt_info_gen3_free()
271 dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info, in iwl_pcie_ctxt_info_gen3_free()
277 int iwl_trans_pcie_ctx_info_gen3_set_pnvm(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_gen3_set_pnvm() argument
280 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
285 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
289 if (!trans->pnvm_loaded) { in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
293 ret = iwl_pcie_ctxt_info_alloc_dma(trans, data, len, in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
296 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA %d.\n", in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
310 int iwl_trans_pcie_ctx_info_gen3_set_reduce_power(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_gen3_set_reduce_power() argument
313 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
318 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
322 if (!trans->reduce_power_loaded) { in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
326 ret = iwl_pcie_ctxt_info_alloc_dma(trans, data, len, in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
329 IWL_DEBUG_FW(trans, in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()