Lines Matching refs:trans
184 static inline __le16 iwl_get_closed_rb_stts(struct iwl_trans *trans, in iwl_get_closed_rb_stts() argument
187 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { in iwl_get_closed_rb_stts()
340 struct iwl_trans *trans; member
422 IWL_TRANS_GET_PCIE_TRANS(struct iwl_trans *trans) in IWL_TRANS_GET_PCIE_TRANS() argument
424 return (void *)trans->trans_specific; in IWL_TRANS_GET_PCIE_TRANS()
427 static inline void iwl_pcie_clear_irq(struct iwl_trans *trans, int queue) in iwl_pcie_clear_irq() argument
437 iwl_write32(trans, CSR_MSIX_AUTOMASK_ST_AD, BIT(queue)); in iwl_pcie_clear_irq()
455 void iwl_trans_pcie_free(struct iwl_trans *trans);
457 bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans);
458 #define _iwl_trans_pcie_grab_nic_access(trans) \ argument
460 likely(__iwl_trans_pcie_grab_nic_access(trans)))
465 int iwl_pcie_rx_init(struct iwl_trans *trans);
466 int iwl_pcie_gen2_rx_init(struct iwl_trans *trans);
471 int iwl_pcie_rx_stop(struct iwl_trans *trans);
472 void iwl_pcie_rx_free(struct iwl_trans *trans);
473 void iwl_pcie_free_rbs_pool(struct iwl_trans *trans);
475 void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority,
482 int iwl_pcie_alloc_ict(struct iwl_trans *trans);
483 void iwl_pcie_free_ict(struct iwl_trans *trans);
484 void iwl_pcie_reset_ict(struct iwl_trans *trans);
485 void iwl_pcie_disable_ict(struct iwl_trans *trans);
490 int iwl_pcie_tx_init(struct iwl_trans *trans);
491 void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr);
492 int iwl_pcie_tx_stop(struct iwl_trans *trans);
493 void iwl_pcie_tx_free(struct iwl_trans *trans);
494 bool iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int queue, u16 ssn,
497 void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int queue,
499 void iwl_trans_pcie_txq_set_shared_mode(struct iwl_trans *trans, u32 txq_id,
501 int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
503 void iwl_pcie_txq_check_wrptrs(struct iwl_trans *trans);
504 int iwl_trans_pcie_send_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
505 void iwl_pcie_hcmd_complete(struct iwl_trans *trans,
507 void iwl_trans_pcie_tx_reset(struct iwl_trans *trans);
512 void iwl_pcie_dump_csr(struct iwl_trans *trans);
517 static inline void _iwl_disable_interrupts(struct iwl_trans *trans) in _iwl_disable_interrupts() argument
519 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_disable_interrupts()
521 clear_bit(STATUS_INT_ENABLED, &trans->status); in _iwl_disable_interrupts()
524 iwl_write32(trans, CSR_INT_MASK, 0x00000000); in _iwl_disable_interrupts()
528 iwl_write32(trans, CSR_INT, 0xffffffff); in _iwl_disable_interrupts()
529 iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); in _iwl_disable_interrupts()
532 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_disable_interrupts()
534 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_disable_interrupts()
537 IWL_DEBUG_ISR(trans, "Disabled interrupts\n"); in _iwl_disable_interrupts()
555 static inline void iwl_pcie_ctxt_info_free_fw_img(struct iwl_trans *trans) in iwl_pcie_ctxt_info_free_fw_img() argument
557 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_fw_img()
566 dma_free_coherent(trans->dev, dram->fw[i].size, in iwl_pcie_ctxt_info_free_fw_img()
574 static inline void iwl_disable_interrupts(struct iwl_trans *trans) in iwl_disable_interrupts() argument
576 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_disable_interrupts()
579 _iwl_disable_interrupts(trans); in iwl_disable_interrupts()
583 static inline void _iwl_enable_interrupts(struct iwl_trans *trans) in _iwl_enable_interrupts() argument
585 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_enable_interrupts()
587 IWL_DEBUG_ISR(trans, "Enabling interrupts\n"); in _iwl_enable_interrupts()
588 set_bit(STATUS_INT_ENABLED, &trans->status); in _iwl_enable_interrupts()
591 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in _iwl_enable_interrupts()
599 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in _iwl_enable_interrupts()
601 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in _iwl_enable_interrupts()
606 static inline void iwl_enable_interrupts(struct iwl_trans *trans) in iwl_enable_interrupts() argument
608 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_interrupts()
611 _iwl_enable_interrupts(trans); in iwl_enable_interrupts()
614 static inline void iwl_enable_hw_int_msk_msix(struct iwl_trans *trans, u32 msk) in iwl_enable_hw_int_msk_msix() argument
616 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_hw_int_msk_msix()
618 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, ~msk); in iwl_enable_hw_int_msk_msix()
622 static inline void iwl_enable_fh_int_msk_msix(struct iwl_trans *trans, u32 msk) in iwl_enable_fh_int_msk_msix() argument
624 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_fh_int_msk_msix()
626 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~msk); in iwl_enable_fh_int_msk_msix()
630 static inline void iwl_enable_fw_load_int(struct iwl_trans *trans) in iwl_enable_fw_load_int() argument
632 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_fw_load_int()
634 IWL_DEBUG_ISR(trans, "Enabling FW load interrupt\n"); in iwl_enable_fw_load_int()
637 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int()
639 iwl_write32(trans, CSR_MSIX_HW_INT_MASK_AD, in iwl_enable_fw_load_int()
641 iwl_enable_fh_int_msk_msix(trans, in iwl_enable_fw_load_int()
646 static inline void iwl_enable_fw_load_int_ctx_info(struct iwl_trans *trans) in iwl_enable_fw_load_int_ctx_info() argument
648 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_fw_load_int_ctx_info()
650 IWL_DEBUG_ISR(trans, "Enabling ALIVE interrupt only\n"); in iwl_enable_fw_load_int_ctx_info()
661 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_fw_load_int_ctx_info()
663 iwl_enable_hw_int_msk_msix(trans, in iwl_enable_fw_load_int_ctx_info()
669 iwl_enable_fh_int_msk_msix(trans, trans_pcie->fh_init_mask); in iwl_enable_fw_load_int_ctx_info()
696 static inline void iwl_enable_rfkill_int(struct iwl_trans *trans) in iwl_enable_rfkill_int() argument
698 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_enable_rfkill_int()
700 IWL_DEBUG_ISR(trans, "Enabling rfkill interrupt\n"); in iwl_enable_rfkill_int()
703 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); in iwl_enable_rfkill_int()
705 iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, in iwl_enable_rfkill_int()
707 iwl_enable_hw_int_msk_msix(trans, in iwl_enable_rfkill_int()
711 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_9000) { in iwl_enable_rfkill_int()
717 iwl_set_bit(trans, CSR_GP_CNTRL, in iwl_enable_rfkill_int()
722 void iwl_pcie_handle_rfkill_irq(struct iwl_trans *trans);
724 static inline bool iwl_is_rfkill_set(struct iwl_trans *trans) in iwl_is_rfkill_set() argument
726 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_is_rfkill_set()
733 return !(iwl_read32(trans, CSR_GP_CNTRL) & in iwl_is_rfkill_set()
737 static inline void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, in __iwl_trans_pcie_set_bits_mask() argument
746 v = iwl_read32(trans, reg); in __iwl_trans_pcie_set_bits_mask()
749 iwl_write32(trans, reg, v); in __iwl_trans_pcie_set_bits_mask()
752 static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans, in __iwl_trans_pcie_clear_bit() argument
755 __iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0); in __iwl_trans_pcie_clear_bit()
758 static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans, in __iwl_trans_pcie_set_bit() argument
761 __iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask); in __iwl_trans_pcie_set_bit()
764 static inline bool iwl_pcie_dbg_on(struct iwl_trans *trans) in iwl_pcie_dbg_on() argument
766 return (trans->dbg.dest_tlv || iwl_trans_dbg_ini_valid(trans)); in iwl_pcie_dbg_on()
769 void iwl_trans_pcie_rf_kill(struct iwl_trans *trans, bool state);
770 void iwl_trans_pcie_dump_regs(struct iwl_trans *trans);
773 void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans);
775 static inline void iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans) { } in iwl_trans_pcie_dbgfs_register() argument
781 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans);
782 void iwl_pcie_apm_config(struct iwl_trans *trans);
783 int iwl_pcie_prepare_card_hw(struct iwl_trans *trans);
784 void iwl_pcie_synchronize_irqs(struct iwl_trans *trans);
785 bool iwl_pcie_check_hw_rf_kill(struct iwl_trans *trans);
786 void iwl_trans_pcie_handle_stop_rfkill(struct iwl_trans *trans,
788 void iwl_pcie_apm_stop_master(struct iwl_trans *trans);
790 int iwl_pcie_alloc_dma_ptr(struct iwl_trans *trans,
792 void iwl_pcie_free_dma_ptr(struct iwl_trans *trans, struct iwl_dma_ptr *ptr);
793 void iwl_pcie_apply_destination(struct iwl_trans *trans);
796 void iwl_pcie_alloc_fw_monitor(struct iwl_trans *trans, u8 max_power);
799 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
801 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans, u32 scd_addr);
802 int iwl_trans_pcie_gen2_send_hcmd(struct iwl_trans *trans,
804 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans);
805 void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans);
806 void iwl_pcie_d3_complete_suspend(struct iwl_trans *trans,
808 int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans,
810 int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans,