Lines Matching refs:val
26 #define RTW89_SET_H2CREG_HDR_FUNC(info, val) \ argument
27 u32p_replace_bits(info, val, GENMASK(6, 0))
28 #define RTW89_SET_H2CREG_HDR_LEN(info, val) \ argument
29 u32p_replace_bits(info, val, GENMASK(11, 8))
159 #define RTW89_SET_FWCMD_RA_IS_DIS(cmd, val) \ argument
160 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(0))
161 #define RTW89_SET_FWCMD_RA_MODE(cmd, val) \ argument
162 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(5, 1))
163 #define RTW89_SET_FWCMD_RA_BW_CAP(cmd, val) \ argument
164 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 6))
165 #define RTW89_SET_FWCMD_RA_MACID(cmd, val) \ argument
166 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8))
167 #define RTW89_SET_FWCMD_RA_DCM(cmd, val) \ argument
168 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(16))
169 #define RTW89_SET_FWCMD_RA_ER(cmd, val) \ argument
170 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(17))
171 #define RTW89_SET_FWCMD_RA_INIT_RATE_LV(cmd, val) \ argument
172 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(19, 18))
173 #define RTW89_SET_FWCMD_RA_UPD_ALL(cmd, val) \ argument
174 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(20))
175 #define RTW89_SET_FWCMD_RA_SGI(cmd, val) \ argument
176 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(21))
177 #define RTW89_SET_FWCMD_RA_LDPC(cmd, val) \ argument
178 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(22))
179 #define RTW89_SET_FWCMD_RA_STBC(cmd, val) \ argument
180 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(23))
181 #define RTW89_SET_FWCMD_RA_SS_NUM(cmd, val) \ argument
182 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(26, 24))
183 #define RTW89_SET_FWCMD_RA_GILTF(cmd, val) \ argument
184 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(29, 27))
185 #define RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(cmd, val) \ argument
186 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(30))
187 #define RTW89_SET_FWCMD_RA_UPD_MASK(cmd, val) \ argument
188 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(31))
189 #define RTW89_SET_FWCMD_RA_MASK_0(cmd, val) \ argument
190 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(7, 0))
191 #define RTW89_SET_FWCMD_RA_MASK_1(cmd, val) \ argument
192 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(15, 8))
193 #define RTW89_SET_FWCMD_RA_MASK_2(cmd, val) \ argument
194 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(23, 16))
195 #define RTW89_SET_FWCMD_RA_MASK_3(cmd, val) \ argument
196 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 24))
197 #define RTW89_SET_FWCMD_RA_MASK_4(cmd, val) \ argument
198 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(7, 0))
199 #define RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(cmd, val) \ argument
200 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, BIT(31))
201 #define RTW89_SET_FWCMD_RA_BAND_NUM(cmd, val) \ argument
202 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(7, 0))
203 #define RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(cmd, val) \ argument
204 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(8))
205 #define RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(cmd, val) \ argument
206 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(9))
207 #define RTW89_SET_FWCMD_RA_CR_TBL_SEL(cmd, val) \ argument
208 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, BIT(10))
209 #define RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(cmd, val) \ argument
210 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(23, 16))
211 #define RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(cmd, val) \ argument
212 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(25, 24))
213 #define RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(cmd, val) \ argument
214 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(28, 26))
215 #define RTW89_SET_FWCMD_RA_FIXED_CSI_BW(cmd, val) \ argument
216 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 29))
218 #define RTW89_SET_FWCMD_SEC_IDX(cmd, val) \ argument
219 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(7, 0))
220 #define RTW89_SET_FWCMD_SEC_OFFSET(cmd, val) \ argument
221 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(15, 8))
222 #define RTW89_SET_FWCMD_SEC_LEN(cmd, val) \ argument
223 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(23, 16))
224 #define RTW89_SET_FWCMD_SEC_TYPE(cmd, val) \ argument
225 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(3, 0))
226 #define RTW89_SET_FWCMD_SEC_EXT_KEY(cmd, val) \ argument
227 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(4))
228 #define RTW89_SET_FWCMD_SEC_SPP_MODE(cmd, val) \ argument
229 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, BIT(5))
230 #define RTW89_SET_FWCMD_SEC_KEY0(cmd, val) \ argument
231 le32p_replace_bits((__le32 *)(cmd) + 0x02, val, GENMASK(31, 0))
232 #define RTW89_SET_FWCMD_SEC_KEY1(cmd, val) \ argument
233 le32p_replace_bits((__le32 *)(cmd) + 0x03, val, GENMASK(31, 0))
234 #define RTW89_SET_FWCMD_SEC_KEY2(cmd, val) \ argument
235 le32p_replace_bits((__le32 *)(cmd) + 0x04, val, GENMASK(31, 0))
236 #define RTW89_SET_FWCMD_SEC_KEY3(cmd, val) \ argument
237 le32p_replace_bits((__le32 *)(cmd) + 0x05, val, GENMASK(31, 0))
239 #define RTW89_SET_EDCA_SEL(cmd, val) \ argument
240 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(1, 0))
241 #define RTW89_SET_EDCA_BAND(cmd, val) \ argument
242 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(3))
243 #define RTW89_SET_EDCA_WMM(cmd, val) \ argument
244 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(4))
245 #define RTW89_SET_EDCA_AC(cmd, val) \ argument
246 le32p_replace_bits((__le32 *)(cmd) + 0x00, val, GENMASK(6, 5))
247 #define RTW89_SET_EDCA_PARAM(cmd, val) \ argument
248 le32p_replace_bits((__le32 *)(cmd) + 0x01, val, GENMASK(31, 0))
285 static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val) in SET_FW_HDR_PART_SIZE() argument
287 le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0)); in SET_FW_HDR_PART_SIZE()
290 #define SET_CTRL_INFO_MACID(table, val) \ argument
291 le32p_replace_bits((__le32 *)(table) + 0, val, GENMASK(6, 0))
292 #define SET_CTRL_INFO_OPERATION(table, val) \ argument
293 le32p_replace_bits((__le32 *)(table) + 0, val, BIT(7))
295 #define SET_CMC_TBL_DATARATE(table, val) \ argument
297 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(8, 0)); \
302 #define SET_CMC_TBL_FORCE_TXOP(table, val) \ argument
304 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(9)); \
309 #define SET_CMC_TBL_DATA_BW(table, val) \ argument
311 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(11, 10)); \
316 #define SET_CMC_TBL_DATA_GI_LTF(table, val) \ argument
318 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(14, 12)); \
323 #define SET_CMC_TBL_DARF_TC_INDEX(table, val) \ argument
325 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(15)); \
330 #define SET_CMC_TBL_ARFR_CTRL(table, val) \ argument
332 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(19, 16)); \
337 #define SET_CMC_TBL_ACQ_RPT_EN(table, val) \ argument
339 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(20)); \
344 #define SET_CMC_TBL_MGQ_RPT_EN(table, val) \ argument
346 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(21)); \
351 #define SET_CMC_TBL_ULQ_RPT_EN(table, val) \ argument
353 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(22)); \
358 #define SET_CMC_TBL_TWTQ_RPT_EN(table, val) \ argument
360 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(23)); \
365 #define SET_CMC_TBL_DISRTSFB(table, val) \ argument
367 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(25)); \
372 #define SET_CMC_TBL_DISDATAFB(table, val) \ argument
374 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(26)); \
379 #define SET_CMC_TBL_TRYRATE(table, val) \ argument
381 le32p_replace_bits((__le32 *)(table) + 1, val, BIT(27)); \
386 #define SET_CMC_TBL_AMPDU_DENSITY(table, val) \ argument
388 le32p_replace_bits((__le32 *)(table) + 1, val, GENMASK(31, 28)); \
393 #define SET_CMC_TBL_DATA_RTY_LOWEST_RATE(table, val) \ argument
395 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(8, 0)); \
400 #define SET_CMC_TBL_AMPDU_TIME_SEL(table, val) \ argument
402 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(9)); \
407 #define SET_CMC_TBL_AMPDU_LEN_SEL(table, val) \ argument
409 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(10)); \
414 #define SET_CMC_TBL_RTS_TXCNT_LMT_SEL(table, val) \ argument
416 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(11)); \
421 #define SET_CMC_TBL_RTS_TXCNT_LMT(table, val) \ argument
423 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(15, 12)); \
428 #define SET_CMC_TBL_RTSRATE(table, val) \ argument
430 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(24, 16)); \
435 #define SET_CMC_TBL_VCS_STBC(table, val) \ argument
437 le32p_replace_bits((__le32 *)(table) + 2, val, BIT(27)); \
442 #define SET_CMC_TBL_RTS_RTY_LOWEST_RATE(table, val) \ argument
444 le32p_replace_bits((__le32 *)(table) + 2, val, GENMASK(31, 28)); \
449 #define SET_CMC_TBL_DATA_TX_CNT_LMT(table, val) \ argument
451 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(5, 0)); \
456 #define SET_CMC_TBL_DATA_TXCNT_LMT_SEL(table, val) \ argument
458 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(6)); \
463 #define SET_CMC_TBL_MAX_AGG_NUM_SEL(table, val) \ argument
465 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(7)); \
470 #define SET_CMC_TBL_RTS_EN(table, val) \ argument
472 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(8)); \
477 #define SET_CMC_TBL_CTS2SELF_EN(table, val) \ argument
479 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(9)); \
484 #define SET_CMC_TBL_CCA_RTS(table, val) \ argument
486 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(11, 10)); \
491 #define SET_CMC_TBL_HW_RTS_EN(table, val) \ argument
493 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(12)); \
498 #define SET_CMC_TBL_RTS_DROP_DATA_MODE(table, val) \ argument
500 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(14, 13)); \
505 #define SET_CMC_TBL_AMPDU_MAX_LEN(table, val) \ argument
507 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(26, 16)); \
512 #define SET_CMC_TBL_UL_MU_DIS(table, val) \ argument
514 le32p_replace_bits((__le32 *)(table) + 3, val, BIT(27)); \
519 #define SET_CMC_TBL_AMPDU_MAX_TIME(table, val) \ argument
521 le32p_replace_bits((__le32 *)(table) + 3, val, GENMASK(31, 28)); \
526 #define SET_CMC_TBL_MAX_AGG_NUM(table, val) \ argument
528 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(7, 0)); \
533 #define SET_CMC_TBL_BA_BMAP(table, val) \ argument
535 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(9, 8)); \
540 #define SET_CMC_TBL_VO_LFTIME_SEL(table, val) \ argument
542 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(18, 16)); \
547 #define SET_CMC_TBL_VI_LFTIME_SEL(table, val) \ argument
549 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(21, 19)); \
554 #define SET_CMC_TBL_BE_LFTIME_SEL(table, val) \ argument
556 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(24, 22)); \
561 #define SET_CMC_TBL_BK_LFTIME_SEL(table, val) \ argument
563 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(27, 25)); \
568 #define SET_CMC_TBL_SECTYPE(table, val) \ argument
570 le32p_replace_bits((__le32 *)(table) + 4, val, GENMASK(31, 28)); \
575 #define SET_CMC_TBL_MULTI_PORT_ID(table, val) \ argument
577 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(2, 0)); \
582 #define SET_CMC_TBL_BMC(table, val) \ argument
584 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(3)); \
589 #define SET_CMC_TBL_MBSSID(table, val) \ argument
591 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(7, 4)); \
596 #define SET_CMC_TBL_NAVUSEHDR(table, val) \ argument
598 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(8)); \
603 #define SET_CMC_TBL_TXPWR_MODE(table, val) \ argument
605 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(11, 9)); \
610 #define SET_CMC_TBL_DATA_DCM(table, val) \ argument
612 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(12)); \
617 #define SET_CMC_TBL_DATA_ER(table, val) \ argument
619 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(13)); \
624 #define SET_CMC_TBL_DATA_LDPC(table, val) \ argument
626 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(14)); \
631 #define SET_CMC_TBL_DATA_STBC(table, val) \ argument
633 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(15)); \
638 #define SET_CMC_TBL_A_CTRL_BQR(table, val) \ argument
640 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(16)); \
645 #define SET_CMC_TBL_A_CTRL_UPH(table, val) \ argument
647 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(17)); \
652 #define SET_CMC_TBL_A_CTRL_BSR(table, val) \ argument
654 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(18)); \
659 #define SET_CMC_TBL_A_CTRL_CAS(table, val) \ argument
661 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(19)); \
666 #define SET_CMC_TBL_DATA_BW_ER(table, val) \ argument
668 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(20)); \
673 #define SET_CMC_TBL_LSIG_TXOP_EN(table, val) \ argument
675 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(21)); \
680 #define SET_CMC_TBL_CTRL_CNT_VLD(table, val) \ argument
682 le32p_replace_bits((__le32 *)(table) + 5, val, BIT(27)); \
687 #define SET_CMC_TBL_CTRL_CNT(table, val) \ argument
689 le32p_replace_bits((__le32 *)(table) + 5, val, GENMASK(31, 28)); \
694 #define SET_CMC_TBL_RESP_REF_RATE(table, val) \ argument
696 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(8, 0)); \
701 #define SET_CMC_TBL_ALL_ACK_SUPPORT(table, val) \ argument
703 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(12)); \
708 #define SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(table, val) \ argument
710 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(13)); \
715 #define SET_CMC_TBL_NTX_PATH_EN(table, val) \ argument
717 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(19, 16)); \
722 #define SET_CMC_TBL_PATH_MAP_A(table, val) \ argument
724 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(21, 20)); \
729 #define SET_CMC_TBL_PATH_MAP_B(table, val) \ argument
731 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(23, 22)); \
736 #define SET_CMC_TBL_PATH_MAP_C(table, val) \ argument
738 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(25, 24)); \
743 #define SET_CMC_TBL_PATH_MAP_D(table, val) \ argument
745 le32p_replace_bits((__le32 *)(table) + 6, val, GENMASK(27, 26)); \
750 #define SET_CMC_TBL_ANTSEL_A(table, val) \ argument
752 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(28)); \
757 #define SET_CMC_TBL_ANTSEL_B(table, val) \ argument
759 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(29)); \
764 #define SET_CMC_TBL_ANTSEL_C(table, val) \ argument
766 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(30)); \
771 #define SET_CMC_TBL_ANTSEL_D(table, val) \ argument
773 le32p_replace_bits((__le32 *)(table) + 6, val, BIT(31)); \
778 #define SET_CMC_TBL_ADDR_CAM_INDEX(table, val) \ argument
780 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(7, 0)); \
785 #define SET_CMC_TBL_PAID(table, val) \ argument
787 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(16, 8)); \
792 #define SET_CMC_TBL_ULDL(table, val) \ argument
794 le32p_replace_bits((__le32 *)(table) + 7, val, BIT(17)); \
799 #define SET_CMC_TBL_DOPPLER_CTRL(table, val) \ argument
801 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(19, 18)); \
806 #define SET_CMC_TBL_NOMINAL_PKT_PADDING(table, val) \ argument
808 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(21, 20)); \
812 #define SET_CMC_TBL_NOMINAL_PKT_PADDING40(table, val) \ argument
814 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(23, 22)); \
819 #define SET_CMC_TBL_TXPWR_TOLERENCE(table, val) \ argument
821 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(27, 24)); \
825 #define SET_CMC_TBL_NOMINAL_PKT_PADDING80(table, val) \ argument
827 le32p_replace_bits((__le32 *)(table) + 7, val, GENMASK(31, 30)); \
832 #define SET_CMC_TBL_NC(table, val) \ argument
834 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(2, 0)); \
839 #define SET_CMC_TBL_NR(table, val) \ argument
841 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(5, 3)); \
846 #define SET_CMC_TBL_NG(table, val) \ argument
848 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(7, 6)); \
853 #define SET_CMC_TBL_CB(table, val) \ argument
855 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(9, 8)); \
860 #define SET_CMC_TBL_CS(table, val) \ argument
862 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(11, 10)); \
867 #define SET_CMC_TBL_CSI_TXBF_EN(table, val) \ argument
869 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(12)); \
874 #define SET_CMC_TBL_CSI_STBC_EN(table, val) \ argument
876 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(13)); \
881 #define SET_CMC_TBL_CSI_LDPC_EN(table, val) \ argument
883 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(14)); \
888 #define SET_CMC_TBL_CSI_PARA_EN(table, val) \ argument
890 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(15)); \
895 #define SET_CMC_TBL_CSI_FIX_RATE(table, val) \ argument
897 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(24, 16)); \
902 #define SET_CMC_TBL_CSI_GI_LTF(table, val) \ argument
904 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(27, 25)); \
909 #define SET_CMC_TBL_CSI_GID_SEL(table, val) \ argument
911 le32p_replace_bits((__le32 *)(table) + 8, val, BIT(29)); \
916 #define SET_CMC_TBL_CSI_BW(table, val) \ argument
918 le32p_replace_bits((__le32 *)(table) + 8, val, GENMASK(31, 30)); \
923 #define SET_FWROLE_MAINTAIN_MACID(h2c, val) \ argument
924 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0))
925 #define SET_FWROLE_MAINTAIN_SELF_ROLE(h2c, val) \ argument
926 le32p_replace_bits((__le32 *)h2c, val, GENMASK(9, 8))
927 #define SET_FWROLE_MAINTAIN_UPD_MODE(h2c, val) \ argument
928 le32p_replace_bits((__le32 *)h2c, val, GENMASK(12, 10))
929 #define SET_FWROLE_MAINTAIN_WIFI_ROLE(h2c, val) \ argument
930 le32p_replace_bits((__le32 *)h2c, val, GENMASK(16, 13))
932 #define SET_JOININFO_MACID(h2c, val) \ argument
933 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0))
934 #define SET_JOININFO_OP(h2c, val) \ argument
935 le32p_replace_bits((__le32 *)h2c, val, BIT(8))
936 #define SET_JOININFO_BAND(h2c, val) \ argument
937 le32p_replace_bits((__le32 *)h2c, val, BIT(9))
938 #define SET_JOININFO_WMM(h2c, val) \ argument
939 le32p_replace_bits((__le32 *)h2c, val, GENMASK(11, 10))
940 #define SET_JOININFO_TGR(h2c, val) \ argument
941 le32p_replace_bits((__le32 *)h2c, val, BIT(12))
942 #define SET_JOININFO_ISHESTA(h2c, val) \ argument
943 le32p_replace_bits((__le32 *)h2c, val, BIT(13))
944 #define SET_JOININFO_DLBW(h2c, val) \ argument
945 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 14))
946 #define SET_JOININFO_TF_MAC_PAD(h2c, val) \ argument
947 le32p_replace_bits((__le32 *)h2c, val, GENMASK(17, 16))
948 #define SET_JOININFO_DL_T_PE(h2c, val) \ argument
949 le32p_replace_bits((__le32 *)h2c, val, GENMASK(20, 18))
950 #define SET_JOININFO_PORT_ID(h2c, val) \ argument
951 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 21))
952 #define SET_JOININFO_NET_TYPE(h2c, val) \ argument
953 le32p_replace_bits((__le32 *)h2c, val, GENMASK(25, 24))
954 #define SET_JOININFO_WIFI_ROLE(h2c, val) \ argument
955 le32p_replace_bits((__le32 *)h2c, val, GENMASK(29, 26))
956 #define SET_JOININFO_SELF_ROLE(h2c, val) \ argument
957 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 30))
959 #define SET_GENERAL_PKT_MACID(h2c, val) \ argument
960 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0))
961 #define SET_GENERAL_PKT_PROBRSP_ID(h2c, val) \ argument
962 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8))
963 #define SET_GENERAL_PKT_PSPOLL_ID(h2c, val) \ argument
964 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16))
965 #define SET_GENERAL_PKT_NULL_ID(h2c, val) \ argument
966 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24))
967 #define SET_GENERAL_PKT_QOS_NULL_ID(h2c, val) \ argument
968 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0))
969 #define SET_GENERAL_PKT_CTS2SELF_ID(h2c, val) \ argument
970 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8))
972 #define SET_LOG_CFG_LEVEL(h2c, val) \ argument
973 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0))
974 #define SET_LOG_CFG_PATH(h2c, val) \ argument
975 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8))
976 #define SET_LOG_CFG_COMP(h2c, val) \ argument
977 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0))
978 #define SET_LOG_CFG_COMP_EXT(h2c, val) \ argument
979 le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 0))
981 #define SET_BA_CAM_VALID(h2c, val) \ argument
982 le32p_replace_bits((__le32 *)h2c, val, BIT(0))
983 #define SET_BA_CAM_INIT_REQ(h2c, val) \ argument
984 le32p_replace_bits((__le32 *)h2c, val, BIT(1))
985 #define SET_BA_CAM_ENTRY_IDX(h2c, val) \ argument
986 le32p_replace_bits((__le32 *)h2c, val, GENMASK(3, 2))
987 #define SET_BA_CAM_TID(h2c, val) \ argument
988 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 4))
989 #define SET_BA_CAM_MACID(h2c, val) \ argument
990 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8))
991 #define SET_BA_CAM_BMAP_SIZE(h2c, val) \ argument
992 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16))
993 #define SET_BA_CAM_SSN(h2c, val) \ argument
994 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20))
996 #define SET_LPS_PARM_MACID(h2c, val) \ argument
997 le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0))
998 #define SET_LPS_PARM_PSMODE(h2c, val) \ argument
999 le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8))
1000 #define SET_LPS_PARM_RLBM(h2c, val) \ argument
1001 le32p_replace_bits((__le32 *)h2c, val, GENMASK(19, 16))
1002 #define SET_LPS_PARM_SMARTPS(h2c, val) \ argument
1003 le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 20))
1004 #define SET_LPS_PARM_AWAKEINTERVAL(h2c, val) \ argument
1005 le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24))
1006 #define SET_LPS_PARM_VOUAPSD(h2c, val) \ argument
1007 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(0))
1008 #define SET_LPS_PARM_VIUAPSD(h2c, val) \ argument
1009 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(1))
1010 #define SET_LPS_PARM_BEUAPSD(h2c, val) \ argument
1011 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(2))
1012 #define SET_LPS_PARM_BKUAPSD(h2c, val) \ argument
1013 le32p_replace_bits((__le32 *)(h2c) + 1, val, BIT(3))
1014 #define SET_LPS_PARM_LASTRPWM(h2c, val) \ argument
1015 le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(15, 8))
1057 #define RTW89_SET_FWCMD_CXHDR_TYPE(cmd, val) \ argument
1058 u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0))
1059 #define RTW89_SET_FWCMD_CXHDR_LEN(cmd, val) \ argument
1060 u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0))
1062 #define RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, val) \ argument
1063 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0))
1064 #define RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, val) \ argument
1065 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0))
1066 #define RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, val) \ argument
1067 u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0))
1068 #define RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, val) \ argument
1069 u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(0))
1070 #define RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, val) \ argument
1071 u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(1))
1072 #define RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, val) \ argument
1073 u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0))
1074 #define RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, val) \ argument
1075 u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0))
1076 #define RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, val) \ argument
1077 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(0))
1078 #define RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, val) \ argument
1079 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(1))
1080 #define RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, val) \ argument
1081 u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(2))
1082 #define RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, val) \ argument
1083 u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0))
1084 #define RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, val) \ argument
1085 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(0))
1086 #define RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, val) \ argument
1087 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(1))
1088 #define RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, val) \ argument
1089 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(2))
1090 #define RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, val) \ argument
1091 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(3))
1092 #define RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, val) \ argument
1093 u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(4))
1095 #define RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, val) \ argument
1096 u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0))
1097 #define RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, val) \ argument
1098 u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0))
1099 #define RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, val) \ argument
1100 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(0))
1101 #define RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, val) \ argument
1102 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(1))
1103 #define RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, val) \ argument
1104 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(2))
1105 #define RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, val) \ argument
1106 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(3))
1107 #define RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, val) \ argument
1108 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(4))
1109 #define RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, val) \ argument
1110 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(5))
1111 #define RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, val) \ argument
1112 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(6))
1113 #define RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, val) \ argument
1114 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(7))
1115 #define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, val) \ argument
1116 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(8))
1117 #define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, val) \ argument
1118 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(9))
1119 #define RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, val) \ argument
1120 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(10))
1121 #define RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, val) \ argument
1122 le16p_replace_bits((__le16 *)((u8 *)(cmd) + 4), val, BIT(11))
1123 #define RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, val, n) \ argument
1124 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(0))
1125 #define RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, val, n) \ argument
1126 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(3, 1))
1127 #define RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, val, n) \ argument
1128 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(4))
1129 #define RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, val, n) \ argument
1130 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, BIT(5))
1131 #define RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, val, n) \ argument
1132 u8p_replace_bits((u8 *)(cmd) + (6 + 12 * (n)), val, GENMASK(7, 6))
1133 #define RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, val, n) \ argument
1134 u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, BIT(0))
1135 #define RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, val, n) \ argument
1136 u8p_replace_bits((u8 *)(cmd) + (7 + 12 * (n)), val, GENMASK(7, 1))
1137 #define RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, val, n) \ argument
1138 u8p_replace_bits((u8 *)(cmd) + (8 + 12 * (n)), val, GENMASK(7, 0))
1139 #define RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, val, n) \ argument
1140 u8p_replace_bits((u8 *)(cmd) + (9 + 12 * (n)), val, GENMASK(7, 0))
1141 #define RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, val, n) \ argument
1142 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (10 + 12 * (n))), val, GENMASK(15, 0))
1143 #define RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, val, n) \ argument
1144 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (12 + 12 * (n))), val, GENMASK(15, 0))
1145 #define RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, val, n) \ argument
1146 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (14 + 12 * (n))), val, GENMASK(15, 0))
1147 #define RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, val, n) \ argument
1148 le16p_replace_bits((__le16 *)((u8 *)(cmd) + (16 + 12 * (n))), val, GENMASK(15, 0))
1150 #define RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, val) \ argument
1151 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(0))
1152 #define RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, val) \ argument
1153 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(1))
1154 #define RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, val) \ argument
1155 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, BIT(2))
1156 #define RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, val) \ argument
1157 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3))
1159 #define RTW89_SET_FWCMD_CXRFK_STATE(cmd, val) \ argument
1160 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0))
1161 #define RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, val) \ argument
1162 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(5, 2))
1163 #define RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, val) \ argument
1164 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(7, 6))
1165 #define RTW89_SET_FWCMD_CXRFK_BAND(cmd, val) \ argument
1166 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(9, 8))
1167 #define RTW89_SET_FWCMD_CXRFK_TYPE(cmd, val) \ argument
1168 le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10))
1351 u8 ac, u32 val);