Lines Matching refs:base_addr
178 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_read() local
181 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_read()
186 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_read()
190 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3)); in dino_cfg_read()
192 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2)); in dino_cfg_read()
194 *val = readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_read()
213 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_write() local
216 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, in dino_cfg_write()
221 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
222 __raw_readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
225 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
228 writeb(val, base_addr + DINO_CONFIG_DATA + (where & 3)); in dino_cfg_write()
230 writew(val, base_addr + DINO_CONFIG_DATA + (where & 2)); in dino_cfg_write()
232 writel(val, base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
261 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
263 v = read##type(d->base_addr+DINO_IO_DATA+(addr&mask)); \
278 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
280 write##type(val, d->base_addr+DINO_IO_DATA+(addr&mask)); \
306 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_mask_irq()
323 __raw_readl(dino_dev->hba.base_addr+DINO_IPR); in dino_unmask_irq()
327 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_unmask_irq()
338 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR); in dino_unmask_irq()
369 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK; in dino_isr()
391 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr; in dino_isr()
396 dino_dev->hba.base_addr, mask); in dino_isr()
480 dino_card_setup(struct pci_bus *bus, void __iomem *base_addr) in dino_card_setup() argument
522 i, res->start, base_addr + DINO_IO_ADDR_EN); in dino_card_setup()
523 __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN); in dino_card_setup()
581 dino_card_setup(bus, dino_dev->hba.base_addr); in dino_fixup_bus()
682 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS); in dino_card_init()
685 dino_dev->hba.base_addr+DINO_IO_COMMAND); in dino_card_init()
689 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK); in dino_card_init()
690 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN); in dino_card_init()
691 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR); in dino_card_init()
701 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT); in dino_card_init()
708 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN); in dino_card_init()
710 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE); in dino_card_init()
711 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR); in dino_card_init()
712 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR); in dino_card_init()
714 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM); in dino_card_init()
715 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL); in dino_card_init()
716 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM); in dino_card_init()
719 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR); in dino_card_init()
720 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR); in dino_card_init()
721 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR); in dino_card_init()
728 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD); in dino_card_init()
749 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN); in dino_bridge_init()
856 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0); in dino_common_init()
862 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0); in dino_common_init()
878 dino_dev->hba.base_addr); in dino_common_init()
977 dino_dev->hba.base_addr = ioremap(hpa, 4096); in dino_probe()