Lines Matching refs:regval

120 	u32 regval;  in tsi57x_set_domain()  local
128 				 TSI578_SP_MODE_GLBL, &regval);  in tsi57x_set_domain()
130 				  regval & ~TSI578_SP_MODE_LUT_512);  in tsi57x_set_domain()
142 	u32 regval;  in tsi57x_get_domain()  local
148 				TSI578_GLBL_ROUTE_BASE, &regval);  in tsi57x_get_domain()
150 	*sw_domain = (u8)(regval >> 24);  in tsi57x_get_domain()
158 	u32 regval;  in tsi57x_em_init()  local
167 				TSI578_SP_MODE(portnum), &regval);  in tsi57x_em_init()
170 				regval & ~TSI578_SP_MODE_PW_DIS);  in tsi57x_em_init()
175 				&regval);  in tsi57x_em_init()
178 				regval & 0x07120214);  in tsi57x_em_init()
181 				TSI578_SP_INT_STATUS(portnum), &regval);  in tsi57x_em_init()
184 				regval & 0x000700bd);  in tsi57x_em_init()
188 				TSI578_SP_CTL_INDEP(portnum), &regval);  in tsi57x_em_init()
191 				regval | 0x000b0000);  in tsi57x_em_init()
196 				&regval);  in tsi57x_em_init()
197 		if ((regval & RIO_PORT_N_CTL_PWIDTH) == RIO_PORT_N_CTL_PWIDTH_4)  in tsi57x_em_init()
215 	u32 regval;  in tsi57x_em_handler()  local
227 			&regval);  in tsi57x_em_handler()
228 		if (!(regval & RIO_PORT_N_CTL_LOCKOUT)) {  in tsi57x_em_handler()
231 				regval | RIO_PORT_N_CTL_LOCKOUT);  in tsi57x_em_handler()
235 				regval);  in tsi57x_em_handler()
243 			&regval);  in tsi57x_em_handler()
258 					&regval);  in tsi57x_em_handler()
259 				if (regval & RIO_PORT_N_MNT_RSP_RVAL)  in tsi57x_em_handler()
275 				TSI578_SP_LUT_PEINF(portnum), &regval);  in tsi57x_em_handler()
276 		regval = (mport->sys_size) ? (regval >> 16) : (regval >> 24);  in tsi57x_em_handler()
277 		route_port = rdev->rswitch->route_table[regval];  in tsi57x_em_handler()
279 			rio_name(rdev), portnum, regval);  in tsi57x_em_handler()
281 				RIO_GLOBAL_TABLE, regval, route_port);  in tsi57x_em_handler()