Lines Matching refs:ctrl
157 int (*reg_read)(struct qcom_swrm_ctrl *ctrl, int reg, u32 *val);
158 int (*reg_write)(struct qcom_swrm_ctrl *ctrl, int reg, int val);
181 static int qcom_swrm_ahb_reg_read(struct qcom_swrm_ctrl *ctrl, int reg, in qcom_swrm_ahb_reg_read() argument
184 struct regmap *wcd_regmap = ctrl->regmap; in qcom_swrm_ahb_reg_read()
201 static int qcom_swrm_ahb_reg_write(struct qcom_swrm_ctrl *ctrl, in qcom_swrm_ahb_reg_write() argument
204 struct regmap *wcd_regmap = ctrl->regmap; in qcom_swrm_ahb_reg_write()
221 static int qcom_swrm_cpu_reg_read(struct qcom_swrm_ctrl *ctrl, int reg, in qcom_swrm_cpu_reg_read() argument
224 *val = readl(ctrl->mmio + reg); in qcom_swrm_cpu_reg_read()
228 static int qcom_swrm_cpu_reg_write(struct qcom_swrm_ctrl *ctrl, int reg, in qcom_swrm_cpu_reg_write() argument
231 writel(val, ctrl->mmio + reg); in qcom_swrm_cpu_reg_write()
392 static int qcom_swrm_get_alert_slave_dev_num(struct qcom_swrm_ctrl *ctrl) in qcom_swrm_get_alert_slave_dev_num() argument
397 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_alert_slave_dev_num()
403 ctrl->status[dev_num] = status; in qcom_swrm_get_alert_slave_dev_num()
411 static void qcom_swrm_get_device_status(struct qcom_swrm_ctrl *ctrl) in qcom_swrm_get_device_status() argument
416 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &val); in qcom_swrm_get_device_status()
417 ctrl->slave_status = val; in qcom_swrm_get_device_status()
424 ctrl->status[i] = s; in qcom_swrm_get_device_status()
431 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_set_slave_dev_num() local
434 ctrl->reg_read(ctrl, SWRM_MCP_SLV_STATUS, &status); in qcom_swrm_set_slave_dev_num()
449 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_enumerate() local
460 ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_1(i), &val1); in qcom_swrm_enumerate()
463 ctrl->reg_read(ctrl, SWRM_ENUMERATOR_SLAVE_DEV_ID_2(i), &val2); in qcom_swrm_enumerate()
489 complete(&ctrl->enumeration); in qcom_swrm_enumerate()
610 static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) in qcom_swrm_init() argument
615 val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); in qcom_swrm_init()
616 val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); in qcom_swrm_init()
618 ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); in qcom_swrm_init()
621 ctrl->reg_write(ctrl, SWRM_ENUMERATOR_CFG_ADDR, 1); in qcom_swrm_init()
623 ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK; in qcom_swrm_init()
625 ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, in qcom_swrm_init()
629 ctrl->reg_read(ctrl, SWRM_MCP_CFG_ADDR, &val); in qcom_swrm_init()
631 ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val); in qcom_swrm_init()
633 ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START); in qcom_swrm_init()
635 if (ctrl->version > 0x01050001) { in qcom_swrm_init()
637 ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR, in qcom_swrm_init()
641 ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR, in qcom_swrm_init()
646 ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR, in qcom_swrm_init()
651 if (ctrl->mmio) { in qcom_swrm_init()
652 ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, in qcom_swrm_init()
655 ctrl->slave_status = 0; in qcom_swrm_init()
656 ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val); in qcom_swrm_init()
657 ctrl->rd_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_RD_FIFO_DEPTH, val); in qcom_swrm_init()
658 ctrl->wr_fifo_depth = FIELD_GET(SWRM_COMP_PARAMS_WR_FIFO_DEPTH, val); in qcom_swrm_init()
666 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_xfer_msg() local
676 ret = qcom_swrm_cmd_fifo_rd_cmd(ctrl, msg->dev_num, in qcom_swrm_xfer_msg()
686 ret = qcom_swrm_cmd_fifo_wr_cmd(ctrl, msg->buf[i], in qcom_swrm_xfer_msg()
700 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_pre_bank_switch() local
703 ctrl->reg_read(ctrl, reg, &val); in qcom_swrm_pre_bank_switch()
705 u32p_replace_bits(&val, ctrl->cols_index, SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK); in qcom_swrm_pre_bank_switch()
706 u32p_replace_bits(&val, ctrl->rows_index, SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK); in qcom_swrm_pre_bank_switch()
708 return ctrl->reg_write(ctrl, reg, val); in qcom_swrm_pre_bank_switch()
715 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_port_params() local
717 return ctrl->reg_write(ctrl, SWRM_DP_BLOCK_CTRL_1(p_params->num), in qcom_swrm_port_params()
726 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_transport_params() local
732 pcfg = &ctrl->pconfig[params->port_num]; in qcom_swrm_transport_params()
738 ret = ctrl->reg_write(ctrl, reg, value); in qcom_swrm_transport_params()
745 ret = ctrl->reg_write(ctrl, reg, value); in qcom_swrm_transport_params()
753 ret = ctrl->reg_write(ctrl, reg, value); in qcom_swrm_transport_params()
762 ret = ctrl->reg_write(ctrl, reg, value); in qcom_swrm_transport_params()
766 ret = ctrl->reg_write(ctrl, reg, value); in qcom_swrm_transport_params()
774 ret = ctrl->reg_write(ctrl, reg, pcfg->bp_mode); in qcom_swrm_transport_params()
786 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_port_enable() local
789 ctrl->reg_read(ctrl, reg, &val); in qcom_swrm_port_enable()
796 return ctrl->reg_write(ctrl, reg, val); in qcom_swrm_port_enable()
812 struct qcom_swrm_ctrl *ctrl = to_qcom_sdw(bus); in qcom_swrm_compute_params() local
823 pcfg = &ctrl->pconfig[p_rt->num]; in qcom_swrm_compute_params()
840 pcfg = &ctrl->pconfig[m_port]; in qcom_swrm_compute_params()
842 pcfg = &ctrl->pconfig[i]; in qcom_swrm_compute_params()
873 static void qcom_swrm_stream_free_ports(struct qcom_swrm_ctrl *ctrl, in qcom_swrm_stream_free_ports() argument
880 mutex_lock(&ctrl->port_lock); in qcom_swrm_stream_free_ports()
884 port_mask = &ctrl->dout_port_mask; in qcom_swrm_stream_free_ports()
886 port_mask = &ctrl->din_port_mask; in qcom_swrm_stream_free_ports()
892 mutex_unlock(&ctrl->port_lock); in qcom_swrm_stream_free_ports()
895 static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl, in qcom_swrm_stream_alloc_ports() argument
910 mutex_lock(&ctrl->port_lock); in qcom_swrm_stream_alloc_ports()
913 maxport = ctrl->num_dout_ports; in qcom_swrm_stream_alloc_ports()
914 port_mask = &ctrl->dout_port_mask; in qcom_swrm_stream_alloc_ports()
916 maxport = ctrl->num_din_ports; in qcom_swrm_stream_alloc_ports()
917 port_mask = &ctrl->din_port_mask; in qcom_swrm_stream_alloc_ports()
931 dev_err(ctrl->dev, "All ports busy\n"); in qcom_swrm_stream_alloc_ports()
953 sdw_stream_add_master(&ctrl->bus, &sconfig, pconfig, in qcom_swrm_stream_alloc_ports()
961 mutex_unlock(&ctrl->port_lock); in qcom_swrm_stream_alloc_ports()
970 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_hw_params() local
971 struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id]; in qcom_swrm_hw_params()
974 ret = qcom_swrm_stream_alloc_ports(ctrl, sruntime, params, in qcom_swrm_hw_params()
977 qcom_swrm_stream_free_ports(ctrl, sruntime); in qcom_swrm_hw_params()
985 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_hw_free() local
986 struct sdw_stream_runtime *sruntime = ctrl->sruntime[dai->id]; in qcom_swrm_hw_free()
988 qcom_swrm_stream_free_ports(ctrl, sruntime); in qcom_swrm_hw_free()
989 sdw_stream_remove_master(&ctrl->bus, sruntime); in qcom_swrm_hw_free()
997 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_set_sdw_stream() local
999 ctrl->sruntime[dai->id] = stream; in qcom_swrm_set_sdw_stream()
1006 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_get_sdw_stream() local
1008 return ctrl->sruntime[dai->id]; in qcom_swrm_get_sdw_stream()
1014 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_startup() local
1024 ctrl->sruntime[dai->id] = sruntime; in qcom_swrm_startup()
1043 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dai->dev); in qcom_swrm_shutdown() local
1045 sdw_release_stream(ctrl->sruntime[dai->id]); in qcom_swrm_shutdown()
1046 ctrl->sruntime[dai->id] = NULL; in qcom_swrm_shutdown()
1062 static int qcom_swrm_register_dais(struct qcom_swrm_ctrl *ctrl) in qcom_swrm_register_dais() argument
1064 int num_dais = ctrl->num_dout_ports + ctrl->num_din_ports; in qcom_swrm_register_dais()
1067 struct device *dev = ctrl->dev; in qcom_swrm_register_dais()
1080 if (i < ctrl->num_dout_ports) in qcom_swrm_register_dais()
1094 return devm_snd_soc_register_component(ctrl->dev, in qcom_swrm_register_dais()
1099 static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl) in qcom_swrm_get_port_config() argument
1101 struct device_node *np = ctrl->dev->of_node; in qcom_swrm_get_port_config()
1113 ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val); in qcom_swrm_get_port_config()
1115 ctrl->num_dout_ports = FIELD_GET(SWRM_COMP_PARAMS_DOUT_PORTS_MASK, val); in qcom_swrm_get_port_config()
1116 ctrl->num_din_ports = FIELD_GET(SWRM_COMP_PARAMS_DIN_PORTS_MASK, val); in qcom_swrm_get_port_config()
1122 if (val > ctrl->num_din_ports) in qcom_swrm_get_port_config()
1125 ctrl->num_din_ports = val; in qcom_swrm_get_port_config()
1131 if (val > ctrl->num_dout_ports) in qcom_swrm_get_port_config()
1134 ctrl->num_dout_ports = val; in qcom_swrm_get_port_config()
1136 nports = ctrl->num_dout_ports + ctrl->num_din_ports; in qcom_swrm_get_port_config()
1138 set_bit(0, &ctrl->dout_port_mask); in qcom_swrm_get_port_config()
1139 set_bit(0, &ctrl->din_port_mask); in qcom_swrm_get_port_config()
1161 ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &version); in qcom_swrm_get_port_config()
1186 ctrl->pconfig[i + 1].si = si[i]; in qcom_swrm_get_port_config()
1187 ctrl->pconfig[i + 1].off1 = off1[i]; in qcom_swrm_get_port_config()
1188 ctrl->pconfig[i + 1].off2 = off2[i]; in qcom_swrm_get_port_config()
1189 ctrl->pconfig[i + 1].bp_mode = bp_mode[i]; in qcom_swrm_get_port_config()
1190 ctrl->pconfig[i + 1].hstart = hstart[i]; in qcom_swrm_get_port_config()
1191 ctrl->pconfig[i + 1].hstop = hstop[i]; in qcom_swrm_get_port_config()
1192 ctrl->pconfig[i + 1].word_length = word_length[i]; in qcom_swrm_get_port_config()
1193 ctrl->pconfig[i + 1].blk_group_count = blk_group_count[i]; in qcom_swrm_get_port_config()
1194 ctrl->pconfig[i + 1].lane_control = lane_control[i]; in qcom_swrm_get_port_config()
1221 struct qcom_swrm_ctrl *ctrl; local
1226 ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
1227 if (!ctrl)
1231 ctrl->rows_index = sdw_find_row_index(data->default_rows);
1232 ctrl->cols_index = sdw_find_col_index(data->default_cols);
1238 ctrl->reg_read = qcom_swrm_ahb_reg_read;
1239 ctrl->reg_write = qcom_swrm_ahb_reg_write;
1240 ctrl->regmap = dev_get_regmap(dev->parent, NULL);
1241 if (!ctrl->regmap)
1244 ctrl->reg_read = qcom_swrm_cpu_reg_read;
1245 ctrl->reg_write = qcom_swrm_cpu_reg_write;
1246 ctrl->mmio = devm_platform_ioremap_resource(pdev, 0);
1247 if (IS_ERR(ctrl->mmio))
1248 return PTR_ERR(ctrl->mmio);
1251 ctrl->irq = of_irq_get(dev->of_node, 0);
1252 if (ctrl->irq < 0) {
1253 ret = ctrl->irq;
1257 ctrl->hclk = devm_clk_get(dev, "iface");
1258 if (IS_ERR(ctrl->hclk)) {
1259 ret = PTR_ERR(ctrl->hclk);
1263 clk_prepare_enable(ctrl->hclk);
1265 ctrl->dev = dev;
1266 dev_set_drvdata(&pdev->dev, ctrl);
1267 mutex_init(&ctrl->port_lock);
1268 init_completion(&ctrl->broadcast);
1269 init_completion(&ctrl->enumeration);
1271 ctrl->bus.ops = &qcom_swrm_ops;
1272 ctrl->bus.port_ops = &qcom_swrm_port_ops;
1273 ctrl->bus.compute_params = &qcom_swrm_compute_params;
1275 ret = qcom_swrm_get_port_config(ctrl);
1279 params = &ctrl->bus.params;
1284 ctrl->reg_read(ctrl, SWRM_MCP_STATUS, &val);
1288 prop = &ctrl->bus.prop;
1296 ctrl->reg_read(ctrl, SWRM_COMP_HW_VERSION, &ctrl->version);
1298 ret = devm_request_threaded_irq(dev, ctrl->irq, NULL,
1302 "soundwire", ctrl);
1308 ret = sdw_bus_master_add(&ctrl->bus, dev, dev->fwnode);
1315 qcom_swrm_init(ctrl);
1316 wait_for_completion_timeout(&ctrl->enumeration,
1318 ret = qcom_swrm_register_dais(ctrl);
1323 (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
1324 ctrl->version & 0xffff);
1327 ctrl->debugfs = debugfs_create_dir("qualcomm-sdw", ctrl->bus.debugfs);
1328 debugfs_create_file("qualcomm-registers", 0400, ctrl->debugfs, ctrl,
1335 sdw_bus_master_delete(&ctrl->bus);
1337 clk_disable_unprepare(ctrl->hclk);
1344 struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(&pdev->dev); local
1346 sdw_bus_master_delete(&ctrl->bus);
1347 clk_disable_unprepare(ctrl->hclk);