Lines Matching refs:mbase
178 void __iomem *mbase = mtu->mac_base; in mtu3_intr_status_clear() local
181 mtu3_writel(mbase, U3D_EPISR, ~0x0); in mtu3_intr_status_clear()
183 mtu3_writel(mbase, U3D_COMMON_USB_INTR, ~0x0); in mtu3_intr_status_clear()
185 mtu3_writel(mbase, U3D_LTSSM_INTR, ~0x0); in mtu3_intr_status_clear()
187 mtu3_writel(mbase, U3D_DEV_LINK_INTR, ~0x0); in mtu3_intr_status_clear()
189 mtu3_writel(mbase, U3D_QISAR0, ~0x0); in mtu3_intr_status_clear()
205 void __iomem *mbase = mtu->mac_base; in mtu3_intr_enable() local
210 mtu3_writel(mbase, U3D_LV1IESR, value); in mtu3_intr_enable()
214 mtu3_writel(mbase, U3D_COMMON_USB_INTR_ENABLE, value); in mtu3_intr_enable()
220 mtu3_writel(mbase, U3D_LTSSM_INTR_ENABLE, value); in mtu3_intr_enable()
226 mtu3_writel(mbase, U3D_QIESR1, value); in mtu3_intr_enable()
229 mtu3_writel(mbase, U3D_DEV_LINK_INTR_ENABLE, SSUSB_DEV_SPEED_CHG_INTR); in mtu3_intr_enable()
234 void __iomem *mbase = mtu->mac_base; in mtu3_set_speed() local
242 mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN); in mtu3_set_speed()
244 mtu3_clrbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE); in mtu3_set_speed()
247 mtu3_clrbits(mbase, U3D_USB3_CONFIG, USB3_EN); in mtu3_set_speed()
249 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE); in mtu3_set_speed()
252 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE); in mtu3_set_speed()
257 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, HS_ENABLE); in mtu3_set_speed()
274 void __iomem *mbase = mtu->mac_base; in mtu3_csr_init() local
278 mtu3_clrbits(mbase, U3D_LINK_POWER_CONTROL, in mtu3_csr_init()
281 mtu3_setbits(mbase, U3D_LINK_POWER_CONTROL, in mtu3_csr_init()
284 mtu3_clrbits(mbase, U3D_LTSSM_CTRL, SOFT_U3_EXIT_EN); in mtu3_csr_init()
286 mtu3_setbits(mbase, U3D_USB2_TEST_MODE, U2U3_AUTO_SWITCH); in mtu3_csr_init()
288 mtu3_setbits(mbase, U3D_U3U2_SWITCH_CTRL, SOFTCON_CLR_AUTO_EN); in mtu3_csr_init()
292 mtu3_clrbits(mbase, U3D_LINK_RESET_INFO, WTCHRP_MSK); in mtu3_csr_init()
294 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, LPM_HRWE); in mtu3_csr_init()
311 void __iomem *mbase = mtu->mac_base; in mtu3_ep_stall_set() local
316 csr = mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)) & TX_W1C_BITS; in mtu3_ep_stall_set()
321 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr); in mtu3_ep_stall_set()
323 csr = mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)) & RX_W1C_BITS; in mtu3_ep_stall_set()
328 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr); in mtu3_ep_stall_set()
355 void __iomem *mbase = mtu->mac_base; in mtu3_start() local
358 mtu3_readl(mbase, U3D_DEVICE_CONTROL)); in mtu3_start()
407 void __iomem *mbase = mtu->mac_base; in mtu3_config_ep() local
449 mtu3_setbits(mbase, U3D_QIESR0, QMU_TX_DONE_INT(epnum)); in mtu3_config_ep()
451 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), csr0); in mtu3_config_ep()
452 mtu3_writel(mbase, MU3D_EP_TXCR1(epnum), csr1); in mtu3_config_ep()
453 mtu3_writel(mbase, MU3D_EP_TXCR2(epnum), csr2); in mtu3_config_ep()
456 epnum, mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)), in mtu3_config_ep()
457 mtu3_readl(mbase, MU3D_EP_TXCR1(epnum)), in mtu3_config_ep()
458 mtu3_readl(mbase, MU3D_EP_TXCR2(epnum))); in mtu3_config_ep()
485 mtu3_setbits(mbase, U3D_QIESR0, QMU_RX_DONE_INT(epnum)); in mtu3_config_ep()
487 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), csr0); in mtu3_config_ep()
488 mtu3_writel(mbase, MU3D_EP_RXCR1(epnum), csr1); in mtu3_config_ep()
489 mtu3_writel(mbase, MU3D_EP_RXCR2(epnum), csr2); in mtu3_config_ep()
492 epnum, mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)), in mtu3_config_ep()
493 mtu3_readl(mbase, MU3D_EP_RXCR1(epnum)), in mtu3_config_ep()
494 mtu3_readl(mbase, MU3D_EP_RXCR2(epnum))); in mtu3_config_ep()
508 void __iomem *mbase = mtu->mac_base; in mtu3_deconfig_ep() local
512 mtu3_writel(mbase, MU3D_EP_TXCR0(epnum), 0); in mtu3_deconfig_ep()
513 mtu3_writel(mbase, MU3D_EP_TXCR1(epnum), 0); in mtu3_deconfig_ep()
514 mtu3_writel(mbase, MU3D_EP_TXCR2(epnum), 0); in mtu3_deconfig_ep()
515 mtu3_setbits(mbase, U3D_QIECR0, QMU_TX_DONE_INT(epnum)); in mtu3_deconfig_ep()
517 mtu3_writel(mbase, MU3D_EP_RXCR0(epnum), 0); in mtu3_deconfig_ep()
518 mtu3_writel(mbase, MU3D_EP_RXCR1(epnum), 0); in mtu3_deconfig_ep()
519 mtu3_writel(mbase, MU3D_EP_RXCR2(epnum), 0); in mtu3_deconfig_ep()
520 mtu3_setbits(mbase, U3D_QIECR0, QMU_RX_DONE_INT(epnum)); in mtu3_deconfig_ep()
599 void __iomem *mbase = mtu->mac_base; in mtu3_mem_alloc() local
606 cap_epinfo = mtu3_readl(mbase, U3D_CAP_EPINFO); in mtu3_mem_alloc()
611 mtu3_readl(mbase, U3D_CAP_EPNTXFFSZ), in_ep_num, in mtu3_mem_alloc()
612 mtu3_readl(mbase, U3D_CAP_EPNRXFFSZ), out_ep_num); in mtu3_mem_alloc()
653 void __iomem *mbase = mtu->mac_base; in mtu3_regs_init() local
661 mtu3_writel(mbase, U3D_DEVICE_CONF, 0); in mtu3_regs_init()
663 mtu3_clrbits(mbase, U3D_MISC_CTRL, VBUS_FRC_EN | VBUS_ON); in mtu3_regs_init()
666 mtu3_writel(mbase, U3D_QFCR, ~0x0); in mtu3_regs_init()
671 void __iomem *mbase = mtu->mac_base; in mtu3_link_isr() local
677 link = mtu3_readl(mbase, U3D_DEV_LINK_INTR); in mtu3_link_isr()
678 link &= mtu3_readl(mbase, U3D_DEV_LINK_INTR_ENABLE); in mtu3_link_isr()
679 mtu3_writel(mbase, U3D_DEV_LINK_INTR, link); /* W1C */ in mtu3_link_isr()
685 speed = SSUSB_DEV_SPEED(mtu3_readl(mbase, U3D_DEVICE_CONF)); in mtu3_link_isr()
691 mtu3_writel(mbase, U3D_USB20_LPM_PARAMETER, LPM_BESLDCK(0xf) in mtu3_link_isr()
693 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, in mtu3_link_isr()
699 mtu3_writel(mbase, U3D_USB20_LPM_PARAMETER, LPM_BESLDCK(0xf) in mtu3_link_isr()
701 mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, in mtu3_link_isr()
738 void __iomem *mbase = mtu->mac_base; in mtu3_u3_ltssm_isr() local
741 ltssm = mtu3_readl(mbase, U3D_LTSSM_INTR); in mtu3_u3_ltssm_isr()
742 ltssm &= mtu3_readl(mbase, U3D_LTSSM_INTR_ENABLE); in mtu3_u3_ltssm_isr()
743 mtu3_writel(mbase, U3D_LTSSM_INTR, ltssm); /* W1C */ in mtu3_u3_ltssm_isr()
769 void __iomem *mbase = mtu->mac_base; in mtu3_u2_common_isr() local
772 u2comm = mtu3_readl(mbase, U3D_COMMON_USB_INTR); in mtu3_u2_common_isr()
773 u2comm &= mtu3_readl(mbase, U3D_COMMON_USB_INTR_ENABLE); in mtu3_u2_common_isr()
774 mtu3_writel(mbase, U3D_COMMON_USB_INTR, u2comm); /* W1C */ in mtu3_u2_common_isr()