Lines Matching refs:index
61 #define MTTY_VFIO_PCI_INDEX_TO_OFFSET(index) \ argument
62 ((u64)(index) << MTTY_VFIO_PCI_OFFSET_SHIFT)
293 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state, in handle_bar_write() argument
302 if (mdev_state->s[index].dlab) { in handle_bar_write()
303 mdev_state->s[index].divisor |= data; in handle_bar_write()
310 if (mdev_state->s[index].rxtx.count < in handle_bar_write()
311 mdev_state->s[index].max_fifo_size) { in handle_bar_write()
312 mdev_state->s[index].rxtx.fifo[ in handle_bar_write()
313 mdev_state->s[index].rxtx.head] = data; in handle_bar_write()
314 mdev_state->s[index].rxtx.count++; in handle_bar_write()
315 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head); in handle_bar_write()
316 mdev_state->s[index].overrun = false; in handle_bar_write()
322 if ((mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
324 (mdev_state->s[index].rxtx.count == in handle_bar_write()
325 mdev_state->s[index].intr_trigger_level)) { in handle_bar_write()
329 index); in handle_bar_write()
335 pr_err("Serial port %d: Buffer Overflow\n", index); in handle_bar_write()
337 mdev_state->s[index].overrun = true; in handle_bar_write()
343 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
352 if (mdev_state->s[index].dlab) in handle_bar_write()
353 mdev_state->s[index].divisor |= (u16)data << 8; in handle_bar_write()
355 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
358 (mdev_state->s[index].rxtx.head == in handle_bar_write()
359 mdev_state->s[index].rxtx.tail)) { in handle_bar_write()
362 index); in handle_bar_write()
373 mdev_state->s[index].fcr = data; in handle_bar_write()
378 mdev_state->s[index].rxtx.count = 0; in handle_bar_write()
379 mdev_state->s[index].rxtx.head = 0; in handle_bar_write()
380 mdev_state->s[index].rxtx.tail = 0; in handle_bar_write()
386 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
390 mdev_state->s[index].intr_trigger_level = 4; in handle_bar_write()
394 mdev_state->s[index].intr_trigger_level = 8; in handle_bar_write()
398 mdev_state->s[index].intr_trigger_level = 14; in handle_bar_write()
407 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
409 mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE; in handle_bar_write()
411 mdev_state->s[index].max_fifo_size = 1; in handle_bar_write()
412 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
419 mdev_state->s[index].dlab = true; in handle_bar_write()
420 mdev_state->s[index].divisor = 0; in handle_bar_write()
422 mdev_state->s[index].dlab = false; in handle_bar_write()
424 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
428 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
430 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
433 pr_err("Serial port %d: MCR_OUT2 write\n", index); in handle_bar_write()
438 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
441 pr_err("Serial port %d: MCR RTS/DTR write\n", index); in handle_bar_write()
453 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
461 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state, in handle_bar_read() argument
468 if (mdev_state->s[index].dlab) { in handle_bar_read()
469 *buf = (u8)mdev_state->s[index].divisor; in handle_bar_read()
475 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
476 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
477 *buf = mdev_state->s[index].rxtx.fifo[ in handle_bar_read()
478 mdev_state->s[index].rxtx.tail]; in handle_bar_read()
479 mdev_state->s[index].rxtx.count--; in handle_bar_read()
480 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail); in handle_bar_read()
483 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
484 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
490 pr_err("Serial port %d: Buffer Empty\n", index); in handle_bar_read()
492 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_read()
501 if (mdev_state->s[index].dlab) { in handle_bar_read()
502 *buf = (u8)(mdev_state->s[index].divisor >> 8); in handle_bar_read()
505 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f; in handle_bar_read()
510 u8 ier = mdev_state->s[index].uart_reg[UART_IER]; in handle_bar_read()
515 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun) in handle_bar_read()
520 (mdev_state->s[index].rxtx.count >= in handle_bar_read()
521 mdev_state->s[index].intr_trigger_level)) in handle_bar_read()
526 (mdev_state->s[index].rxtx.head == in handle_bar_read()
527 mdev_state->s[index].rxtx.tail)) in handle_bar_read()
532 (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
548 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
557 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
558 mdev_state->s[index].rxtx.tail) in handle_bar_read()
562 if (mdev_state->s[index].overrun) in handle_bar_read()
566 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
567 mdev_state->s[index].rxtx.tail) in handle_bar_read()
579 if (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
581 if (mdev_state->s[index].rxtx.count < in handle_bar_read()
582 mdev_state->s[index].max_fifo_size) in handle_bar_read()
591 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
601 int index, pos; in mdev_read_base() local
607 for (index = 0; index <= VFIO_PCI_BAR5_REGION_INDEX; index++) { in mdev_read_base()
609 if (!mdev_state->region_info[index].size) in mdev_read_base()
631 mdev_state->region_info[index].start = ((u64)start_hi << 32) | in mdev_read_base()
639 unsigned int index; in mdev_access() local
648 index = MTTY_VFIO_PCI_OFFSET_TO_INDEX(pos); in mdev_access()
650 switch (index) { in mdev_access()
668 if (!mdev_state->region_info[index].start) in mdev_access()
676 __func__, index, offset, wr_reg[offset], in mdev_access()
677 *buf, mdev_state->s[index].dlab); in mdev_access()
679 handle_bar_write(index, mdev_state, offset, buf, count); in mdev_access()
681 handle_bar_read(index, mdev_state, offset, buf, count); in mdev_access()
686 __func__, index, offset, rd_reg[offset], in mdev_access()
687 *buf, mdev_state->s[index].dlab); in mdev_access()
901 unsigned int index, unsigned int start, in mtty_set_irqs() argument
907 switch (index) { in mtty_set_irqs()
935 mdev_state->irq_index = index; in mtty_set_irqs()
973 mdev_state->irq_index = index; in mtty_set_irqs()
1027 bar_index = region_info->index; in mtty_get_region_info()
1063 switch (irq_info->index) { in mtty_get_irq_info()
1076 if (irq_info->index == VFIO_PCI_INTX_IRQ_INDEX) in mtty_get_irq_info()
1161 (info.index >= mdev_state->dev_info.num_irqs)) in mtty_ioctl()
1198 ret = mtty_set_irqs(mdev_state, hdr.flags, hdr.index, hdr.start, in mtty_ioctl()