1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3 
4 #define _HAL_INIT_C_
5 
6 #include "../include/linux/firmware.h"
7 #include "../include/drv_types.h"
8 #include "../include/rtw_efuse.h"
9 #include "../include/rtl8188e_hal.h"
10 #include "../include/rtw_iol.h"
11 #include "../include/usb_ops.h"
12 
iol_mode_enable(struct adapter * padapter,u8 enable)13 static void iol_mode_enable(struct adapter *padapter, u8 enable)
14 {
15 	u8 reg_0xf0 = 0;
16 
17 	if (enable) {
18 		/* Enable initial offload */
19 		reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
20 		rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN);
21 
22 		if (!padapter->bFWReady) {
23 			DBG_88E("bFWReady == false call reset 8051...\n");
24 			_8051Reset88E(padapter);
25 		}
26 
27 	} else {
28 		/* disable initial offload */
29 		reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG);
30 		rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
31 	}
32 }
33 
iol_execute(struct adapter * padapter,u8 control)34 static s32 iol_execute(struct adapter *padapter, u8 control)
35 {
36 	s32 status = _FAIL;
37 	u8 reg_0x88 = 0;
38 	u32 start = 0, passing_time = 0;
39 
40 	control = control & 0x0f;
41 	reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
42 	rtw_write8(padapter, REG_HMEBOX_E0,  reg_0x88 | control);
43 
44 	start = jiffies;
45 	while ((reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control &&
46 	       (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
47 		;
48 	}
49 
50 	reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0);
51 	status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
52 	if (reg_0x88 & control << 4)
53 		status = _FAIL;
54 	return status;
55 }
56 
iol_InitLLTTable(struct adapter * padapter,u8 txpktbuf_bndy)57 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
58 {
59 	s32 rst = _SUCCESS;
60 	iol_mode_enable(padapter, 1);
61 	rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
62 	rst = iol_execute(padapter, CMD_INIT_LLT);
63 	iol_mode_enable(padapter, 0);
64 	return rst;
65 }
66 
67 static void
efuse_phymap_to_logical(u8 * phymap,u16 _offset,u16 _size_byte,u8 * pbuf)68 efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8  *pbuf)
69 {
70 	u8 *efuseTbl = NULL;
71 	u8 rtemp8;
72 	u16	eFuse_Addr = 0;
73 	u8 offset, wren;
74 	u16	i, j;
75 	u16	**eFuseWord = NULL;
76 	u16	efuse_utilized = 0;
77 	u8 u1temp = 0;
78 
79 	efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
80 	if (!efuseTbl) {
81 		DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
82 		goto exit;
83 	}
84 
85 	eFuseWord = rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
86 	if (!eFuseWord) {
87 		DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
88 		goto exit;
89 	}
90 
91 	/*  0. Refresh efuse init map as all oxFF. */
92 	for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
93 		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
94 			eFuseWord[i][j] = 0xFFFF;
95 
96 	/*  */
97 	/*  1. Read the first byte to check if efuse is empty!!! */
98 	/*  */
99 	/*  */
100 	rtemp8 = *(phymap + eFuse_Addr);
101 	if (rtemp8 != 0xFF) {
102 		efuse_utilized++;
103 		eFuse_Addr++;
104 	} else {
105 		DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8);
106 		goto exit;
107 	}
108 
109 	/*  */
110 	/*  2. Read real efuse content. Filter PG header and every section data. */
111 	/*  */
112 	while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
113 		/*  Check PG header for section num. */
114 		if ((rtemp8 & 0x1F) == 0x0F) {		/* extended header */
115 			u1temp = ((rtemp8 & 0xE0) >> 5);
116 			rtemp8 = *(phymap + eFuse_Addr);
117 			if ((rtemp8 & 0x0F) == 0x0F) {
118 				eFuse_Addr++;
119 				rtemp8 = *(phymap + eFuse_Addr);
120 
121 				if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
122 					eFuse_Addr++;
123 				continue;
124 			} else {
125 				offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
126 				wren = (rtemp8 & 0x0F);
127 				eFuse_Addr++;
128 			}
129 		} else {
130 			offset = ((rtemp8 >> 4) & 0x0f);
131 			wren = (rtemp8 & 0x0f);
132 		}
133 
134 		if (offset < EFUSE_MAX_SECTION_88E) {
135 			/*  Get word enable value from PG header */
136 			for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
137 				/*  Check word enable condition in the section */
138 				if (!(wren & 0x01)) {
139 					rtemp8 = *(phymap + eFuse_Addr);
140 					eFuse_Addr++;
141 					efuse_utilized++;
142 					eFuseWord[offset][i] = (rtemp8 & 0xff);
143 					if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
144 						break;
145 					rtemp8 = *(phymap + eFuse_Addr);
146 					eFuse_Addr++;
147 					efuse_utilized++;
148 					eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
149 
150 					if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
151 						break;
152 				}
153 				wren >>= 1;
154 			}
155 		}
156 		/*  Read next PG header */
157 		rtemp8 = *(phymap + eFuse_Addr);
158 
159 		if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
160 			efuse_utilized++;
161 			eFuse_Addr++;
162 		}
163 	}
164 
165 	/*  */
166 	/*  3. Collect 16 sections and 4 word unit into Efuse map. */
167 	/*  */
168 	for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
169 		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
170 			efuseTbl[(i * 8) + (j * 2)] = (eFuseWord[i][j] & 0xff);
171 			efuseTbl[(i * 8) + ((j * 2) + 1)] = ((eFuseWord[i][j] >> 8) & 0xff);
172 		}
173 	}
174 
175 	/*  */
176 	/*  4. Copy from Efuse map to output pointer memory!!! */
177 	/*  */
178 	for (i = 0; i < _size_byte; i++)
179 		pbuf[i] = efuseTbl[_offset + i];
180 
181 	/*  */
182 	/*  5. Calculate Efuse utilization. */
183 	/*  */
184 
185 exit:
186 	kfree(efuseTbl);
187 	kfree(eFuseWord);
188 }
189 
efuse_read_phymap_from_txpktbuf(struct adapter * adapter,int bcnhead,u8 * content,u16 * size)190 static void efuse_read_phymap_from_txpktbuf(
191 	struct adapter  *adapter,
192 	int bcnhead,	/* beacon head, where FW store len(2-byte) and efuse physical map. */
193 	u8 *content,	/* buffer to store efuse physical map */
194 	u16 *size	/* for efuse content: the max byte to read. will update to byte read */
195 	)
196 {
197 	u16 dbg_addr = 0;
198 	u32 start  = 0, passing_time = 0;
199 	u8 reg_0x143 = 0;
200 	__le32 lo32 = 0, hi32 = 0;
201 	u16 len = 0, count = 0;
202 	int i = 0;
203 	u16 limit = *size;
204 
205 	u8 *pos = content;
206 
207 	if (bcnhead < 0) /* if not valid */
208 		bcnhead = rtw_read8(adapter, REG_TDECTRL + 1);
209 
210 	DBG_88E("%s bcnhead:%d\n", __func__, bcnhead);
211 
212 	rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
213 
214 	dbg_addr = bcnhead * 128 / 8; /* 8-bytes addressing */
215 
216 	while (1) {
217 		rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr + i);
218 
219 		rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
220 		start = jiffies;
221 		while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) &&
222 		       (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
223 			DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, rtw_read8(adapter, 0x106));
224 			rtw_usleep_os(100);
225 		}
226 
227 		/* data from EEPROM needs to be in LE */
228 		lo32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L));
229 		hi32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H));
230 
231 		if (i == 0) {
232 			/* Although lenc is only used in a debug statement,
233 			 * do not remove it as the rtw_read16() call consumes
234 			 * 2 bytes from the EEPROM source.
235 			 */
236 			u16 lenc = rtw_read16(adapter, REG_PKTBUF_DBG_DATA_L);
237 
238 			len = le32_to_cpu(lo32) & 0x0000ffff;
239 
240 			limit = (len - 2 < limit) ? len - 2 : limit;
241 
242 			DBG_88E("%s len:%u, lenc:%u\n", __func__, len, lenc);
243 
244 			memcpy(pos, ((u8 *)&lo32) + 2, (limit >= count + 2) ? 2 : limit - count);
245 			count += (limit >= count + 2) ? 2 : limit - count;
246 			pos = content + count;
247 		} else {
248 			memcpy(pos, ((u8 *)&lo32), (limit >= count + 4) ? 4 : limit - count);
249 			count += (limit >= count + 4) ? 4 : limit - count;
250 			pos = content + count;
251 		}
252 
253 		if (limit > count && len - 2 > count) {
254 			memcpy(pos, (u8 *)&hi32, (limit >= count + 4) ? 4 : limit - count);
255 			count += (limit >= count + 4) ? 4 : limit - count;
256 			pos = content + count;
257 		}
258 
259 		if (limit <= count || len - 2 <= count)
260 			break;
261 		i++;
262 	}
263 	rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
264 	DBG_88E("%s read count:%u\n", __func__, count);
265 	*size = count;
266 }
267 
iol_read_efuse(struct adapter * padapter,u8 txpktbuf_bndy,u16 offset,u16 size_byte,u8 * logical_map)268 static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
269 {
270 	s32 status = _FAIL;
271 	u8 physical_map[512];
272 	u16 size = 512;
273 
274 	rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
275 	memset(physical_map, 0xFF, 512);
276 	rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
277 	status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
278 	if (status == _SUCCESS)
279 		efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
280 	efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
281 	return status;
282 }
283 
rtl8188e_iol_efuse_patch(struct adapter * padapter)284 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
285 {
286 	s32	result = _SUCCESS;
287 
288 	DBG_88E("==> %s\n", __func__);
289 	if (rtw_IOL_applied(padapter)) {
290 		iol_mode_enable(padapter, 1);
291 		result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
292 		if (result == _SUCCESS)
293 			result = iol_execute(padapter, CMD_EFUSE_PATCH);
294 
295 		iol_mode_enable(padapter, 0);
296 	}
297 	return result;
298 }
299 
iol_ioconfig(struct adapter * padapter,u8 iocfg_bndy)300 static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy)
301 {
302 	s32 rst = _SUCCESS;
303 
304 	rtw_write8(padapter, REG_TDECTRL + 1, iocfg_bndy);
305 	rst = iol_execute(padapter, CMD_IOCONFIG);
306 	return rst;
307 }
308 
rtl8188e_IOL_exec_cmds_sync(struct adapter * adapter,struct xmit_frame * xmit_frame,u32 max_wating_ms,u32 bndy_cnt)309 int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
310 {
311 	struct pkt_attrib *pattrib = &xmit_frame->attrib;
312 	u8 i;
313 	int ret = _FAIL;
314 
315 	if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
316 		goto exit;
317 	if (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE + pattrib->last_txcmdsz)) {
318 		if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
319 			goto exit;
320 	}
321 
322 	dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms);
323 
324 	iol_mode_enable(adapter, 1);
325 	for (i = 0; i < bndy_cnt; i++) {
326 		u8 page_no = 0;
327 		page_no = i * 2;
328 		ret = iol_ioconfig(adapter, page_no);
329 		if (ret != _SUCCESS)
330 			break;
331 	}
332 	iol_mode_enable(adapter, 0);
333 exit:
334 	/* restore BCN_HEAD */
335 	rtw_write8(adapter, REG_TDECTRL + 1, 0);
336 	return ret;
337 }
338 
_FWDownloadEnable(struct adapter * padapter,bool enable)339 static void _FWDownloadEnable(struct adapter *padapter, bool enable)
340 {
341 	u8 tmp;
342 
343 	if (enable) {
344 		/*  MCU firmware download enable. */
345 		tmp = rtw_read8(padapter, REG_MCUFWDL);
346 		rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
347 
348 		/*  8051 reset */
349 		tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
350 		rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
351 	} else {
352 		/*  MCU firmware download disable. */
353 		tmp = rtw_read8(padapter, REG_MCUFWDL);
354 		rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
355 
356 		/*  Reserved for fw extension. */
357 		rtw_write8(padapter, REG_MCUFWDL + 1, 0x00);
358 	}
359 }
360 
361 #define MAX_REG_BOLCK_SIZE	196
362 
_BlockWrite(struct adapter * padapter,void * buffer,u32 buffSize)363 static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize)
364 {
365 	int ret = _SUCCESS;
366 	u32	blockSize_p1 = 4;	/*  (Default) Phase #1 : PCI muse use 4-byte write to download FW */
367 	u32	blockSize_p2 = 8;	/*  Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
368 	u32	blockSize_p3 = 1;	/*  Phase #3 : Use 1-byte, the remnant of FW image. */
369 	u32	blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
370 	u32	remainSize_p1 = 0, remainSize_p2 = 0;
371 	u8 *bufferPtr	= (u8 *)buffer;
372 	u32	i = 0, offset = 0;
373 
374 	blockSize_p1 = MAX_REG_BOLCK_SIZE;
375 
376 	/* 3 Phase #1 */
377 	blockCount_p1 = buffSize / blockSize_p1;
378 	remainSize_p1 = buffSize % blockSize_p1;
379 
380 	for (i = 0; i < blockCount_p1; i++) {
381 		ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
382 		if (ret == _FAIL)
383 			goto exit;
384 	}
385 
386 	/* 3 Phase #2 */
387 	if (remainSize_p1) {
388 		offset = blockCount_p1 * blockSize_p1;
389 
390 		blockCount_p2 = remainSize_p1 / blockSize_p2;
391 		remainSize_p2 = remainSize_p1 % blockSize_p2;
392 
393 		for (i = 0; i < blockCount_p2; i++) {
394 			ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2));
395 
396 			if (ret == _FAIL)
397 				goto exit;
398 		}
399 	}
400 
401 	/* 3 Phase #3 */
402 	if (remainSize_p2) {
403 		offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
404 
405 		blockCount_p3 = remainSize_p2 / blockSize_p3;
406 
407 		for (i = 0; i < blockCount_p3; i++) {
408 			ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
409 
410 			if (ret == _FAIL)
411 				goto exit;
412 		}
413 	}
414 
415 exit:
416 	return ret;
417 }
418 
_PageWrite(struct adapter * padapter,u32 page,void * buffer,u32 size)419 static int _PageWrite(struct adapter *padapter, u32 page, void *buffer, u32 size)
420 {
421 	u8 value8;
422 	u8 u8Page = (u8)(page & 0x07);
423 
424 	value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
425 	rtw_write8(padapter, REG_MCUFWDL + 2, value8);
426 
427 	return _BlockWrite(padapter, buffer, size);
428 }
429 
_WriteFW(struct adapter * padapter,void * buffer,u32 size)430 static int _WriteFW(struct adapter *padapter, void *buffer, u32 size)
431 {
432 	/*  Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
433 	/*  We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
434 	int ret = _SUCCESS;
435 	u32	pageNums, remainSize;
436 	u32	page, offset;
437 	u8 *bufferPtr = (u8 *)buffer;
438 
439 	pageNums = size / MAX_PAGE_SIZE;
440 	remainSize = size % MAX_PAGE_SIZE;
441 
442 	for (page = 0; page < pageNums; page++) {
443 		offset = page * MAX_PAGE_SIZE;
444 		ret = _PageWrite(padapter, page, bufferPtr + offset, MAX_PAGE_SIZE);
445 
446 		if (ret == _FAIL)
447 			goto exit;
448 	}
449 	if (remainSize) {
450 		offset = pageNums * MAX_PAGE_SIZE;
451 		page = pageNums;
452 		ret = _PageWrite(padapter, page, bufferPtr + offset, remainSize);
453 
454 		if (ret == _FAIL)
455 			goto exit;
456 	}
457 exit:
458 	return ret;
459 }
460 
_8051Reset88E(struct adapter * padapter)461 void _8051Reset88E(struct adapter *padapter)
462 {
463 	u8 u1bTmp;
464 
465 	u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
466 	rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT(2)));
467 	rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT(2)));
468 	DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
469 }
470 
_FWFreeToGo(struct adapter * padapter)471 static s32 _FWFreeToGo(struct adapter *padapter)
472 {
473 	u32	counter = 0;
474 	u32	value32;
475 
476 	/*  polling CheckSum report */
477 	do {
478 		value32 = rtw_read32(padapter, REG_MCUFWDL);
479 		if (value32 & FWDL_ChkSum_rpt)
480 			break;
481 	} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
482 
483 	if (counter >= POLLING_READY_TIMEOUT_COUNT) {
484 		DBG_88E("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __func__, value32);
485 		return _FAIL;
486 	}
487 	DBG_88E("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, value32);
488 
489 	value32 = rtw_read32(padapter, REG_MCUFWDL);
490 	value32 |= MCUFWDL_RDY;
491 	value32 &= ~WINTINI_RDY;
492 	rtw_write32(padapter, REG_MCUFWDL, value32);
493 
494 	_8051Reset88E(padapter);
495 
496 	/*  polling for FW ready */
497 	counter = 0;
498 	do {
499 		value32 = rtw_read32(padapter, REG_MCUFWDL);
500 		if (value32 & WINTINI_RDY) {
501 			DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32);
502 			return _SUCCESS;
503 		}
504 		udelay(5);
505 	} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
506 
507 	DBG_88E("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __func__, value32);
508 	return _FAIL;
509 }
510 
511 #define IS_FW_81xxC(padapter)	(((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0)
512 
load_firmware(struct rt_firmware * pFirmware,struct device * device)513 static int load_firmware(struct rt_firmware *pFirmware, struct device *device)
514 {
515 	s32	rtStatus = _SUCCESS;
516 	const struct firmware *fw;
517 	const char *fw_name = "rtlwifi/rtl8188eufw.bin";
518 	int err = request_firmware(&fw, fw_name, device);
519 
520 	if (err) {
521 		pr_err("Request firmware failed with error 0x%x\n", err);
522 		rtStatus = _FAIL;
523 		goto Exit;
524 	}
525 	if (!fw) {
526 		pr_err("Firmware %s not available\n", fw_name);
527 		rtStatus = _FAIL;
528 		goto Exit;
529 	}
530 	if (fw->size > FW_8188E_SIZE) {
531 		rtStatus = _FAIL;
532 		goto Exit;
533 	}
534 
535 	pFirmware->szFwBuffer = kzalloc(FW_8188E_SIZE, GFP_KERNEL);
536 	if (!pFirmware->szFwBuffer) {
537 		pr_err("Failed to allocate pFirmware->szFwBuffer\n");
538 		rtStatus = _FAIL;
539 		goto Exit;
540 	}
541 	memcpy(pFirmware->szFwBuffer, fw->data, fw->size);
542 	pFirmware->ulFwLength = fw->size;
543 	release_firmware(fw);
544 	DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, pFirmware->ulFwLength);
545 
546 Exit:
547 	return rtStatus;
548 }
549 
rtl8188e_FirmwareDownload(struct adapter * padapter)550 s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
551 {
552 	s32	rtStatus = _SUCCESS;
553 	u8 writeFW_retry = 0;
554 	u32 fwdl_start_time;
555 	struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
556 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
557 	struct device *device = dvobj_to_dev(dvobj);
558 	struct rt_firmware_hdr *pFwHdr = NULL;
559 	u8 *pFirmwareBuf;
560 	u32 FirmwareLen;
561 	static int log_version;
562 
563 	if (!dvobj->firmware.szFwBuffer)
564 		rtStatus = load_firmware(&dvobj->firmware, device);
565 	if (rtStatus == _FAIL) {
566 		dvobj->firmware.szFwBuffer = NULL;
567 		goto Exit;
568 	}
569 	pFirmwareBuf = dvobj->firmware.szFwBuffer;
570 	FirmwareLen = dvobj->firmware.ulFwLength;
571 
572 	/*  To Check Fw header. Added by tynli. 2009.12.04. */
573 	pFwHdr = (struct rt_firmware_hdr *)dvobj->firmware.szFwBuffer;
574 
575 	pHalData->FirmwareVersion =  le16_to_cpu(pFwHdr->Version);
576 	pHalData->FirmwareSubVersion = pFwHdr->Subversion;
577 	pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
578 
579 	if (!log_version++)
580 		pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
581 			DRIVER_PREFIX, pHalData->FirmwareVersion,
582 			pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
583 
584 	if (IS_FW_HEADER_EXIST(pFwHdr)) {
585 		/*  Shift 32 bytes for FW header */
586 		pFirmwareBuf = pFirmwareBuf + 32;
587 		FirmwareLen = FirmwareLen - 32;
588 	}
589 
590 	/*  Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
591 	/*  or it will cause download Fw fail. 2010.02.01. by tynli. */
592 	if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
593 		rtw_write8(padapter, REG_MCUFWDL, 0x00);
594 		_8051Reset88E(padapter);
595 	}
596 
597 	_FWDownloadEnable(padapter, true);
598 	fwdl_start_time = jiffies;
599 	while (1) {
600 		/* reset the FWDL chksum */
601 		rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
602 
603 		rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen);
604 
605 		if (rtStatus == _SUCCESS ||
606 		    (rtw_get_passing_time_ms(fwdl_start_time) > 500 && writeFW_retry++ >= 3))
607 			break;
608 
609 		DBG_88E("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n",
610 			__func__, writeFW_retry, rtw_get_passing_time_ms(fwdl_start_time)
611 		);
612 	}
613 	_FWDownloadEnable(padapter, false);
614 	if (_SUCCESS != rtStatus) {
615 		DBG_88E("DL Firmware failed!\n");
616 		goto Exit;
617 	}
618 
619 	rtStatus = _FWFreeToGo(padapter);
620 	if (_SUCCESS != rtStatus) {
621 		DBG_88E("DL Firmware failed!\n");
622 		goto Exit;
623 	}
624 
625 Exit:
626 	return rtStatus;
627 }
628 
rtl8188e_InitializeFirmwareVars(struct adapter * padapter)629 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
630 {
631 	struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
632 
633 	/*  Init Fw LPS related. */
634 	padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
635 
636 	/*  Init H2C counter. by tynli. 2009.12.09. */
637 	pHalData->LastHMEBoxNum = 0;
638 }
639 
rtl8188e_free_hal_data(struct adapter * padapter)640 void rtl8188e_free_hal_data(struct adapter *padapter)
641 {
642 	kfree(padapter->HalData);
643 	padapter->HalData = NULL;
644 }
645 
646 /*  */
647 /*			Efuse related code */
648 /*  */
649 enum{
650 		VOLTAGE_V25						= 0x03,
651 		LDOE25_SHIFT						= 28,
652 	};
653 
654 static bool
655 hal_EfusePgPacketWrite2ByteHeader(
656 		struct adapter *pAdapter,
657 		u8 efuseType,
658 		u16				*pAddr,
659 		struct pgpkt *pTargetPkt,
660 		bool bPseudoTest);
661 static bool
662 hal_EfusePgPacketWrite1ByteHeader(
663 		struct adapter *pAdapter,
664 		u8 efuseType,
665 		u16				*pAddr,
666 		struct pgpkt *pTargetPkt,
667 		bool bPseudoTest);
668 static bool
669 hal_EfusePgPacketWriteData(
670 		struct adapter *pAdapter,
671 		u8 efuseType,
672 		u16				*pAddr,
673 		struct pgpkt *pTargetPkt,
674 		bool bPseudoTest);
675 
rtl8188e_EfusePowerSwitch(struct adapter * pAdapter,u8 bWrite,u8 PwrState)676 void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState)
677 {
678 	u8 tempval;
679 	u16	tmpV16;
680 
681 	if (PwrState) {
682 		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
683 
684 		/*  1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
685 		tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
686 		if (!(tmpV16 & PWC_EV12V)) {
687 			tmpV16 |= PWC_EV12V;
688 			rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
689 		}
690 		/*  Reset: 0x0000h[28], default valid */
691 		tmpV16 =  rtw_read16(pAdapter, REG_SYS_FUNC_EN);
692 		if (!(tmpV16 & FEN_ELDR)) {
693 			tmpV16 |= FEN_ELDR;
694 			rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16);
695 		}
696 
697 		/*  Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
698 		tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR);
699 		if ((!(tmpV16 & LOADER_CLK_EN))  || (!(tmpV16 & ANA8M))) {
700 			tmpV16 |= (LOADER_CLK_EN | ANA8M);
701 			rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16);
702 		}
703 
704 		if (bWrite) {
705 			/*  Enable LDO 2.5V before read/write action */
706 			tempval = rtw_read8(pAdapter, EFUSE_TEST + 3);
707 			tempval &= 0x0F;
708 			tempval |= (VOLTAGE_V25 << 4);
709 			rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval | 0x80));
710 		}
711 	} else {
712 		rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
713 
714 		if (bWrite) {
715 			/*  Disable LDO 2.5V after read/write action */
716 			tempval = rtw_read8(pAdapter, EFUSE_TEST + 3);
717 			rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval & 0x7F));
718 		}
719 	}
720 }
721 
Hal_EfuseReadEFuse88E(struct adapter * Adapter,u16 _offset,u16 _size_byte,u8 * pbuf,bool bPseudoTest)722 static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
723 	u16			_offset,
724 	u16			_size_byte,
725 	u8 *pbuf,
726 		bool bPseudoTest
727 	)
728 {
729 	u8 *efuseTbl = NULL;
730 	u8 rtemp8[1];
731 	u16	eFuse_Addr = 0;
732 	u8 offset, wren;
733 	u16	i, j;
734 	u16	**eFuseWord = NULL;
735 	u16	efuse_utilized = 0;
736 	u8 u1temp = 0;
737 
738 	/*  */
739 	/*  Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
740 	/*  */
741 	if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) {/*  total E-Fuse table is 512bytes */
742 		DBG_88E("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte);
743 		goto exit;
744 	}
745 
746 	efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
747 	if (!efuseTbl) {
748 		DBG_88E("%s: alloc efuseTbl fail!\n", __func__);
749 		goto exit;
750 	}
751 
752 	eFuseWord = rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
753 	if (!eFuseWord) {
754 		DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
755 		goto exit;
756 	}
757 
758 	/*  0. Refresh efuse init map as all oxFF. */
759 	for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
760 		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
761 			eFuseWord[i][j] = 0xFFFF;
762 
763 	/*  */
764 	/*  1. Read the first byte to check if efuse is empty!!! */
765 	/*  */
766 	/*  */
767 	ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
768 	if (*rtemp8 != 0xFF) {
769 		efuse_utilized++;
770 		eFuse_Addr++;
771 	} else {
772 		DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, *rtemp8);
773 		goto exit;
774 	}
775 
776 	/*  */
777 	/*  2. Read real efuse content. Filter PG header and every section data. */
778 	/*  */
779 	while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
780 		/*  Check PG header for section num. */
781 		if ((*rtemp8 & 0x1F) == 0x0F) {		/* extended header */
782 			u1temp = ((*rtemp8 & 0xE0) >> 5);
783 
784 			ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
785 
786 			if ((*rtemp8 & 0x0F) == 0x0F) {
787 				eFuse_Addr++;
788 				ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
789 
790 				if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
791 					eFuse_Addr++;
792 				continue;
793 			} else {
794 				offset = ((*rtemp8 & 0xF0) >> 1) | u1temp;
795 				wren = (*rtemp8 & 0x0F);
796 				eFuse_Addr++;
797 			}
798 		} else {
799 			offset = ((*rtemp8 >> 4) & 0x0f);
800 			wren = (*rtemp8 & 0x0f);
801 		}
802 
803 		if (offset < EFUSE_MAX_SECTION_88E) {
804 			/*  Get word enable value from PG header */
805 
806 			for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
807 				/*  Check word enable condition in the section */
808 				if (!(wren & 0x01)) {
809 					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
810 					eFuse_Addr++;
811 					efuse_utilized++;
812 					eFuseWord[offset][i] = (*rtemp8 & 0xff);
813 					if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
814 						break;
815 					ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
816 					eFuse_Addr++;
817 					efuse_utilized++;
818 					eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00);
819 					if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
820 						break;
821 				}
822 				wren >>= 1;
823 			}
824 		}
825 
826 		/*  Read next PG header */
827 		ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
828 
829 		if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
830 			efuse_utilized++;
831 			eFuse_Addr++;
832 		}
833 	}
834 
835 	/*  3. Collect 16 sections and 4 word unit into Efuse map. */
836 	for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
837 		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
838 			efuseTbl[(i * 8) + (j * 2)] = (eFuseWord[i][j] & 0xff);
839 			efuseTbl[(i * 8) + ((j * 2) + 1)] = ((eFuseWord[i][j] >> 8) & 0xff);
840 		}
841 	}
842 
843 	/*  4. Copy from Efuse map to output pointer memory!!! */
844 	for (i = 0; i < _size_byte; i++)
845 		pbuf[i] = efuseTbl[_offset + i];
846 
847 	/*  5. Calculate Efuse utilization. */
848 	SetHwReg8188EU(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
849 
850 exit:
851 	kfree(efuseTbl);
852 	kfree(eFuseWord);
853 }
854 
ReadEFuseByIC(struct adapter * Adapter,u8 efuseType,u16 _offset,u16 _size_byte,u8 * pbuf,bool bPseudoTest)855 static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
856 {
857 	if (!bPseudoTest) {
858 		int ret = _FAIL;
859 		if (rtw_IOL_applied(Adapter)) {
860 			rtl8188eu_InitPowerOn(Adapter);
861 
862 			iol_mode_enable(Adapter, 1);
863 			ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
864 			iol_mode_enable(Adapter, 0);
865 
866 			if (_SUCCESS == ret)
867 				goto exit;
868 		}
869 	}
870 	Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
871 
872 exit:
873 	return;
874 }
875 
ReadEFuse_Pseudo(struct adapter * Adapter,u8 efuseType,u16 _offset,u16 _size_byte,u8 * pbuf,bool bPseudoTest)876 static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
877 {
878 	Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
879 }
880 
rtl8188e_ReadEFuse(struct adapter * Adapter,u8 efuseType,u16 _offset,u16 _size_byte,u8 * pbuf,bool bPseudoTest)881 void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
882 			u16 _offset, u16 _size_byte, u8 *pbuf,
883 			bool bPseudoTest)
884 {
885 	if (bPseudoTest)
886 		ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
887 	else
888 		ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
889 }
890 
891 /* Do not support BT */
Hal_EFUSEGetEfuseDefinition88E(struct adapter * pAdapter,u8 efuseType,u8 type,void * pOut)892 static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
893 {
894 	switch (type) {
895 	case TYPE_EFUSE_MAX_SECTION:
896 		{
897 			u8 *pMax_section;
898 			pMax_section = (u8 *)pOut;
899 			*pMax_section = EFUSE_MAX_SECTION_88E;
900 		}
901 		break;
902 	case TYPE_EFUSE_REAL_CONTENT_LEN:
903 		{
904 			u16 *pu2Tmp;
905 			pu2Tmp = (u16 *)pOut;
906 			*pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
907 		}
908 		break;
909 	case TYPE_EFUSE_CONTENT_LEN_BANK:
910 		{
911 			u16 *pu2Tmp;
912 			pu2Tmp = (u16 *)pOut;
913 			*pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
914 		}
915 		break;
916 	case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
917 		{
918 			u16 *pu2Tmp;
919 			pu2Tmp = (u16 *)pOut;
920 			*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E);
921 		}
922 		break;
923 	case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
924 		{
925 			u16 *pu2Tmp;
926 			pu2Tmp = (u16 *)pOut;
927 			*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E);
928 		}
929 		break;
930 	case TYPE_EFUSE_MAP_LEN:
931 		{
932 			u16 *pu2Tmp;
933 			pu2Tmp = (u16 *)pOut;
934 			*pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
935 		}
936 		break;
937 	case TYPE_EFUSE_PROTECT_BYTES_BANK:
938 		{
939 			u8 *pu1Tmp;
940 			pu1Tmp = (u8 *)pOut;
941 			*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
942 		}
943 		break;
944 	default:
945 		{
946 			u8 *pu1Tmp;
947 			pu1Tmp = (u8 *)pOut;
948 			*pu1Tmp = 0;
949 		}
950 		break;
951 	}
952 }
953 
Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter * pAdapter,u8 efuseType,u8 type,void * pOut)954 static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut)
955 {
956 	switch (type) {
957 	case TYPE_EFUSE_MAX_SECTION:
958 		{
959 			u8 *pMax_section;
960 			pMax_section = (u8 *)pOut;
961 			*pMax_section = EFUSE_MAX_SECTION_88E;
962 		}
963 		break;
964 	case TYPE_EFUSE_REAL_CONTENT_LEN:
965 		{
966 			u16 *pu2Tmp;
967 			pu2Tmp = (u16 *)pOut;
968 			*pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
969 		}
970 		break;
971 	case TYPE_EFUSE_CONTENT_LEN_BANK:
972 		{
973 			u16 *pu2Tmp;
974 			pu2Tmp = (u16 *)pOut;
975 			*pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E;
976 		}
977 		break;
978 	case TYPE_AVAILABLE_EFUSE_BYTES_BANK:
979 		{
980 			u16 *pu2Tmp;
981 			pu2Tmp = (u16 *)pOut;
982 			*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E);
983 		}
984 		break;
985 	case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL:
986 		{
987 			u16 *pu2Tmp;
988 			pu2Tmp = (u16 *)pOut;
989 			*pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E);
990 		}
991 		break;
992 	case TYPE_EFUSE_MAP_LEN:
993 		{
994 			u16 *pu2Tmp;
995 			pu2Tmp = (u16 *)pOut;
996 			*pu2Tmp = (u16)EFUSE_MAP_LEN_88E;
997 		}
998 		break;
999 	case TYPE_EFUSE_PROTECT_BYTES_BANK:
1000 		{
1001 			u8 *pu1Tmp;
1002 			pu1Tmp = (u8 *)pOut;
1003 			*pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E);
1004 		}
1005 		break;
1006 	default:
1007 		{
1008 			u8 *pu1Tmp;
1009 			pu1Tmp = (u8 *)pOut;
1010 			*pu1Tmp = 0;
1011 		}
1012 		break;
1013 	}
1014 }
1015 
rtl8188e_EFUSE_GetEfuseDefinition(struct adapter * pAdapter,u8 efuseType,u8 type,void * pOut,bool bPseudoTest)1016 void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest)
1017 {
1018 	if (bPseudoTest)
1019 		Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut);
1020 	else
1021 		Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut);
1022 }
1023 
Hal_EfuseWordEnableDataWrite(struct adapter * pAdapter,u16 efuse_addr,u8 word_en,u8 * data,bool bPseudoTest)1024 static u8 Hal_EfuseWordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1025 {
1026 	u16	tmpaddr = 0;
1027 	u16	start_addr = efuse_addr;
1028 	u8 badworden = 0x0F;
1029 	u8 tmpdata[8];
1030 
1031 	memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE);
1032 
1033 	if (!(word_en & BIT(0))) {
1034 		tmpaddr = start_addr;
1035 		efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest);
1036 		efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest);
1037 
1038 		efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest);
1039 		efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[1], bPseudoTest);
1040 		if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
1041 			badworden &= (~BIT(0));
1042 	}
1043 	if (!(word_en & BIT(1))) {
1044 		tmpaddr = start_addr;
1045 		efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest);
1046 		efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest);
1047 
1048 		efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2], bPseudoTest);
1049 		efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[3], bPseudoTest);
1050 		if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
1051 			badworden &= (~BIT(1));
1052 	}
1053 	if (!(word_en & BIT(2))) {
1054 		tmpaddr = start_addr;
1055 		efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest);
1056 		efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest);
1057 
1058 		efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest);
1059 		efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[5], bPseudoTest);
1060 		if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
1061 			badworden &= (~BIT(2));
1062 	}
1063 	if (!(word_en & BIT(3))) {
1064 		tmpaddr = start_addr;
1065 		efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest);
1066 		efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest);
1067 
1068 		efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest);
1069 		efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[7], bPseudoTest);
1070 		if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
1071 			badworden &= (~BIT(3));
1072 	}
1073 	return badworden;
1074 }
1075 
Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter * pAdapter,u16 efuse_addr,u8 word_en,u8 * data,bool bPseudoTest)1076 static u8 Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1077 {
1078 	u8 ret;
1079 
1080 	ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1081 	return ret;
1082 }
1083 
rtl8188e_Efuse_WordEnableDataWrite(struct adapter * pAdapter,u16 efuse_addr,u8 word_en,u8 * data,bool bPseudoTest)1084 static u8 rtl8188e_Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest)
1085 {
1086 	u8 ret = 0;
1087 
1088 	if (bPseudoTest)
1089 		ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1090 	else
1091 		ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1092 	return ret;
1093 }
1094 
hal_EfuseGetCurrentSize_8188e(struct adapter * pAdapter,bool bPseudoTest)1095 static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoTest)
1096 {
1097 	int	bContinual = true;
1098 	u16	efuse_addr = 0;
1099 	u8 hworden = 0;
1100 	u8 efuse_data, word_cnts = 0;
1101 
1102 	if (bPseudoTest)
1103 		efuse_addr = (u16)(fakeEfuseUsedBytes);
1104 	else
1105 		GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1106 
1107 	while (bContinual &&
1108 	       efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) &&
1109 	       AVAILABLE_EFUSE_ADDR(efuse_addr)) {
1110 		if (efuse_data != 0xFF) {
1111 			if ((efuse_data & 0x1F) == 0x0F) {		/* extended header */
1112 				efuse_addr++;
1113 				efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
1114 				if ((efuse_data & 0x0F) == 0x0F) {
1115 					efuse_addr++;
1116 					continue;
1117 				} else {
1118 					hworden = efuse_data & 0x0F;
1119 				}
1120 			} else {
1121 				hworden =  efuse_data & 0x0F;
1122 			}
1123 			word_cnts = Efuse_CalculateWordCnts(hworden);
1124 			/* read next header */
1125 			efuse_addr = efuse_addr + (word_cnts * 2) + 1;
1126 		} else {
1127 			bContinual = false;
1128 		}
1129 	}
1130 
1131 	if (bPseudoTest)
1132 		fakeEfuseUsedBytes = efuse_addr;
1133 	else
1134 		SetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
1135 
1136 	return efuse_addr;
1137 }
1138 
Hal_EfuseGetCurrentSize_Pseudo(struct adapter * pAdapter,bool bPseudoTest)1139 static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudoTest)
1140 {
1141 	u16	ret = 0;
1142 
1143 	ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1144 	return ret;
1145 }
1146 
rtl8188e_EfuseGetCurrentSize(struct adapter * pAdapter,u8 efuseType,bool bPseudoTest)1147 u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest)
1148 {
1149 	u16	ret = 0;
1150 
1151 	if (bPseudoTest)
1152 		ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest);
1153 	else
1154 		ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest);
1155 	return ret;
1156 }
1157 
hal_EfusePgPacketRead_8188e(struct adapter * pAdapter,u8 offset,u8 * data,bool bPseudoTest)1158 static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1159 {
1160 	u8 ReadState = PG_STATE_HEADER;
1161 	int	bContinual = true;
1162 	int	bDataEmpty = true;
1163 	u8 efuse_data, word_cnts = 0;
1164 	u16	efuse_addr = 0;
1165 	u8 hoffset = 0, hworden = 0;
1166 	u8 tmpidx = 0;
1167 	u8 tmpdata[8];
1168 	u8 max_section = 0;
1169 	u8 tmp_header = 0;
1170 
1171 	rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
1172 
1173 	if (!data)
1174 		return false;
1175 	if (offset > max_section)
1176 		return false;
1177 
1178 	memset((void *)data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE);
1179 	memset((void *)tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE);
1180 
1181 	/*  <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
1182 	/*  Skip dummy parts to prevent unexpected data read from Efuse. */
1183 	/*  By pass right now. 2009.02.19. */
1184 	while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) {
1185 		/*   Header Read ------------- */
1186 		if (ReadState & PG_STATE_HEADER) {
1187 			if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
1188 				if (EXT_HEADER(efuse_data)) {
1189 					tmp_header = efuse_data;
1190 					efuse_addr++;
1191 					efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
1192 					if (!ALL_WORDS_DISABLED(efuse_data)) {
1193 						hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1194 						hworden = efuse_data & 0x0F;
1195 					} else {
1196 						DBG_88E("Error, All words disabled\n");
1197 						efuse_addr++;
1198 						continue;
1199 					}
1200 				} else {
1201 					hoffset = (efuse_data >> 4) & 0x0F;
1202 					hworden =  efuse_data & 0x0F;
1203 				}
1204 				word_cnts = Efuse_CalculateWordCnts(hworden);
1205 				bDataEmpty = true;
1206 
1207 				if (hoffset == offset) {
1208 					for (tmpidx = 0; tmpidx < word_cnts * 2; tmpidx++) {
1209 						if (efuse_OneByteRead(pAdapter, efuse_addr + 1 + tmpidx, &efuse_data, bPseudoTest)) {
1210 							tmpdata[tmpidx] = efuse_data;
1211 							if (efuse_data != 0xff)
1212 								bDataEmpty = false;
1213 						}
1214 					}
1215 					if (!bDataEmpty) {
1216 						ReadState = PG_STATE_DATA;
1217 					} else {/* read next header */
1218 						efuse_addr = efuse_addr + (word_cnts * 2) + 1;
1219 						ReadState = PG_STATE_HEADER;
1220 					}
1221 				} else {/* read next header */
1222 					efuse_addr = efuse_addr + (word_cnts * 2) + 1;
1223 					ReadState = PG_STATE_HEADER;
1224 				}
1225 			} else {
1226 				bContinual = false;
1227 			}
1228 		} else if (ReadState & PG_STATE_DATA) {
1229 		/*   Data section Read ------------- */
1230 			efuse_WordEnableDataRead(hworden, tmpdata, data);
1231 			efuse_addr = efuse_addr + (word_cnts * 2) + 1;
1232 			ReadState = PG_STATE_HEADER;
1233 		}
1234 
1235 	}
1236 
1237 	if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff)  && (data[3] == 0xff) &&
1238 	    (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff)  && (data[7] == 0xff))
1239 		return false;
1240 	else
1241 		return true;
1242 }
1243 
Hal_EfusePgPacketRead(struct adapter * pAdapter,u8 offset,u8 * data,bool bPseudoTest)1244 static int Hal_EfusePgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1245 {
1246 	int	ret;
1247 
1248 	ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
1249 	return ret;
1250 }
1251 
Hal_EfusePgPacketRead_Pseudo(struct adapter * pAdapter,u8 offset,u8 * data,bool bPseudoTest)1252 static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1253 {
1254 	int	ret;
1255 
1256 	ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest);
1257 	return ret;
1258 }
1259 
rtl8188e_Efuse_PgPacketRead(struct adapter * pAdapter,u8 offset,u8 * data,bool bPseudoTest)1260 int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
1261 {
1262 	int	ret;
1263 
1264 	if (bPseudoTest)
1265 		ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest);
1266 	else
1267 		ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest);
1268 	return ret;
1269 }
1270 
hal_EfuseFixHeaderProcess(struct adapter * pAdapter,u8 efuseType,struct pgpkt * pFixPkt,u16 * pAddr,bool bPseudoTest)1271 static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr, bool bPseudoTest)
1272 {
1273 	u8 originaldata[8], badworden = 0;
1274 	u16	efuse_addr = *pAddr;
1275 	u32	PgWriteSuccess = 0;
1276 
1277 	memset((void *)originaldata, 0xff, 8);
1278 
1279 	if (rtl8188e_Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) {
1280 		/* check if data exist */
1281 		badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest);
1282 
1283 		if (badworden != 0xf) {	/*  write fail */
1284 			PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
1285 
1286 			if (!PgWriteSuccess)
1287 				return false;
1288 			else
1289 				efuse_addr = rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest);
1290 		} else {
1291 			efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1;
1292 		}
1293 	} else {
1294 		efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1;
1295 	}
1296 	*pAddr = efuse_addr;
1297 	return true;
1298 }
1299 
hal_EfusePgPacketWrite2ByteHeader(struct adapter * pAdapter,u8 efuseType,u16 * pAddr,struct pgpkt * pTargetPkt,bool bPseudoTest)1300 static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1301 {
1302 	bool bRet = false;
1303 	u16	efuse_addr = *pAddr, efuse_max_available_len = 0;
1304 	u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
1305 	u8 repeatcnt = 0;
1306 
1307 	rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
1308 
1309 	while (efuse_addr < efuse_max_available_len) {
1310 		pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
1311 		efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1312 		efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1313 
1314 		while (tmp_header == 0xFF) {
1315 			if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1316 				return false;
1317 
1318 			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1319 			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1320 		}
1321 
1322 		/* to write ext_header */
1323 		if (tmp_header == pg_header) {
1324 			efuse_addr++;
1325 			pg_header_temp = pg_header;
1326 			pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
1327 
1328 			efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1329 			efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1330 
1331 			while (tmp_header == 0xFF) {
1332 				if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1333 					return false;
1334 
1335 				efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1336 				efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1337 			}
1338 
1339 			if ((tmp_header & 0x0F) == 0x0F) {	/* word_en PG fail */
1340 				if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
1341 					return false;
1342 				} else {
1343 					efuse_addr++;
1344 					continue;
1345 				}
1346 			} else if (pg_header != tmp_header) {	/* offset PG fail */
1347 				struct pgpkt	fixPkt;
1348 				fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
1349 				fixPkt.word_en = tmp_header & 0x0F;
1350 				fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
1351 				if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
1352 					return false;
1353 			} else {
1354 				bRet = true;
1355 				break;
1356 			}
1357 		} else if ((tmp_header & 0x1F) == 0x0F) {		/* wrong extended header */
1358 			efuse_addr += 2;
1359 			continue;
1360 		}
1361 	}
1362 
1363 	*pAddr = efuse_addr;
1364 	return bRet;
1365 }
1366 
hal_EfusePgPacketWrite1ByteHeader(struct adapter * pAdapter,u8 efuseType,u16 * pAddr,struct pgpkt * pTargetPkt,bool bPseudoTest)1367 static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1368 {
1369 	bool bRet = false;
1370 	u8 pg_header = 0, tmp_header = 0;
1371 	u16	efuse_addr = *pAddr;
1372 	u8 repeatcnt = 0;
1373 
1374 	pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
1375 
1376 	efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1377 	efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1378 
1379 	while (tmp_header == 0xFF) {
1380 		if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
1381 			return false;
1382 		efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
1383 		efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
1384 	}
1385 
1386 	if (pg_header == tmp_header) {
1387 		bRet = true;
1388 	} else {
1389 		struct pgpkt	fixPkt;
1390 		fixPkt.offset = (tmp_header >> 4) & 0x0F;
1391 		fixPkt.word_en = tmp_header & 0x0F;
1392 		fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
1393 		if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest))
1394 			return false;
1395 	}
1396 
1397 	*pAddr = efuse_addr;
1398 	return bRet;
1399 }
1400 
hal_EfusePgPacketWriteData(struct adapter * pAdapter,u8 efuseType,u16 * pAddr,struct pgpkt * pTargetPkt,bool bPseudoTest)1401 static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1402 {
1403 	u16	efuse_addr = *pAddr;
1404 	u8 badworden;
1405 	u32	PgWriteSuccess = 0;
1406 
1407 	badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
1408 	if (badworden == 0x0F) {
1409 		/*  write ok */
1410 		return true;
1411 	} else {
1412 		/* reorganize other pg packet */
1413 		PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
1414 		if (!PgWriteSuccess)
1415 			return false;
1416 		else
1417 			return true;
1418 	}
1419 }
1420 
1421 static bool
hal_EfusePgPacketWriteHeader(struct adapter * pAdapter,u8 efuseType,u16 * pAddr,struct pgpkt * pTargetPkt,bool bPseudoTest)1422 hal_EfusePgPacketWriteHeader(
1423 				struct adapter *pAdapter,
1424 				u8 efuseType,
1425 				u16				*pAddr,
1426 				struct pgpkt *pTargetPkt,
1427 				bool bPseudoTest)
1428 {
1429 	bool bRet = false;
1430 
1431 	if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
1432 		bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1433 	else
1434 		bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1435 
1436 	return bRet;
1437 }
1438 
wordEnMatched(struct pgpkt * pTargetPkt,struct pgpkt * pCurPkt,u8 * pWden)1439 static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
1440 			  u8 *pWden)
1441 {
1442 	u8 match_word_en = 0x0F;	/*  default all words are disabled */
1443 
1444 	/*  check if the same words are enabled both target and current PG packet */
1445 	if (((pTargetPkt->word_en & BIT(0)) == 0) &&
1446 	    ((pCurPkt->word_en & BIT(0)) == 0))
1447 		match_word_en &= ~BIT(0);				/*  enable word 0 */
1448 	if (((pTargetPkt->word_en & BIT(1)) == 0) &&
1449 	    ((pCurPkt->word_en & BIT(1)) == 0))
1450 		match_word_en &= ~BIT(1);				/*  enable word 1 */
1451 	if (((pTargetPkt->word_en & BIT(2)) == 0) &&
1452 	    ((pCurPkt->word_en & BIT(2)) == 0))
1453 		match_word_en &= ~BIT(2);				/*  enable word 2 */
1454 	if (((pTargetPkt->word_en & BIT(3)) == 0) &&
1455 	    ((pCurPkt->word_en & BIT(3)) == 0))
1456 		match_word_en &= ~BIT(3);				/*  enable word 3 */
1457 
1458 	*pWden = match_word_en;
1459 
1460 	if (match_word_en != 0xf)
1461 		return true;
1462 	else
1463 		return false;
1464 }
1465 
hal_EfuseCheckIfDatafollowed(struct adapter * pAdapter,u8 word_cnts,u16 startAddr,bool bPseudoTest)1466 static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr, bool bPseudoTest)
1467 {
1468 	bool bRet = false;
1469 	u8 i, efuse_data;
1470 
1471 	for (i = 0; i < (word_cnts * 2); i++) {
1472 		if (efuse_OneByteRead(pAdapter, (startAddr + i), &efuse_data, bPseudoTest) && (efuse_data != 0xFF))
1473 			bRet = true;
1474 	}
1475 	return bRet;
1476 }
1477 
hal_EfusePartialWriteCheck(struct adapter * pAdapter,u8 efuseType,u16 * pAddr,struct pgpkt * pTargetPkt,bool bPseudoTest)1478 static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
1479 {
1480 	bool bRet = false;
1481 	u8 i, efuse_data = 0, cur_header = 0;
1482 	u8 matched_wden = 0, badworden = 0;
1483 	u16	startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
1484 	struct pgpkt curPkt;
1485 
1486 	rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
1487 	rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest);
1488 
1489 	if (efuseType == EFUSE_WIFI) {
1490 		if (bPseudoTest) {
1491 			startAddr = (u16)(fakeEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN);
1492 		} else {
1493 			GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
1494 			startAddr %= EFUSE_REAL_CONTENT_LEN;
1495 		}
1496 	} else {
1497 		if (bPseudoTest)
1498 			startAddr = (u16)(fakeBTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN);
1499 		else
1500 			startAddr = (u16)(BTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN);
1501 	}
1502 
1503 	while (1) {
1504 		if (startAddr >= efuse_max_available_len) {
1505 			bRet = false;
1506 			break;
1507 		}
1508 
1509 		if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) {
1510 			if (EXT_HEADER(efuse_data)) {
1511 				cur_header = efuse_data;
1512 				startAddr++;
1513 				efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest);
1514 				if (ALL_WORDS_DISABLED(efuse_data)) {
1515 					bRet = false;
1516 					break;
1517 				} else {
1518 					curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
1519 					curPkt.word_en = efuse_data & 0x0F;
1520 				}
1521 			} else {
1522 				cur_header  =  efuse_data;
1523 				curPkt.offset = (cur_header >> 4) & 0x0F;
1524 				curPkt.word_en = cur_header & 0x0F;
1525 			}
1526 
1527 			curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
1528 			/*  if same header is found but no data followed */
1529 			/*  write some part of data followed by the header. */
1530 			if ((curPkt.offset == pTargetPkt->offset) &&
1531 			    (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1, bPseudoTest)) &&
1532 			    wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
1533 				/*  Here to write partial data */
1534 				badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest);
1535 				if (badworden != 0x0F) {
1536 					u32	PgWriteSuccess = 0;
1537 					/*  if write fail on some words, write these bad words again */
1538 
1539 					PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
1540 
1541 					if (!PgWriteSuccess) {
1542 						bRet = false;	/*  write fail, return */
1543 						break;
1544 					}
1545 				}
1546 				/*  partial write ok, update the target packet for later use */
1547 				for (i = 0; i < 4; i++) {
1548 					if ((matched_wden & (0x1 << i)) == 0)	/*  this word has been written */
1549 						pTargetPkt->word_en |= (0x1 << i);	/*  disable the word */
1550 				}
1551 				pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
1552 			}
1553 			/*  read from next header */
1554 			startAddr = startAddr + (curPkt.word_cnts * 2) + 1;
1555 		} else {
1556 			/*  not used header, 0xff */
1557 			*pAddr = startAddr;
1558 			bRet = true;
1559 			break;
1560 		}
1561 	}
1562 	return bRet;
1563 }
1564 
1565 static bool
hal_EfusePgCheckAvailableAddr(struct adapter * pAdapter,u8 efuseType,bool bPseudoTest)1566 hal_EfusePgCheckAvailableAddr(
1567 		struct adapter *pAdapter,
1568 		u8 efuseType,
1569 		bool bPseudoTest
1570 	)
1571 {
1572 	u16	efuse_max_available_len = 0;
1573 
1574 	/* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */
1575 	rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false);
1576 
1577 	if (rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
1578 		return false;
1579 	return true;
1580 }
1581 
hal_EfuseConstructPGPkt(u8 offset,u8 word_en,u8 * pData,struct pgpkt * pTargetPkt)1582 static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt)
1583 {
1584 	memset((void *)pTargetPkt->data, 0xFF, sizeof(u8) * 8);
1585 	pTargetPkt->offset = offset;
1586 	pTargetPkt->word_en = word_en;
1587 	efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
1588 	pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
1589 }
1590 
hal_EfusePgPacketWrite_8188e(struct adapter * pAdapter,u8 offset,u8 word_en,u8 * pData,bool bPseudoTest)1591 static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest)
1592 {
1593 	struct pgpkt	targetPkt;
1594 	u16			startAddr = 0;
1595 	u8 efuseType = EFUSE_WIFI;
1596 
1597 	if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
1598 		return false;
1599 
1600 	hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
1601 
1602 	if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1603 		return false;
1604 
1605 	if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1606 		return false;
1607 
1608 	if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1609 		return false;
1610 
1611 	return true;
1612 }
1613 
Hal_EfusePgPacketWrite_Pseudo(struct adapter * pAdapter,u8 offset,u8 word_en,u8 * data,bool bPseudoTest)1614 static int Hal_EfusePgPacketWrite_Pseudo(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1615 {
1616 	int ret;
1617 
1618 	ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
1619 	return ret;
1620 }
1621 
Hal_EfusePgPacketWrite(struct adapter * pAdapter,u8 offset,u8 word_en,u8 * data,bool bPseudoTest)1622 static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1623 {
1624 	int	ret = 0;
1625 	ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest);
1626 
1627 	return ret;
1628 }
1629 
rtl8188e_Efuse_PgPacketWrite(struct adapter * pAdapter,u8 offset,u8 word_en,u8 * data,bool bPseudoTest)1630 int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
1631 {
1632 	int	ret;
1633 
1634 	if (bPseudoTest)
1635 		ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest);
1636 	else
1637 		ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
1638 	return ret;
1639 }
1640 
rtl8188e_read_chip_version(struct adapter * padapter)1641 void rtl8188e_read_chip_version(struct adapter *padapter)
1642 {
1643 	u32				value32;
1644 	struct HAL_VERSION		ChipVersion;
1645 	struct hal_data_8188e	*pHalData;
1646 
1647 	pHalData = GET_HAL_DATA(padapter);
1648 
1649 	value32 = rtw_read32(padapter, REG_SYS_CFG);
1650 	ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
1651 
1652 	ChipVersion.RFType = RF_TYPE_1T1R;
1653 	ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
1654 	ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */
1655 	ChipVersion.ROMVer = 0;	/*  ROM code version. */
1656 
1657 	dump_chip_info(ChipVersion);
1658 
1659 	pHalData->VersionID = ChipVersion;
1660 
1661 	pHalData->rf_type = RF_1T1R;
1662 
1663 	MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
1664 }
1665 
rtl8188e_SetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,bool bSet)1666 void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
1667 {
1668 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(Adapter);
1669 	struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
1670 	switch (eVariable) {
1671 	case HAL_ODM_STA_INFO:
1672 		{
1673 			struct sta_info *psta = (struct sta_info *)pValue1;
1674 
1675 			if (bSet) {
1676 				DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
1677 				podmpriv->pODM_StaInfo[psta->mac_id] = psta;
1678 				ODM_RAInfo_Init(podmpriv, psta->mac_id);
1679 			} else {
1680 				DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
1681 				podmpriv->pODM_StaInfo[psta->mac_id] = NULL;
1682 		       }
1683 		}
1684 		break;
1685 	case HAL_ODM_P2P_STATE:
1686 			ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
1687 		break;
1688 	case HAL_ODM_WIFI_DISPLAY_STATE:
1689 			ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
1690 		break;
1691 	default:
1692 		break;
1693 	}
1694 }
1695 
hal_notch_filter_8188e(struct adapter * adapter,bool enable)1696 void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
1697 {
1698 	if (enable) {
1699 		DBG_88E("Enable notch filter\n");
1700 		rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
1701 	} else {
1702 		DBG_88E("Disable notch filter\n");
1703 		rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
1704 	}
1705 }
1706 
GetEEPROMSize8188E(struct adapter * padapter)1707 u8 GetEEPROMSize8188E(struct adapter *padapter)
1708 {
1709 	u8 size = 0;
1710 	u32	cr;
1711 
1712 	cr = rtw_read16(padapter, REG_9346CR);
1713 	/*  6: EEPROM used is 93C46, 4: boot from E-Fuse. */
1714 	size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
1715 
1716 	MSG_88E("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46");
1717 
1718 	return size;
1719 }
1720 
1721 /*  */
1722 /*  */
1723 /*  LLT R/W/Init function */
1724 /*  */
1725 /*  */
_LLTWrite(struct adapter * padapter,u32 address,u32 data)1726 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
1727 {
1728 	s32	status = _SUCCESS;
1729 	s32	count = 0;
1730 	u32	value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
1731 	u16	LLTReg = REG_LLT_INIT;
1732 
1733 	rtw_write32(padapter, LLTReg, value);
1734 
1735 	/* polling */
1736 	do {
1737 		value = rtw_read32(padapter, LLTReg);
1738 		if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
1739 			break;
1740 
1741 		if (count > POLLING_LLT_THRESHOLD) {
1742 			status = _FAIL;
1743 			break;
1744 		}
1745 	} while (count++);
1746 
1747 	return status;
1748 }
1749 
InitLLTTable(struct adapter * padapter,u8 txpktbuf_bndy)1750 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
1751 {
1752 	s32	status = _FAIL;
1753 	u32	i;
1754 	u32	Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/*  176, 22k */
1755 
1756 	if (rtw_IOL_applied(padapter)) {
1757 		status = iol_InitLLTTable(padapter, txpktbuf_bndy);
1758 	} else {
1759 		for (i = 0; i < (txpktbuf_bndy - 1); i++) {
1760 			status = _LLTWrite(padapter, i, i + 1);
1761 			if (_SUCCESS != status)
1762 				return status;
1763 		}
1764 
1765 		/*  end of list */
1766 		status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
1767 		if (_SUCCESS != status)
1768 			return status;
1769 
1770 		/*  Make the other pages as ring buffer */
1771 		/*  This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
1772 		/*  Otherwise used as local loopback buffer. */
1773 		for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
1774 			status = _LLTWrite(padapter, i, (i + 1));
1775 			if (_SUCCESS != status)
1776 				return status;
1777 		}
1778 
1779 		/*  Let last entry point to the start entry of ring buffer */
1780 		status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
1781 		if (_SUCCESS != status) {
1782 			return status;
1783 		}
1784 	}
1785 
1786 	return status;
1787 }
1788 
1789 void
Hal_InitPGData88E(struct adapter * padapter)1790 Hal_InitPGData88E(struct adapter *padapter)
1791 {
1792 	struct eeprom_priv *pEEPROM = &padapter->eeprompriv;
1793 
1794 	if (!pEEPROM->bautoload_fail_flag) { /*  autoload OK. */
1795 		if (!is_boot_from_eeprom(padapter)) {
1796 			/*  Read EFUSE real map to shadow. */
1797 			EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
1798 		}
1799 	} else {/* autoload fail */
1800 		/* update to default value 0xFF */
1801 		if (!is_boot_from_eeprom(padapter))
1802 			EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false);
1803 	}
1804 }
1805 
1806 void
Hal_EfuseParseIDCode88E(struct adapter * padapter,u8 * hwinfo)1807 Hal_EfuseParseIDCode88E(
1808 		struct adapter *padapter,
1809 		u8 *hwinfo
1810 	)
1811 {
1812 	struct eeprom_priv *pEEPROM = &padapter->eeprompriv;
1813 	u16			EEPROMId;
1814 
1815 	/*  Check 0x8129 again for making sure autoload status!! */
1816 	EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
1817 	if (EEPROMId != RTL_EEPROM_ID) {
1818 		pr_err("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
1819 		pEEPROM->bautoload_fail_flag = true;
1820 	} else {
1821 		pEEPROM->bautoload_fail_flag = false;
1822 	}
1823 
1824 	pr_info("EEPROM ID = 0x%04x\n", EEPROMId);
1825 }
1826 
Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g * pwrInfo24G,u8 * PROMContent,bool AutoLoadFail)1827 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
1828 {
1829 	u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
1830 
1831 	memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
1832 
1833 	if (AutoLoadFail) {
1834 		for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) {
1835 			/* 2.4G default value */
1836 			for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
1837 				pwrInfo24G->IndexCCK_Base[rfPath][group] =	EEPROM_DEFAULT_24G_INDEX;
1838 				pwrInfo24G->IndexBW40_Base[rfPath][group] =	EEPROM_DEFAULT_24G_INDEX;
1839 			}
1840 			for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
1841 				if (TxCount == 0) {
1842 					pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
1843 					pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
1844 				} else {
1845 					pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
1846 					pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
1847 					pwrInfo24G->CCK_Diff[rfPath][TxCount] =	EEPROM_DEFAULT_DIFF;
1848 					pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
1849 				}
1850 			}
1851 		}
1852 		return;
1853 	}
1854 
1855 	for (rfPath = 0; rfPath < RF_PATH_MAX; rfPath++) {
1856 		/* 2.4G default value */
1857 		for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
1858 			pwrInfo24G->IndexCCK_Base[rfPath][group] =	PROMContent[eeAddr++];
1859 			if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
1860 				pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
1861 		}
1862 		for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) {
1863 			pwrInfo24G->IndexBW40_Base[rfPath][group] =	PROMContent[eeAddr++];
1864 			if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
1865 				pwrInfo24G->IndexBW40_Base[rfPath][group] =	EEPROM_DEFAULT_24G_INDEX;
1866 		}
1867 		for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
1868 			if (TxCount == 0) {
1869 				pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
1870 				if (PROMContent[eeAddr] == 0xFF) {
1871 					pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
1872 				} else {
1873 					pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4;
1874 					if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1875 						pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
1876 				}
1877 
1878 				if (PROMContent[eeAddr] == 0xFF) {
1879 					pwrInfo24G->OFDM_Diff[rfPath][TxCount] =	EEPROM_DEFAULT_24G_OFDM_DIFF;
1880 				} else {
1881 					pwrInfo24G->OFDM_Diff[rfPath][TxCount] =	(PROMContent[eeAddr] & 0x0f);
1882 					if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1883 						pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
1884 				}
1885 				pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
1886 				eeAddr++;
1887 			} else {
1888 				if (PROMContent[eeAddr] == 0xFF) {
1889 					pwrInfo24G->BW40_Diff[rfPath][TxCount] =	EEPROM_DEFAULT_DIFF;
1890 				} else {
1891 					pwrInfo24G->BW40_Diff[rfPath][TxCount] =	(PROMContent[eeAddr] & 0xf0) >> 4;
1892 					if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1893 						pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
1894 				}
1895 
1896 				if (PROMContent[eeAddr] == 0xFF) {
1897 					pwrInfo24G->BW20_Diff[rfPath][TxCount] =	EEPROM_DEFAULT_DIFF;
1898 				} else {
1899 					pwrInfo24G->BW20_Diff[rfPath][TxCount] =	(PROMContent[eeAddr] & 0x0f);
1900 					if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1901 						pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
1902 				}
1903 				eeAddr++;
1904 
1905 				if (PROMContent[eeAddr] == 0xFF) {
1906 					pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
1907 				} else {
1908 					pwrInfo24G->OFDM_Diff[rfPath][TxCount] =	(PROMContent[eeAddr] & 0xf0) >> 4;
1909 					if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1910 						pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
1911 				}
1912 
1913 				if (PROMContent[eeAddr] == 0xFF) {
1914 					pwrInfo24G->CCK_Diff[rfPath][TxCount] =	EEPROM_DEFAULT_DIFF;
1915 				} else {
1916 					pwrInfo24G->CCK_Diff[rfPath][TxCount] =	(PROMContent[eeAddr] & 0x0f);
1917 					if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3))		/* 4bit sign number to 8 bit sign number */
1918 						pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
1919 				}
1920 				eeAddr++;
1921 			}
1922 		}
1923 	}
1924 }
1925 
hal_get_chnl_group_88e(u8 chnl,u8 * group)1926 static void hal_get_chnl_group_88e(u8 chnl, u8 *group)
1927 {
1928 	if (chnl < 3)			/*  Channel 1-2 */
1929 		*group = 0;
1930 	else if (chnl < 6)		/*  Channel 3-5 */
1931 		*group = 1;
1932 	else if (chnl < 9)		/*  Channel 6-8 */
1933 		*group = 2;
1934 	else if (chnl < 12)		/*  Channel 9-11 */
1935 		*group = 3;
1936 	else if (chnl < 14)		/*  Channel 12-13 */
1937 		*group = 4;
1938 	else if (chnl == 14)		/*  Channel 14 */
1939 		*group = 5;
1940 }
1941 
Hal_ReadPowerSavingMode88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)1942 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
1943 {
1944 	if (AutoLoadFail) {
1945 		padapter->pwrctrlpriv.bHWPowerdown = false;
1946 		padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
1947 	} else {
1948 		/* hw power down mode selection , 0:rf-off / 1:power down */
1949 
1950 		if (padapter->registrypriv.hwpdn_mode == 2)
1951 			padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
1952 		else
1953 			padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
1954 
1955 		/*  decide hw if support remote wakeup function */
1956 		/*  if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
1957 		padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
1958 
1959 		DBG_88E("%s...bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
1960 			padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup);
1961 
1962 		DBG_88E("### PS params =>  power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
1963 	}
1964 }
1965 
Hal_ReadTxPowerInfo88E(struct adapter * padapter,u8 * PROMContent,bool AutoLoadFail)1966 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
1967 {
1968 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(padapter);
1969 	struct txpowerinfo24g pwrInfo24G;
1970 	u8 rfPath = 0;
1971 	u8 ch, group;
1972 	u8 TxCount;
1973 
1974 	Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
1975 
1976 	if (!AutoLoadFail)
1977 		pHalData->bTXPowerDataReadFromEEPORM = true;
1978 
1979 	for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
1980 		hal_get_chnl_group_88e(ch, &group);
1981 
1982 		pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
1983 		if (ch == 14)
1984 			pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
1985 		else
1986 			pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
1987 
1988 		DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
1989 		DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]);
1990 		DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]);
1991 	}
1992 	for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
1993 		pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
1994 		pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
1995 		pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
1996 		pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
1997 		DBG_88E("======= TxCount %d =======\n", TxCount);
1998 		DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
1999 		DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
2000 		DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
2001 		DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
2002 	}
2003 
2004 	/*  2010/10/19 MH Add Regulator recognize for CU. */
2005 	if (!AutoLoadFail) {
2006 		pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x7);	/* bit0~2 */
2007 		if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
2008 			pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7);	/* bit0~2 */
2009 	} else {
2010 		pHalData->EEPROMRegulatory = 0;
2011 	}
2012 	DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
2013 }
2014 
Hal_EfuseParseXtal_8188E(struct adapter * pAdapter,u8 * hwinfo,bool AutoLoadFail)2015 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
2016 {
2017 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(pAdapter);
2018 
2019 	if (!AutoLoadFail) {
2020 		pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
2021 		if (pHalData->CrystalCap == 0xFF)
2022 			pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
2023 	} else {
2024 		pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
2025 	}
2026 	DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
2027 }
2028 
Hal_EfuseParseBoardType88E(struct adapter * pAdapter,u8 * hwinfo,bool AutoLoadFail)2029 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
2030 {
2031 	struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
2032 
2033 	if (!AutoLoadFail)
2034 		pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E] & 0xE0) >> 5);
2035 	else
2036 		pHalData->BoardType = 0;
2037 	DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
2038 }
2039 
Hal_EfuseParseEEPROMVer88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)2040 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2041 {
2042 	struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
2043 
2044 	if (!AutoLoadFail) {
2045 		pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
2046 		if (pHalData->EEPROMVersion == 0xFF)
2047 			pHalData->EEPROMVersion = EEPROM_Default_Version;
2048 	} else {
2049 		pHalData->EEPROMVersion = 1;
2050 	}
2051 }
2052 
rtl8188e_EfuseParseChnlPlan(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)2053 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2054 {
2055 	padapter->mlmepriv.ChannelPlan =
2056 		 hal_com_get_channel_plan(padapter,
2057 					  hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
2058 					  padapter->registrypriv.channel_plan,
2059 					  RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
2060 
2061 	DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
2062 }
2063 
Hal_EfuseParseCustomerID88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)2064 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
2065 {
2066 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(padapter);
2067 
2068 	if (!AutoLoadFail) {
2069 		pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
2070 	} else {
2071 		pHalData->EEPROMCustomerID = 0;
2072 		pHalData->EEPROMSubCustomerID = 0;
2073 	}
2074 	DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
2075 }
2076 
Hal_ReadAntennaDiversity88E(struct adapter * pAdapter,u8 * PROMContent,bool AutoLoadFail)2077 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
2078 {
2079 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(pAdapter);
2080 	struct registry_priv	*registry_par = &pAdapter->registrypriv;
2081 
2082 	if (!AutoLoadFail) {
2083 		/*  Antenna Diversity setting. */
2084 		if (registry_par->antdiv_cfg == 2) { /*  2:By EFUSE */
2085 			pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x18) >> 3;
2086 			if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
2087 				pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION & 0x18) >> 3;
2088 		} else {
2089 			pHalData->AntDivCfg = registry_par->antdiv_cfg;  /*  0:OFF , 1:ON, 2:By EFUSE */
2090 		}
2091 
2092 		if (registry_par->antdiv_type == 0) {
2093 			/* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
2094 			pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
2095 			if (pHalData->TRxAntDivType == 0xFF)
2096 				pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /*  For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
2097 		} else {
2098 			pHalData->TRxAntDivType = registry_par->antdiv_type;
2099 		}
2100 
2101 		if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
2102 			pHalData->AntDivCfg = 1; /*  0xC1[3] is ignored. */
2103 	} else {
2104 		pHalData->AntDivCfg = 0;
2105 	}
2106 	DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
2107 }
2108 
Hal_ReadThermalMeter_88E(struct adapter * Adapter,u8 * PROMContent,bool AutoloadFail)2109 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
2110 {
2111 	struct hal_data_8188e	*pHalData = GET_HAL_DATA(Adapter);
2112 
2113 	/*  ThermalMeter from EEPROM */
2114 	if (!AutoloadFail)
2115 		pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
2116 	else
2117 		pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
2118 
2119 	if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
2120 		pHalData->bAPKThermalMeterIgnore = true;
2121 		pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
2122 	}
2123 	DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
2124 }
2125