1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies. */
3
4 #include "dr_types.h"
5 #include "dr_ste.h"
6
7 enum dr_action_domain {
8 DR_ACTION_DOMAIN_NIC_INGRESS,
9 DR_ACTION_DOMAIN_NIC_EGRESS,
10 DR_ACTION_DOMAIN_FDB_INGRESS,
11 DR_ACTION_DOMAIN_FDB_EGRESS,
12 DR_ACTION_DOMAIN_MAX,
13 };
14
15 enum dr_action_valid_state {
16 DR_ACTION_STATE_ERR,
17 DR_ACTION_STATE_NO_ACTION,
18 DR_ACTION_STATE_ENCAP,
19 DR_ACTION_STATE_DECAP,
20 DR_ACTION_STATE_MODIFY_HDR,
21 DR_ACTION_STATE_POP_VLAN,
22 DR_ACTION_STATE_PUSH_VLAN,
23 DR_ACTION_STATE_NON_TERM,
24 DR_ACTION_STATE_TERM,
25 DR_ACTION_STATE_MAX,
26 };
27
28 static const char * const action_type_to_str[] = {
29 [DR_ACTION_TYP_TNL_L2_TO_L2] = "DR_ACTION_TYP_TNL_L2_TO_L2",
30 [DR_ACTION_TYP_L2_TO_TNL_L2] = "DR_ACTION_TYP_L2_TO_TNL_L2",
31 [DR_ACTION_TYP_TNL_L3_TO_L2] = "DR_ACTION_TYP_TNL_L3_TO_L2",
32 [DR_ACTION_TYP_L2_TO_TNL_L3] = "DR_ACTION_TYP_L2_TO_TNL_L3",
33 [DR_ACTION_TYP_DROP] = "DR_ACTION_TYP_DROP",
34 [DR_ACTION_TYP_QP] = "DR_ACTION_TYP_QP",
35 [DR_ACTION_TYP_FT] = "DR_ACTION_TYP_FT",
36 [DR_ACTION_TYP_CTR] = "DR_ACTION_TYP_CTR",
37 [DR_ACTION_TYP_TAG] = "DR_ACTION_TYP_TAG",
38 [DR_ACTION_TYP_MODIFY_HDR] = "DR_ACTION_TYP_MODIFY_HDR",
39 [DR_ACTION_TYP_VPORT] = "DR_ACTION_TYP_VPORT",
40 [DR_ACTION_TYP_POP_VLAN] = "DR_ACTION_TYP_POP_VLAN",
41 [DR_ACTION_TYP_PUSH_VLAN] = "DR_ACTION_TYP_PUSH_VLAN",
42 [DR_ACTION_TYP_SAMPLER] = "DR_ACTION_TYP_SAMPLER",
43 [DR_ACTION_TYP_INSERT_HDR] = "DR_ACTION_TYP_INSERT_HDR",
44 [DR_ACTION_TYP_REMOVE_HDR] = "DR_ACTION_TYP_REMOVE_HDR",
45 [DR_ACTION_TYP_MAX] = "DR_ACTION_UNKNOWN",
46 };
47
dr_action_id_to_str(enum mlx5dr_action_type action_id)48 static const char *dr_action_id_to_str(enum mlx5dr_action_type action_id)
49 {
50 if (action_id > DR_ACTION_TYP_MAX)
51 action_id = DR_ACTION_TYP_MAX;
52 return action_type_to_str[action_id];
53 }
54
55 static const enum dr_action_valid_state
56 next_action_state[DR_ACTION_DOMAIN_MAX][DR_ACTION_STATE_MAX][DR_ACTION_TYP_MAX] = {
57 [DR_ACTION_DOMAIN_NIC_INGRESS] = {
58 [DR_ACTION_STATE_NO_ACTION] = {
59 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
60 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
61 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
62 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
63 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM,
64 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
65 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
66 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
67 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
68 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
69 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
70 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
71 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
72 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
73 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
74 },
75 [DR_ACTION_STATE_DECAP] = {
76 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
77 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
78 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
79 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
80 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_DECAP,
81 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
82 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
83 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
84 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
85 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
86 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
87 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
88 },
89 [DR_ACTION_STATE_ENCAP] = {
90 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
91 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
92 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
93 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
94 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_ENCAP,
95 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
96 },
97 [DR_ACTION_STATE_MODIFY_HDR] = {
98 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
99 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
100 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
101 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
102 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_MODIFY_HDR,
103 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
104 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
105 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
106 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
107 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
108 },
109 [DR_ACTION_STATE_POP_VLAN] = {
110 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
111 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
112 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
113 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
114 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_POP_VLAN,
115 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
116 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
117 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
118 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
119 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
120 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
121 },
122 [DR_ACTION_STATE_PUSH_VLAN] = {
123 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
124 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
125 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
126 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_PUSH_VLAN,
127 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
128 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
129 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
130 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
131 },
132 [DR_ACTION_STATE_NON_TERM] = {
133 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
134 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
135 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
136 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
137 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM,
138 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
139 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
140 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
141 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
142 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
143 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
144 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
145 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
146 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
147 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
148 },
149 [DR_ACTION_STATE_TERM] = {
150 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
151 },
152 },
153 [DR_ACTION_DOMAIN_NIC_EGRESS] = {
154 [DR_ACTION_STATE_NO_ACTION] = {
155 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
156 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
157 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
158 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
159 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
160 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
161 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
162 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
163 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
164 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
165 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
166 },
167 [DR_ACTION_STATE_DECAP] = {
168 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
169 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
170 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
171 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
172 },
173 [DR_ACTION_STATE_ENCAP] = {
174 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
175 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
176 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
177 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
178 },
179 [DR_ACTION_STATE_MODIFY_HDR] = {
180 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
181 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
182 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
183 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
184 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
185 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
186 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
187 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
188 },
189 [DR_ACTION_STATE_POP_VLAN] = {
190 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
191 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
192 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
193 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
194 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
195 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
196 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
197 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
198 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
199 },
200 [DR_ACTION_STATE_PUSH_VLAN] = {
201 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
202 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
203 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
204 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
205 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
206 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
207 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
208 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
209 },
210 [DR_ACTION_STATE_NON_TERM] = {
211 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
212 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
213 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
214 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
215 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
216 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
217 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
218 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
219 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
220 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
221 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
222 },
223 [DR_ACTION_STATE_TERM] = {
224 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
225 },
226 },
227 [DR_ACTION_DOMAIN_FDB_INGRESS] = {
228 [DR_ACTION_STATE_NO_ACTION] = {
229 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
230 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
231 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
232 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
233 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
234 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
235 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
236 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
237 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
238 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
239 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
240 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
241 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
242 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
243 },
244 [DR_ACTION_STATE_DECAP] = {
245 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
246 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
247 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
248 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
249 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
250 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
251 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
252 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
253 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
254 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
255 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
256 },
257 [DR_ACTION_STATE_ENCAP] = {
258 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
259 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
260 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
261 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
262 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
263 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
264 },
265 [DR_ACTION_STATE_MODIFY_HDR] = {
266 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
267 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
268 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
269 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
270 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
271 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
272 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
273 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
274 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
275 },
276 [DR_ACTION_STATE_POP_VLAN] = {
277 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
278 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
279 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
280 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
281 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
282 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
283 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
284 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
285 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
286 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
287 },
288 [DR_ACTION_STATE_PUSH_VLAN] = {
289 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
290 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
291 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
292 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
293 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
294 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
295 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
296 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
297 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
298 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
299 },
300 [DR_ACTION_STATE_NON_TERM] = {
301 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
302 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
303 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
304 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
305 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
306 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
307 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
308 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
309 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
310 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
311 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
312 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
313 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
314 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
315 },
316 [DR_ACTION_STATE_TERM] = {
317 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
318 },
319 },
320 [DR_ACTION_DOMAIN_FDB_EGRESS] = {
321 [DR_ACTION_STATE_NO_ACTION] = {
322 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
323 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
324 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
325 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
326 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
327 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
328 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
329 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
330 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
331 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
332 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
333 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
334 },
335 [DR_ACTION_STATE_DECAP] = {
336 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
337 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
338 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
339 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
340 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
341 },
342 [DR_ACTION_STATE_ENCAP] = {
343 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
344 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
345 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
346 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
347 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
348 },
349 [DR_ACTION_STATE_MODIFY_HDR] = {
350 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
351 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
352 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
353 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
354 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
355 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
356 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
357 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
358 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
359 },
360 [DR_ACTION_STATE_POP_VLAN] = {
361 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
362 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
363 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
364 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
365 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
366 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
367 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
368 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
369 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
370 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
371 },
372 [DR_ACTION_STATE_PUSH_VLAN] = {
373 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
374 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
375 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
376 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
377 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
378 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
379 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
380 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
381 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
382 },
383 [DR_ACTION_STATE_NON_TERM] = {
384 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
385 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
386 [DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
387 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
388 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
389 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
390 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
391 [DR_ACTION_TYP_INSERT_HDR] = DR_ACTION_STATE_ENCAP,
392 [DR_ACTION_TYP_REMOVE_HDR] = DR_ACTION_STATE_DECAP,
393 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
394 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
395 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
396 },
397 [DR_ACTION_STATE_TERM] = {
398 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
399 },
400 },
401 };
402
403 static int
dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,enum mlx5dr_action_type * action_type)404 dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type,
405 enum mlx5dr_action_type *action_type)
406 {
407 switch (reformat_type) {
408 case DR_ACTION_REFORMAT_TYP_TNL_L2_TO_L2:
409 *action_type = DR_ACTION_TYP_TNL_L2_TO_L2;
410 break;
411 case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L2:
412 *action_type = DR_ACTION_TYP_L2_TO_TNL_L2;
413 break;
414 case DR_ACTION_REFORMAT_TYP_TNL_L3_TO_L2:
415 *action_type = DR_ACTION_TYP_TNL_L3_TO_L2;
416 break;
417 case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L3:
418 *action_type = DR_ACTION_TYP_L2_TO_TNL_L3;
419 break;
420 case DR_ACTION_REFORMAT_TYP_INSERT_HDR:
421 *action_type = DR_ACTION_TYP_INSERT_HDR;
422 break;
423 case DR_ACTION_REFORMAT_TYP_REMOVE_HDR:
424 *action_type = DR_ACTION_TYP_REMOVE_HDR;
425 break;
426 default:
427 return -EINVAL;
428 }
429
430 return 0;
431 }
432
433 /* Apply the actions on the rule STE array starting from the last_ste.
434 * Actions might require more than one STE, new_num_stes will return
435 * the new size of the STEs array, rule with actions.
436 */
dr_actions_apply(struct mlx5dr_domain * dmn,enum mlx5dr_domain_nic_type nic_type,u8 * action_type_set,u8 * last_ste,struct mlx5dr_ste_actions_attr * attr,u32 * new_num_stes)437 static void dr_actions_apply(struct mlx5dr_domain *dmn,
438 enum mlx5dr_domain_nic_type nic_type,
439 u8 *action_type_set,
440 u8 *last_ste,
441 struct mlx5dr_ste_actions_attr *attr,
442 u32 *new_num_stes)
443 {
444 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx;
445 u32 added_stes = 0;
446
447 if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
448 mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set,
449 last_ste, attr, &added_stes);
450 else
451 mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set,
452 last_ste, attr, &added_stes);
453
454 *new_num_stes += added_stes;
455 }
456
457 static enum dr_action_domain
dr_action_get_action_domain(enum mlx5dr_domain_type domain,enum mlx5dr_domain_nic_type nic_type)458 dr_action_get_action_domain(enum mlx5dr_domain_type domain,
459 enum mlx5dr_domain_nic_type nic_type)
460 {
461 switch (domain) {
462 case MLX5DR_DOMAIN_TYPE_NIC_RX:
463 return DR_ACTION_DOMAIN_NIC_INGRESS;
464 case MLX5DR_DOMAIN_TYPE_NIC_TX:
465 return DR_ACTION_DOMAIN_NIC_EGRESS;
466 case MLX5DR_DOMAIN_TYPE_FDB:
467 if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
468 return DR_ACTION_DOMAIN_FDB_INGRESS;
469 return DR_ACTION_DOMAIN_FDB_EGRESS;
470 default:
471 WARN_ON(true);
472 return DR_ACTION_DOMAIN_MAX;
473 }
474 }
475
476 static
dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,u32 action_type,u32 * state)477 int dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,
478 u32 action_type,
479 u32 *state)
480 {
481 u32 cur_state = *state;
482
483 /* Check action state machine is valid */
484 *state = next_action_state[action_domain][cur_state][action_type];
485
486 if (*state == DR_ACTION_STATE_ERR)
487 return -EOPNOTSUPP;
488
489 return 0;
490 }
491
dr_action_handle_cs_recalc(struct mlx5dr_domain * dmn,struct mlx5dr_action * dest_action,u64 * final_icm_addr)492 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn,
493 struct mlx5dr_action *dest_action,
494 u64 *final_icm_addr)
495 {
496 int ret;
497
498 switch (dest_action->action_type) {
499 case DR_ACTION_TYP_FT:
500 /* Allow destination flow table only if table is a terminating
501 * table, since there is an *assumption* that in such case FW
502 * will recalculate the CS.
503 */
504 if (dest_action->dest_tbl->is_fw_tbl) {
505 *final_icm_addr = dest_action->dest_tbl->fw_tbl.rx_icm_addr;
506 } else {
507 mlx5dr_dbg(dmn,
508 "Destination FT should be terminating when modify TTL is used\n");
509 return -EINVAL;
510 }
511 break;
512
513 case DR_ACTION_TYP_VPORT:
514 /* If destination is vport we will get the FW flow table
515 * that recalculates the CS and forwards to the vport.
516 */
517 ret = mlx5dr_domain_get_recalc_cs_ft_addr(dest_action->vport->dmn,
518 dest_action->vport->caps->num,
519 final_icm_addr);
520 if (ret) {
521 mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n");
522 return ret;
523 }
524 break;
525
526 default:
527 break;
528 }
529
530 return 0;
531 }
532
dr_action_print_sequence(struct mlx5dr_domain * dmn,struct mlx5dr_action * actions[],int last_idx)533 static void dr_action_print_sequence(struct mlx5dr_domain *dmn,
534 struct mlx5dr_action *actions[],
535 int last_idx)
536 {
537 int i;
538
539 for (i = 0; i <= last_idx; i++)
540 mlx5dr_err(dmn, "< %s (%d) > ",
541 dr_action_id_to_str(actions[i]->action_type),
542 actions[i]->action_type);
543 }
544
545 #define WITH_VLAN_NUM_HW_ACTIONS 6
546
mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher * matcher,struct mlx5dr_matcher_rx_tx * nic_matcher,struct mlx5dr_action * actions[],u32 num_actions,u8 * ste_arr,u32 * new_hw_ste_arr_sz)547 int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
548 struct mlx5dr_matcher_rx_tx *nic_matcher,
549 struct mlx5dr_action *actions[],
550 u32 num_actions,
551 u8 *ste_arr,
552 u32 *new_hw_ste_arr_sz)
553 {
554 struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn;
555 bool rx_rule = nic_dmn->type == DR_DOMAIN_NIC_TYPE_RX;
556 struct mlx5dr_domain *dmn = matcher->tbl->dmn;
557 u8 action_type_set[DR_ACTION_TYP_MAX] = {};
558 struct mlx5dr_ste_actions_attr attr = {};
559 struct mlx5dr_action *dest_action = NULL;
560 u32 state = DR_ACTION_STATE_NO_ACTION;
561 enum dr_action_domain action_domain;
562 bool recalc_cs_required = false;
563 u8 *last_ste;
564 int i, ret;
565
566 attr.gvmi = dmn->info.caps.gvmi;
567 attr.hit_gvmi = dmn->info.caps.gvmi;
568 attr.final_icm_addr = nic_dmn->default_icm_addr;
569 action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->type);
570
571 for (i = 0; i < num_actions; i++) {
572 struct mlx5dr_action_dest_tbl *dest_tbl;
573 struct mlx5dr_action *action;
574 int max_actions_type = 1;
575 u32 action_type;
576
577 action = actions[i];
578 action_type = action->action_type;
579
580 switch (action_type) {
581 case DR_ACTION_TYP_DROP:
582 attr.final_icm_addr = nic_dmn->drop_icm_addr;
583 break;
584 case DR_ACTION_TYP_FT:
585 dest_action = action;
586 dest_tbl = action->dest_tbl;
587 if (!dest_tbl->is_fw_tbl) {
588 if (dest_tbl->tbl->dmn != dmn) {
589 mlx5dr_err(dmn,
590 "Destination table belongs to a different domain\n");
591 return -EINVAL;
592 }
593 if (dest_tbl->tbl->level <= matcher->tbl->level) {
594 mlx5_core_dbg_once(dmn->mdev,
595 "Connecting table to a lower/same level destination table\n");
596 mlx5dr_dbg(dmn,
597 "Connecting table at level %d to a destination table at level %d\n",
598 matcher->tbl->level,
599 dest_tbl->tbl->level);
600 }
601 attr.final_icm_addr = rx_rule ?
602 dest_tbl->tbl->rx.s_anchor->chunk->icm_addr :
603 dest_tbl->tbl->tx.s_anchor->chunk->icm_addr;
604 } else {
605 struct mlx5dr_cmd_query_flow_table_details output;
606 int ret;
607
608 /* get the relevant addresses */
609 if (!action->dest_tbl->fw_tbl.rx_icm_addr) {
610 ret = mlx5dr_cmd_query_flow_table(dmn->mdev,
611 dest_tbl->fw_tbl.type,
612 dest_tbl->fw_tbl.id,
613 &output);
614 if (!ret) {
615 dest_tbl->fw_tbl.tx_icm_addr =
616 output.sw_owner_icm_root_1;
617 dest_tbl->fw_tbl.rx_icm_addr =
618 output.sw_owner_icm_root_0;
619 } else {
620 mlx5dr_err(dmn,
621 "Failed mlx5_cmd_query_flow_table ret: %d\n",
622 ret);
623 return ret;
624 }
625 }
626 attr.final_icm_addr = rx_rule ?
627 dest_tbl->fw_tbl.rx_icm_addr :
628 dest_tbl->fw_tbl.tx_icm_addr;
629 }
630 break;
631 case DR_ACTION_TYP_QP:
632 mlx5dr_info(dmn, "Domain doesn't support QP\n");
633 return -EOPNOTSUPP;
634 case DR_ACTION_TYP_CTR:
635 attr.ctr_id = action->ctr->ctr_id +
636 action->ctr->offset;
637 break;
638 case DR_ACTION_TYP_TAG:
639 attr.flow_tag = action->flow_tag->flow_tag;
640 break;
641 case DR_ACTION_TYP_TNL_L2_TO_L2:
642 break;
643 case DR_ACTION_TYP_TNL_L3_TO_L2:
644 attr.decap_index = action->rewrite->index;
645 attr.decap_actions = action->rewrite->num_of_actions;
646 attr.decap_with_vlan =
647 attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS;
648 break;
649 case DR_ACTION_TYP_MODIFY_HDR:
650 attr.modify_index = action->rewrite->index;
651 attr.modify_actions = action->rewrite->num_of_actions;
652 recalc_cs_required = action->rewrite->modify_ttl &&
653 !mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps);
654 break;
655 case DR_ACTION_TYP_L2_TO_TNL_L2:
656 case DR_ACTION_TYP_L2_TO_TNL_L3:
657 if (rx_rule &&
658 !(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
659 mlx5dr_info(dmn, "Device doesn't support Encap on RX\n");
660 return -EOPNOTSUPP;
661 }
662 attr.reformat.size = action->reformat->size;
663 attr.reformat.id = action->reformat->id;
664 break;
665 case DR_ACTION_TYP_SAMPLER:
666 attr.final_icm_addr = rx_rule ? action->sampler->rx_icm_addr :
667 action->sampler->tx_icm_addr;
668 break;
669 case DR_ACTION_TYP_VPORT:
670 attr.hit_gvmi = action->vport->caps->vhca_gvmi;
671 dest_action = action;
672 if (rx_rule) {
673 if (action->vport->caps->num == MLX5_VPORT_UPLINK) {
674 mlx5dr_dbg(dmn, "Device doesn't support Loopback on WIRE vport\n");
675 return -EOPNOTSUPP;
676 }
677 attr.final_icm_addr = action->vport->caps->icm_address_rx;
678 } else {
679 attr.final_icm_addr = action->vport->caps->icm_address_tx;
680 }
681 break;
682 case DR_ACTION_TYP_POP_VLAN:
683 if (!rx_rule && !(dmn->ste_ctx->actions_caps &
684 DR_STE_CTX_ACTION_CAP_TX_POP)) {
685 mlx5dr_dbg(dmn, "Device doesn't support POP VLAN action on TX\n");
686 return -EOPNOTSUPP;
687 }
688
689 max_actions_type = MLX5DR_MAX_VLANS;
690 attr.vlans.count++;
691 break;
692 case DR_ACTION_TYP_PUSH_VLAN:
693 if (rx_rule && !(dmn->ste_ctx->actions_caps &
694 DR_STE_CTX_ACTION_CAP_RX_PUSH)) {
695 mlx5dr_dbg(dmn, "Device doesn't support PUSH VLAN action on RX\n");
696 return -EOPNOTSUPP;
697 }
698
699 max_actions_type = MLX5DR_MAX_VLANS;
700 if (attr.vlans.count == MLX5DR_MAX_VLANS) {
701 mlx5dr_dbg(dmn, "Max VLAN push/pop count exceeded\n");
702 return -EINVAL;
703 }
704
705 attr.vlans.headers[attr.vlans.count++] = action->push_vlan->vlan_hdr;
706 break;
707 case DR_ACTION_TYP_INSERT_HDR:
708 case DR_ACTION_TYP_REMOVE_HDR:
709 attr.reformat.size = action->reformat->size;
710 attr.reformat.id = action->reformat->id;
711 attr.reformat.param_0 = action->reformat->param_0;
712 attr.reformat.param_1 = action->reformat->param_1;
713 break;
714 default:
715 mlx5dr_err(dmn, "Unsupported action type %d\n", action_type);
716 return -EINVAL;
717 }
718
719 /* Check action duplication */
720 if (++action_type_set[action_type] > max_actions_type) {
721 mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n",
722 action_type, max_actions_type);
723 return -EINVAL;
724 }
725
726 /* Check action state machine is valid */
727 if (dr_action_validate_and_get_next_state(action_domain,
728 action_type,
729 &state)) {
730 mlx5dr_err(dmn, "Invalid action (gvmi: %d, is_rx: %d) sequence provided:",
731 attr.gvmi, rx_rule);
732 dr_action_print_sequence(dmn, actions, i);
733 return -EOPNOTSUPP;
734 }
735 }
736
737 *new_hw_ste_arr_sz = nic_matcher->num_of_builders;
738 last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1);
739
740 /* Due to a HW bug in some devices, modifying TTL on RX flows will
741 * cause an incorrect checksum calculation. In this case we will
742 * use a FW table to recalculate.
743 */
744 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB &&
745 rx_rule && recalc_cs_required && dest_action) {
746 ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr);
747 if (ret) {
748 mlx5dr_err(dmn,
749 "Failed to handle checksum recalculation err %d\n",
750 ret);
751 return ret;
752 }
753 }
754
755 dr_actions_apply(dmn,
756 nic_dmn->type,
757 action_type_set,
758 last_ste,
759 &attr,
760 new_hw_ste_arr_sz);
761
762 return 0;
763 }
764
765 static unsigned int action_size[DR_ACTION_TYP_MAX] = {
766 [DR_ACTION_TYP_TNL_L2_TO_L2] = sizeof(struct mlx5dr_action_reformat),
767 [DR_ACTION_TYP_L2_TO_TNL_L2] = sizeof(struct mlx5dr_action_reformat),
768 [DR_ACTION_TYP_TNL_L3_TO_L2] = sizeof(struct mlx5dr_action_rewrite),
769 [DR_ACTION_TYP_L2_TO_TNL_L3] = sizeof(struct mlx5dr_action_reformat),
770 [DR_ACTION_TYP_FT] = sizeof(struct mlx5dr_action_dest_tbl),
771 [DR_ACTION_TYP_CTR] = sizeof(struct mlx5dr_action_ctr),
772 [DR_ACTION_TYP_TAG] = sizeof(struct mlx5dr_action_flow_tag),
773 [DR_ACTION_TYP_MODIFY_HDR] = sizeof(struct mlx5dr_action_rewrite),
774 [DR_ACTION_TYP_VPORT] = sizeof(struct mlx5dr_action_vport),
775 [DR_ACTION_TYP_PUSH_VLAN] = sizeof(struct mlx5dr_action_push_vlan),
776 [DR_ACTION_TYP_INSERT_HDR] = sizeof(struct mlx5dr_action_reformat),
777 [DR_ACTION_TYP_REMOVE_HDR] = sizeof(struct mlx5dr_action_reformat),
778 [DR_ACTION_TYP_SAMPLER] = sizeof(struct mlx5dr_action_sampler),
779 };
780
781 static struct mlx5dr_action *
dr_action_create_generic(enum mlx5dr_action_type action_type)782 dr_action_create_generic(enum mlx5dr_action_type action_type)
783 {
784 struct mlx5dr_action *action;
785 int extra_size;
786
787 if (action_type < DR_ACTION_TYP_MAX)
788 extra_size = action_size[action_type];
789 else
790 return NULL;
791
792 action = kzalloc(sizeof(*action) + extra_size, GFP_KERNEL);
793 if (!action)
794 return NULL;
795
796 action->action_type = action_type;
797 refcount_set(&action->refcount, 1);
798 action->data = action + 1;
799
800 return action;
801 }
802
mlx5dr_action_create_drop(void)803 struct mlx5dr_action *mlx5dr_action_create_drop(void)
804 {
805 return dr_action_create_generic(DR_ACTION_TYP_DROP);
806 }
807
808 struct mlx5dr_action *
mlx5dr_action_create_dest_table_num(struct mlx5dr_domain * dmn,u32 table_num)809 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num)
810 {
811 struct mlx5dr_action *action;
812
813 action = dr_action_create_generic(DR_ACTION_TYP_FT);
814 if (!action)
815 return NULL;
816
817 action->dest_tbl->is_fw_tbl = true;
818 action->dest_tbl->fw_tbl.dmn = dmn;
819 action->dest_tbl->fw_tbl.id = table_num;
820 action->dest_tbl->fw_tbl.type = FS_FT_FDB;
821 refcount_inc(&dmn->refcount);
822
823 return action;
824 }
825
826 struct mlx5dr_action *
mlx5dr_action_create_dest_table(struct mlx5dr_table * tbl)827 mlx5dr_action_create_dest_table(struct mlx5dr_table *tbl)
828 {
829 struct mlx5dr_action *action;
830
831 refcount_inc(&tbl->refcount);
832
833 action = dr_action_create_generic(DR_ACTION_TYP_FT);
834 if (!action)
835 goto dec_ref;
836
837 action->dest_tbl->tbl = tbl;
838
839 return action;
840
841 dec_ref:
842 refcount_dec(&tbl->refcount);
843 return NULL;
844 }
845
846 struct mlx5dr_action *
mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain * dmn,struct mlx5dr_action_dest * dests,u32 num_of_dests,bool ignore_flow_level)847 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn,
848 struct mlx5dr_action_dest *dests,
849 u32 num_of_dests,
850 bool ignore_flow_level)
851 {
852 struct mlx5dr_cmd_flow_destination_hw_info *hw_dests;
853 struct mlx5dr_action **ref_actions;
854 struct mlx5dr_action *action;
855 bool reformat_req = false;
856 u32 num_of_ref = 0;
857 u32 ref_act_cnt;
858 int ret;
859 int i;
860
861 if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
862 mlx5dr_err(dmn, "Multiple destination support is for FDB only\n");
863 return NULL;
864 }
865
866 hw_dests = kcalloc(num_of_dests, sizeof(*hw_dests), GFP_KERNEL);
867 if (!hw_dests)
868 return NULL;
869
870 if (unlikely(check_mul_overflow(num_of_dests, 2u, &ref_act_cnt)))
871 goto free_hw_dests;
872
873 ref_actions = kcalloc(ref_act_cnt, sizeof(*ref_actions), GFP_KERNEL);
874 if (!ref_actions)
875 goto free_hw_dests;
876
877 for (i = 0; i < num_of_dests; i++) {
878 struct mlx5dr_action *reformat_action = dests[i].reformat;
879 struct mlx5dr_action *dest_action = dests[i].dest;
880
881 ref_actions[num_of_ref++] = dest_action;
882
883 switch (dest_action->action_type) {
884 case DR_ACTION_TYP_VPORT:
885 hw_dests[i].vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
886 hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
887 hw_dests[i].vport.num = dest_action->vport->caps->num;
888 hw_dests[i].vport.vhca_id = dest_action->vport->caps->vhca_gvmi;
889 if (reformat_action) {
890 reformat_req = true;
891 hw_dests[i].vport.reformat_id =
892 reformat_action->reformat->id;
893 ref_actions[num_of_ref++] = reformat_action;
894 hw_dests[i].vport.flags |= MLX5_FLOW_DEST_VPORT_REFORMAT_ID;
895 }
896 break;
897
898 case DR_ACTION_TYP_FT:
899 hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
900 if (dest_action->dest_tbl->is_fw_tbl)
901 hw_dests[i].ft_id = dest_action->dest_tbl->fw_tbl.id;
902 else
903 hw_dests[i].ft_id = dest_action->dest_tbl->tbl->table_id;
904 break;
905
906 default:
907 mlx5dr_dbg(dmn, "Invalid multiple destinations action\n");
908 goto free_ref_actions;
909 }
910 }
911
912 action = dr_action_create_generic(DR_ACTION_TYP_FT);
913 if (!action)
914 goto free_ref_actions;
915
916 ret = mlx5dr_fw_create_md_tbl(dmn,
917 hw_dests,
918 num_of_dests,
919 reformat_req,
920 &action->dest_tbl->fw_tbl.id,
921 &action->dest_tbl->fw_tbl.group_id,
922 ignore_flow_level);
923 if (ret)
924 goto free_action;
925
926 refcount_inc(&dmn->refcount);
927
928 for (i = 0; i < num_of_ref; i++)
929 refcount_inc(&ref_actions[i]->refcount);
930
931 action->dest_tbl->is_fw_tbl = true;
932 action->dest_tbl->fw_tbl.dmn = dmn;
933 action->dest_tbl->fw_tbl.type = FS_FT_FDB;
934 action->dest_tbl->fw_tbl.ref_actions = ref_actions;
935 action->dest_tbl->fw_tbl.num_of_ref_actions = num_of_ref;
936
937 kfree(hw_dests);
938
939 return action;
940
941 free_action:
942 kfree(action);
943 free_ref_actions:
944 kfree(ref_actions);
945 free_hw_dests:
946 kfree(hw_dests);
947 return NULL;
948 }
949
950 struct mlx5dr_action *
mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain * dmn,struct mlx5_flow_table * ft)951 mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain *dmn,
952 struct mlx5_flow_table *ft)
953 {
954 struct mlx5dr_action *action;
955
956 action = dr_action_create_generic(DR_ACTION_TYP_FT);
957 if (!action)
958 return NULL;
959
960 action->dest_tbl->is_fw_tbl = 1;
961 action->dest_tbl->fw_tbl.type = ft->type;
962 action->dest_tbl->fw_tbl.id = ft->id;
963 action->dest_tbl->fw_tbl.dmn = dmn;
964
965 refcount_inc(&dmn->refcount);
966
967 return action;
968 }
969
970 struct mlx5dr_action *
mlx5dr_action_create_flow_counter(u32 counter_id)971 mlx5dr_action_create_flow_counter(u32 counter_id)
972 {
973 struct mlx5dr_action *action;
974
975 action = dr_action_create_generic(DR_ACTION_TYP_CTR);
976 if (!action)
977 return NULL;
978
979 action->ctr->ctr_id = counter_id;
980
981 return action;
982 }
983
mlx5dr_action_create_tag(u32 tag_value)984 struct mlx5dr_action *mlx5dr_action_create_tag(u32 tag_value)
985 {
986 struct mlx5dr_action *action;
987
988 action = dr_action_create_generic(DR_ACTION_TYP_TAG);
989 if (!action)
990 return NULL;
991
992 action->flow_tag->flow_tag = tag_value & 0xffffff;
993
994 return action;
995 }
996
997 struct mlx5dr_action *
mlx5dr_action_create_flow_sampler(struct mlx5dr_domain * dmn,u32 sampler_id)998 mlx5dr_action_create_flow_sampler(struct mlx5dr_domain *dmn, u32 sampler_id)
999 {
1000 struct mlx5dr_action *action;
1001 u64 icm_rx, icm_tx;
1002 int ret;
1003
1004 ret = mlx5dr_cmd_query_flow_sampler(dmn->mdev, sampler_id,
1005 &icm_rx, &icm_tx);
1006 if (ret)
1007 return NULL;
1008
1009 action = dr_action_create_generic(DR_ACTION_TYP_SAMPLER);
1010 if (!action)
1011 return NULL;
1012
1013 action->sampler->dmn = dmn;
1014 action->sampler->sampler_id = sampler_id;
1015 action->sampler->rx_icm_addr = icm_rx;
1016 action->sampler->tx_icm_addr = icm_tx;
1017
1018 refcount_inc(&dmn->refcount);
1019 return action;
1020 }
1021
1022 static int
dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,struct mlx5dr_domain * dmn,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data)1023 dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type,
1024 struct mlx5dr_domain *dmn,
1025 u8 reformat_param_0,
1026 u8 reformat_param_1,
1027 size_t data_sz,
1028 void *data)
1029 {
1030 if (reformat_type == DR_ACTION_TYP_INSERT_HDR) {
1031 if ((!data && data_sz) || (data && !data_sz) ||
1032 MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_size) < data_sz ||
1033 MLX5_CAP_GEN_2(dmn->mdev, max_reformat_insert_offset) < reformat_param_1) {
1034 mlx5dr_dbg(dmn, "Invalid reformat parameters for INSERT_HDR\n");
1035 goto out_err;
1036 }
1037 } else if (reformat_type == DR_ACTION_TYP_REMOVE_HDR) {
1038 if (data ||
1039 MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_size) < data_sz ||
1040 MLX5_CAP_GEN_2(dmn->mdev, max_reformat_remove_offset) < reformat_param_1) {
1041 mlx5dr_dbg(dmn, "Invalid reformat parameters for REMOVE_HDR\n");
1042 goto out_err;
1043 }
1044 } else if (reformat_param_0 || reformat_param_1 ||
1045 reformat_type > DR_ACTION_TYP_REMOVE_HDR) {
1046 mlx5dr_dbg(dmn, "Invalid reformat parameters\n");
1047 goto out_err;
1048 }
1049
1050 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB)
1051 return 0;
1052
1053 if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) {
1054 if (reformat_type != DR_ACTION_TYP_TNL_L2_TO_L2 &&
1055 reformat_type != DR_ACTION_TYP_TNL_L3_TO_L2) {
1056 mlx5dr_dbg(dmn, "Action reformat type not support on RX domain\n");
1057 goto out_err;
1058 }
1059 } else if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) {
1060 if (reformat_type != DR_ACTION_TYP_L2_TO_TNL_L2 &&
1061 reformat_type != DR_ACTION_TYP_L2_TO_TNL_L3) {
1062 mlx5dr_dbg(dmn, "Action reformat type not support on TX domain\n");
1063 goto out_err;
1064 }
1065 }
1066
1067 return 0;
1068
1069 out_err:
1070 return -EINVAL;
1071 }
1072
1073 #define ACTION_CACHE_LINE_SIZE 64
1074
1075 static int
dr_action_create_reformat_action(struct mlx5dr_domain * dmn,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data,struct mlx5dr_action * action)1076 dr_action_create_reformat_action(struct mlx5dr_domain *dmn,
1077 u8 reformat_param_0, u8 reformat_param_1,
1078 size_t data_sz, void *data,
1079 struct mlx5dr_action *action)
1080 {
1081 u32 reformat_id;
1082 int ret;
1083
1084 switch (action->action_type) {
1085 case DR_ACTION_TYP_L2_TO_TNL_L2:
1086 case DR_ACTION_TYP_L2_TO_TNL_L3:
1087 {
1088 enum mlx5_reformat_ctx_type rt;
1089
1090 if (action->action_type == DR_ACTION_TYP_L2_TO_TNL_L2)
1091 rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL;
1092 else
1093 rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
1094
1095 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, 0, 0,
1096 data_sz, data,
1097 &reformat_id);
1098 if (ret)
1099 return ret;
1100
1101 action->reformat->id = reformat_id;
1102 action->reformat->size = data_sz;
1103 return 0;
1104 }
1105 case DR_ACTION_TYP_TNL_L2_TO_L2:
1106 {
1107 return 0;
1108 }
1109 case DR_ACTION_TYP_TNL_L3_TO_L2:
1110 {
1111 u8 hw_actions[ACTION_CACHE_LINE_SIZE] = {};
1112 int ret;
1113
1114 ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx,
1115 data, data_sz,
1116 hw_actions,
1117 ACTION_CACHE_LINE_SIZE,
1118 &action->rewrite->num_of_actions);
1119 if (ret) {
1120 mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n");
1121 return ret;
1122 }
1123
1124 action->rewrite->chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool,
1125 DR_CHUNK_SIZE_8);
1126 if (!action->rewrite->chunk) {
1127 mlx5dr_dbg(dmn, "Failed allocating modify header chunk\n");
1128 return -ENOMEM;
1129 }
1130
1131 action->rewrite->data = (void *)hw_actions;
1132 action->rewrite->index = (action->rewrite->chunk->icm_addr -
1133 dmn->info.caps.hdr_modify_icm_addr) /
1134 ACTION_CACHE_LINE_SIZE;
1135
1136 ret = mlx5dr_send_postsend_action(dmn, action);
1137 if (ret) {
1138 mlx5dr_dbg(dmn, "Writing decap l3 actions to ICM failed\n");
1139 mlx5dr_icm_free_chunk(action->rewrite->chunk);
1140 return ret;
1141 }
1142 return 0;
1143 }
1144 case DR_ACTION_TYP_INSERT_HDR:
1145 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev,
1146 MLX5_REFORMAT_TYPE_INSERT_HDR,
1147 reformat_param_0,
1148 reformat_param_1,
1149 data_sz, data,
1150 &reformat_id);
1151 if (ret)
1152 return ret;
1153
1154 action->reformat->id = reformat_id;
1155 action->reformat->size = data_sz;
1156 action->reformat->param_0 = reformat_param_0;
1157 action->reformat->param_1 = reformat_param_1;
1158 return 0;
1159 case DR_ACTION_TYP_REMOVE_HDR:
1160 action->reformat->id = 0;
1161 action->reformat->size = data_sz;
1162 action->reformat->param_0 = reformat_param_0;
1163 action->reformat->param_1 = reformat_param_1;
1164 return 0;
1165 default:
1166 mlx5dr_info(dmn, "Reformat type is not supported %d\n", action->action_type);
1167 return -EINVAL;
1168 }
1169 }
1170
1171 #define CVLAN_ETHERTYPE 0x8100
1172 #define SVLAN_ETHERTYPE 0x88a8
1173
mlx5dr_action_create_pop_vlan(void)1174 struct mlx5dr_action *mlx5dr_action_create_pop_vlan(void)
1175 {
1176 return dr_action_create_generic(DR_ACTION_TYP_POP_VLAN);
1177 }
1178
mlx5dr_action_create_push_vlan(struct mlx5dr_domain * dmn,__be32 vlan_hdr)1179 struct mlx5dr_action *mlx5dr_action_create_push_vlan(struct mlx5dr_domain *dmn,
1180 __be32 vlan_hdr)
1181 {
1182 u32 vlan_hdr_h = ntohl(vlan_hdr);
1183 u16 ethertype = vlan_hdr_h >> 16;
1184 struct mlx5dr_action *action;
1185
1186 if (ethertype != SVLAN_ETHERTYPE && ethertype != CVLAN_ETHERTYPE) {
1187 mlx5dr_dbg(dmn, "Invalid vlan ethertype\n");
1188 return NULL;
1189 }
1190
1191 action = dr_action_create_generic(DR_ACTION_TYP_PUSH_VLAN);
1192 if (!action)
1193 return NULL;
1194
1195 action->push_vlan->vlan_hdr = vlan_hdr_h;
1196 return action;
1197 }
1198
1199 struct mlx5dr_action *
mlx5dr_action_create_packet_reformat(struct mlx5dr_domain * dmn,enum mlx5dr_action_reformat_type reformat_type,u8 reformat_param_0,u8 reformat_param_1,size_t data_sz,void * data)1200 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn,
1201 enum mlx5dr_action_reformat_type reformat_type,
1202 u8 reformat_param_0,
1203 u8 reformat_param_1,
1204 size_t data_sz,
1205 void *data)
1206 {
1207 enum mlx5dr_action_type action_type;
1208 struct mlx5dr_action *action;
1209 int ret;
1210
1211 refcount_inc(&dmn->refcount);
1212
1213 /* General checks */
1214 ret = dr_action_reformat_to_action_type(reformat_type, &action_type);
1215 if (ret) {
1216 mlx5dr_dbg(dmn, "Invalid reformat_type provided\n");
1217 goto dec_ref;
1218 }
1219
1220 ret = dr_action_verify_reformat_params(action_type, dmn,
1221 reformat_param_0, reformat_param_1,
1222 data_sz, data);
1223 if (ret)
1224 goto dec_ref;
1225
1226 action = dr_action_create_generic(action_type);
1227 if (!action)
1228 goto dec_ref;
1229
1230 action->reformat->dmn = dmn;
1231
1232 ret = dr_action_create_reformat_action(dmn,
1233 reformat_param_0,
1234 reformat_param_1,
1235 data_sz,
1236 data,
1237 action);
1238 if (ret) {
1239 mlx5dr_dbg(dmn, "Failed creating reformat action %d\n", ret);
1240 goto free_action;
1241 }
1242
1243 return action;
1244
1245 free_action:
1246 kfree(action);
1247 dec_ref:
1248 refcount_dec(&dmn->refcount);
1249 return NULL;
1250 }
1251
1252 static int
dr_action_modify_sw_to_hw_add(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_hw_info)1253 dr_action_modify_sw_to_hw_add(struct mlx5dr_domain *dmn,
1254 __be64 *sw_action,
1255 __be64 *hw_action,
1256 const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1257 {
1258 const struct mlx5dr_ste_action_modify_field *hw_action_info;
1259 u8 max_length;
1260 u16 sw_field;
1261 u32 data;
1262
1263 /* Get SW modify action data */
1264 sw_field = MLX5_GET(set_action_in, sw_action, field);
1265 data = MLX5_GET(set_action_in, sw_action, data);
1266
1267 /* Convert SW data to HW modify action format */
1268 hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1269 if (!hw_action_info) {
1270 mlx5dr_dbg(dmn, "Modify add action invalid field given\n");
1271 return -EINVAL;
1272 }
1273
1274 max_length = hw_action_info->end - hw_action_info->start + 1;
1275
1276 mlx5dr_ste_set_action_add(dmn->ste_ctx,
1277 hw_action,
1278 hw_action_info->hw_field,
1279 hw_action_info->start,
1280 max_length,
1281 data);
1282
1283 *ret_hw_info = hw_action_info;
1284
1285 return 0;
1286 }
1287
1288 static int
dr_action_modify_sw_to_hw_set(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_hw_info)1289 dr_action_modify_sw_to_hw_set(struct mlx5dr_domain *dmn,
1290 __be64 *sw_action,
1291 __be64 *hw_action,
1292 const struct mlx5dr_ste_action_modify_field **ret_hw_info)
1293 {
1294 const struct mlx5dr_ste_action_modify_field *hw_action_info;
1295 u8 offset, length, max_length;
1296 u16 sw_field;
1297 u32 data;
1298
1299 /* Get SW modify action data */
1300 length = MLX5_GET(set_action_in, sw_action, length);
1301 offset = MLX5_GET(set_action_in, sw_action, offset);
1302 sw_field = MLX5_GET(set_action_in, sw_action, field);
1303 data = MLX5_GET(set_action_in, sw_action, data);
1304
1305 /* Convert SW data to HW modify action format */
1306 hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field);
1307 if (!hw_action_info) {
1308 mlx5dr_dbg(dmn, "Modify set action invalid field given\n");
1309 return -EINVAL;
1310 }
1311
1312 /* PRM defines that length zero specific length of 32bits */
1313 length = length ? length : 32;
1314
1315 max_length = hw_action_info->end - hw_action_info->start + 1;
1316
1317 if (length + offset > max_length) {
1318 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1319 return -EINVAL;
1320 }
1321
1322 mlx5dr_ste_set_action_set(dmn->ste_ctx,
1323 hw_action,
1324 hw_action_info->hw_field,
1325 hw_action_info->start + offset,
1326 length,
1327 data);
1328
1329 *ret_hw_info = hw_action_info;
1330
1331 return 0;
1332 }
1333
1334 static int
dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_dst_hw_info,const struct mlx5dr_ste_action_modify_field ** ret_src_hw_info)1335 dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain *dmn,
1336 __be64 *sw_action,
1337 __be64 *hw_action,
1338 const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1339 const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1340 {
1341 u8 src_offset, dst_offset, src_max_length, dst_max_length, length;
1342 const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1343 const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1344 u16 src_field, dst_field;
1345
1346 /* Get SW modify action data */
1347 src_field = MLX5_GET(copy_action_in, sw_action, src_field);
1348 dst_field = MLX5_GET(copy_action_in, sw_action, dst_field);
1349 src_offset = MLX5_GET(copy_action_in, sw_action, src_offset);
1350 dst_offset = MLX5_GET(copy_action_in, sw_action, dst_offset);
1351 length = MLX5_GET(copy_action_in, sw_action, length);
1352
1353 /* Convert SW data to HW modify action format */
1354 hw_src_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, src_field);
1355 hw_dst_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, dst_field);
1356 if (!hw_src_action_info || !hw_dst_action_info) {
1357 mlx5dr_dbg(dmn, "Modify copy action invalid field given\n");
1358 return -EINVAL;
1359 }
1360
1361 /* PRM defines that length zero specific length of 32bits */
1362 length = length ? length : 32;
1363
1364 src_max_length = hw_src_action_info->end -
1365 hw_src_action_info->start + 1;
1366 dst_max_length = hw_dst_action_info->end -
1367 hw_dst_action_info->start + 1;
1368
1369 if (length + src_offset > src_max_length ||
1370 length + dst_offset > dst_max_length) {
1371 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n");
1372 return -EINVAL;
1373 }
1374
1375 mlx5dr_ste_set_action_copy(dmn->ste_ctx,
1376 hw_action,
1377 hw_dst_action_info->hw_field,
1378 hw_dst_action_info->start + dst_offset,
1379 length,
1380 hw_src_action_info->hw_field,
1381 hw_src_action_info->start + src_offset);
1382
1383 *ret_dst_hw_info = hw_dst_action_info;
1384 *ret_src_hw_info = hw_src_action_info;
1385
1386 return 0;
1387 }
1388
1389 static int
dr_action_modify_sw_to_hw(struct mlx5dr_domain * dmn,__be64 * sw_action,__be64 * hw_action,const struct mlx5dr_ste_action_modify_field ** ret_dst_hw_info,const struct mlx5dr_ste_action_modify_field ** ret_src_hw_info)1390 dr_action_modify_sw_to_hw(struct mlx5dr_domain *dmn,
1391 __be64 *sw_action,
1392 __be64 *hw_action,
1393 const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info,
1394 const struct mlx5dr_ste_action_modify_field **ret_src_hw_info)
1395 {
1396 u8 action;
1397 int ret;
1398
1399 *hw_action = 0;
1400 *ret_src_hw_info = NULL;
1401
1402 /* Get SW modify action type */
1403 action = MLX5_GET(set_action_in, sw_action, action_type);
1404
1405 switch (action) {
1406 case MLX5_ACTION_TYPE_SET:
1407 ret = dr_action_modify_sw_to_hw_set(dmn, sw_action,
1408 hw_action,
1409 ret_dst_hw_info);
1410 break;
1411
1412 case MLX5_ACTION_TYPE_ADD:
1413 ret = dr_action_modify_sw_to_hw_add(dmn, sw_action,
1414 hw_action,
1415 ret_dst_hw_info);
1416 break;
1417
1418 case MLX5_ACTION_TYPE_COPY:
1419 ret = dr_action_modify_sw_to_hw_copy(dmn, sw_action,
1420 hw_action,
1421 ret_dst_hw_info,
1422 ret_src_hw_info);
1423 break;
1424
1425 default:
1426 mlx5dr_info(dmn, "Unsupported action_type for modify action\n");
1427 ret = -EOPNOTSUPP;
1428 }
1429
1430 return ret;
1431 }
1432
1433 static int
dr_action_modify_check_set_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1434 dr_action_modify_check_set_field_limitation(struct mlx5dr_action *action,
1435 const __be64 *sw_action)
1436 {
1437 u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1438 struct mlx5dr_domain *dmn = action->rewrite->dmn;
1439
1440 if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1441 action->rewrite->allow_rx = 0;
1442 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1443 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1444 sw_field);
1445 return -EINVAL;
1446 }
1447 } else if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1448 action->rewrite->allow_tx = 0;
1449 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1450 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1451 sw_field);
1452 return -EINVAL;
1453 }
1454 }
1455
1456 if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1457 mlx5dr_dbg(dmn, "Modify SET actions not supported on both RX and TX\n");
1458 return -EINVAL;
1459 }
1460
1461 return 0;
1462 }
1463
1464 static int
dr_action_modify_check_add_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1465 dr_action_modify_check_add_field_limitation(struct mlx5dr_action *action,
1466 const __be64 *sw_action)
1467 {
1468 u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1469 struct mlx5dr_domain *dmn = action->rewrite->dmn;
1470
1471 if (sw_field != MLX5_ACTION_IN_FIELD_OUT_IP_TTL &&
1472 sw_field != MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT &&
1473 sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM &&
1474 sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM) {
1475 mlx5dr_dbg(dmn, "Unsupported field %d for add action\n",
1476 sw_field);
1477 return -EINVAL;
1478 }
1479
1480 return 0;
1481 }
1482
1483 static int
dr_action_modify_check_copy_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1484 dr_action_modify_check_copy_field_limitation(struct mlx5dr_action *action,
1485 const __be64 *sw_action)
1486 {
1487 struct mlx5dr_domain *dmn = action->rewrite->dmn;
1488 u16 sw_fields[2];
1489 int i;
1490
1491 sw_fields[0] = MLX5_GET(copy_action_in, sw_action, src_field);
1492 sw_fields[1] = MLX5_GET(copy_action_in, sw_action, dst_field);
1493
1494 for (i = 0; i < 2; i++) {
1495 if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_A) {
1496 action->rewrite->allow_rx = 0;
1497 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) {
1498 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n",
1499 sw_fields[i]);
1500 return -EINVAL;
1501 }
1502 } else if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_B) {
1503 action->rewrite->allow_tx = 0;
1504 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) {
1505 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n",
1506 sw_fields[i]);
1507 return -EINVAL;
1508 }
1509 }
1510 }
1511
1512 if (!action->rewrite->allow_rx && !action->rewrite->allow_tx) {
1513 mlx5dr_dbg(dmn, "Modify copy actions not supported on both RX and TX\n");
1514 return -EINVAL;
1515 }
1516
1517 return 0;
1518 }
1519
1520 static int
dr_action_modify_check_field_limitation(struct mlx5dr_action * action,const __be64 * sw_action)1521 dr_action_modify_check_field_limitation(struct mlx5dr_action *action,
1522 const __be64 *sw_action)
1523 {
1524 struct mlx5dr_domain *dmn = action->rewrite->dmn;
1525 u8 action_type;
1526 int ret;
1527
1528 action_type = MLX5_GET(set_action_in, sw_action, action_type);
1529
1530 switch (action_type) {
1531 case MLX5_ACTION_TYPE_SET:
1532 ret = dr_action_modify_check_set_field_limitation(action,
1533 sw_action);
1534 break;
1535
1536 case MLX5_ACTION_TYPE_ADD:
1537 ret = dr_action_modify_check_add_field_limitation(action,
1538 sw_action);
1539 break;
1540
1541 case MLX5_ACTION_TYPE_COPY:
1542 ret = dr_action_modify_check_copy_field_limitation(action,
1543 sw_action);
1544 break;
1545
1546 default:
1547 mlx5dr_info(dmn, "Unsupported action %d modify action\n",
1548 action_type);
1549 ret = -EOPNOTSUPP;
1550 }
1551
1552 return ret;
1553 }
1554
1555 static bool
dr_action_modify_check_is_ttl_modify(const void * sw_action)1556 dr_action_modify_check_is_ttl_modify(const void *sw_action)
1557 {
1558 u16 sw_field = MLX5_GET(set_action_in, sw_action, field);
1559
1560 return sw_field == MLX5_ACTION_IN_FIELD_OUT_IP_TTL;
1561 }
1562
dr_actions_convert_modify_header(struct mlx5dr_action * action,u32 max_hw_actions,u32 num_sw_actions,__be64 sw_actions[],__be64 hw_actions[],u32 * num_hw_actions,bool * modify_ttl)1563 static int dr_actions_convert_modify_header(struct mlx5dr_action *action,
1564 u32 max_hw_actions,
1565 u32 num_sw_actions,
1566 __be64 sw_actions[],
1567 __be64 hw_actions[],
1568 u32 *num_hw_actions,
1569 bool *modify_ttl)
1570 {
1571 const struct mlx5dr_ste_action_modify_field *hw_dst_action_info;
1572 const struct mlx5dr_ste_action_modify_field *hw_src_action_info;
1573 struct mlx5dr_domain *dmn = action->rewrite->dmn;
1574 int ret, i, hw_idx = 0;
1575 __be64 *sw_action;
1576 __be64 hw_action;
1577 u16 hw_field = 0;
1578 u32 l3_type = 0;
1579 u32 l4_type = 0;
1580
1581 *modify_ttl = false;
1582
1583 action->rewrite->allow_rx = 1;
1584 action->rewrite->allow_tx = 1;
1585
1586 for (i = 0; i < num_sw_actions; i++) {
1587 sw_action = &sw_actions[i];
1588
1589 ret = dr_action_modify_check_field_limitation(action,
1590 sw_action);
1591 if (ret)
1592 return ret;
1593
1594 if (!(*modify_ttl))
1595 *modify_ttl = dr_action_modify_check_is_ttl_modify(sw_action);
1596
1597 /* Convert SW action to HW action */
1598 ret = dr_action_modify_sw_to_hw(dmn,
1599 sw_action,
1600 &hw_action,
1601 &hw_dst_action_info,
1602 &hw_src_action_info);
1603 if (ret)
1604 return ret;
1605
1606 /* Due to a HW limitation we cannot modify 2 different L3 types */
1607 if (l3_type && hw_dst_action_info->l3_type &&
1608 hw_dst_action_info->l3_type != l3_type) {
1609 mlx5dr_dbg(dmn, "Action list can't support two different L3 types\n");
1610 return -EINVAL;
1611 }
1612 if (hw_dst_action_info->l3_type)
1613 l3_type = hw_dst_action_info->l3_type;
1614
1615 /* Due to a HW limitation we cannot modify two different L4 types */
1616 if (l4_type && hw_dst_action_info->l4_type &&
1617 hw_dst_action_info->l4_type != l4_type) {
1618 mlx5dr_dbg(dmn, "Action list can't support two different L4 types\n");
1619 return -EINVAL;
1620 }
1621 if (hw_dst_action_info->l4_type)
1622 l4_type = hw_dst_action_info->l4_type;
1623
1624 /* HW reads and executes two actions at once this means we
1625 * need to create a gap if two actions access the same field
1626 */
1627 if ((hw_idx % 2) && (hw_field == hw_dst_action_info->hw_field ||
1628 (hw_src_action_info &&
1629 hw_field == hw_src_action_info->hw_field))) {
1630 /* Check if after gap insertion the total number of HW
1631 * modify actions doesn't exceeds the limit
1632 */
1633 hw_idx++;
1634 if ((num_sw_actions + hw_idx - i) >= max_hw_actions) {
1635 mlx5dr_dbg(dmn, "Modify header action number exceeds HW limit\n");
1636 return -EINVAL;
1637 }
1638 }
1639 hw_field = hw_dst_action_info->hw_field;
1640
1641 hw_actions[hw_idx] = hw_action;
1642 hw_idx++;
1643 }
1644
1645 *num_hw_actions = hw_idx;
1646
1647 return 0;
1648 }
1649
dr_action_create_modify_action(struct mlx5dr_domain * dmn,size_t actions_sz,__be64 actions[],struct mlx5dr_action * action)1650 static int dr_action_create_modify_action(struct mlx5dr_domain *dmn,
1651 size_t actions_sz,
1652 __be64 actions[],
1653 struct mlx5dr_action *action)
1654 {
1655 struct mlx5dr_icm_chunk *chunk;
1656 u32 max_hw_actions;
1657 u32 num_hw_actions;
1658 u32 num_sw_actions;
1659 __be64 *hw_actions;
1660 bool modify_ttl;
1661 int ret;
1662
1663 num_sw_actions = actions_sz / DR_MODIFY_ACTION_SIZE;
1664 max_hw_actions = mlx5dr_icm_pool_chunk_size_to_entries(DR_CHUNK_SIZE_16);
1665
1666 if (num_sw_actions > max_hw_actions) {
1667 mlx5dr_dbg(dmn, "Max number of actions %d exceeds limit %d\n",
1668 num_sw_actions, max_hw_actions);
1669 return -EINVAL;
1670 }
1671
1672 chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool, DR_CHUNK_SIZE_16);
1673 if (!chunk)
1674 return -ENOMEM;
1675
1676 hw_actions = kcalloc(1, max_hw_actions * DR_MODIFY_ACTION_SIZE, GFP_KERNEL);
1677 if (!hw_actions) {
1678 ret = -ENOMEM;
1679 goto free_chunk;
1680 }
1681
1682 ret = dr_actions_convert_modify_header(action,
1683 max_hw_actions,
1684 num_sw_actions,
1685 actions,
1686 hw_actions,
1687 &num_hw_actions,
1688 &modify_ttl);
1689 if (ret)
1690 goto free_hw_actions;
1691
1692 action->rewrite->chunk = chunk;
1693 action->rewrite->modify_ttl = modify_ttl;
1694 action->rewrite->data = (u8 *)hw_actions;
1695 action->rewrite->num_of_actions = num_hw_actions;
1696 action->rewrite->index = (chunk->icm_addr -
1697 dmn->info.caps.hdr_modify_icm_addr) /
1698 ACTION_CACHE_LINE_SIZE;
1699
1700 ret = mlx5dr_send_postsend_action(dmn, action);
1701 if (ret)
1702 goto free_hw_actions;
1703
1704 return 0;
1705
1706 free_hw_actions:
1707 kfree(hw_actions);
1708 free_chunk:
1709 mlx5dr_icm_free_chunk(chunk);
1710 return ret;
1711 }
1712
1713 struct mlx5dr_action *
mlx5dr_action_create_modify_header(struct mlx5dr_domain * dmn,u32 flags,size_t actions_sz,__be64 actions[])1714 mlx5dr_action_create_modify_header(struct mlx5dr_domain *dmn,
1715 u32 flags,
1716 size_t actions_sz,
1717 __be64 actions[])
1718 {
1719 struct mlx5dr_action *action;
1720 int ret = 0;
1721
1722 refcount_inc(&dmn->refcount);
1723
1724 if (actions_sz % DR_MODIFY_ACTION_SIZE) {
1725 mlx5dr_dbg(dmn, "Invalid modify actions size provided\n");
1726 goto dec_ref;
1727 }
1728
1729 action = dr_action_create_generic(DR_ACTION_TYP_MODIFY_HDR);
1730 if (!action)
1731 goto dec_ref;
1732
1733 action->rewrite->dmn = dmn;
1734
1735 ret = dr_action_create_modify_action(dmn,
1736 actions_sz,
1737 actions,
1738 action);
1739 if (ret) {
1740 mlx5dr_dbg(dmn, "Failed creating modify header action %d\n", ret);
1741 goto free_action;
1742 }
1743
1744 return action;
1745
1746 free_action:
1747 kfree(action);
1748 dec_ref:
1749 refcount_dec(&dmn->refcount);
1750 return NULL;
1751 }
1752
1753 struct mlx5dr_action *
mlx5dr_action_create_dest_vport(struct mlx5dr_domain * dmn,u16 vport,u8 vhca_id_valid,u16 vhca_id)1754 mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn,
1755 u16 vport, u8 vhca_id_valid,
1756 u16 vhca_id)
1757 {
1758 struct mlx5dr_cmd_vport_cap *vport_cap;
1759 struct mlx5dr_domain *vport_dmn;
1760 struct mlx5dr_action *action;
1761 u8 peer_vport;
1762
1763 peer_vport = vhca_id_valid && (vhca_id != dmn->info.caps.gvmi);
1764 vport_dmn = peer_vport ? dmn->peer_dmn : dmn;
1765 if (!vport_dmn) {
1766 mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");
1767 return NULL;
1768 }
1769
1770 if (vport_dmn->type != MLX5DR_DOMAIN_TYPE_FDB) {
1771 mlx5dr_dbg(dmn, "Domain doesn't support vport actions\n");
1772 return NULL;
1773 }
1774
1775 vport_cap = mlx5dr_domain_get_vport_cap(vport_dmn, vport);
1776 if (!vport_cap) {
1777 mlx5dr_err(dmn,
1778 "Failed to get vport 0x%x caps - vport is disabled or invalid\n",
1779 vport);
1780 return NULL;
1781 }
1782
1783 action = dr_action_create_generic(DR_ACTION_TYP_VPORT);
1784 if (!action)
1785 return NULL;
1786
1787 action->vport->dmn = vport_dmn;
1788 action->vport->caps = vport_cap;
1789
1790 return action;
1791 }
1792
mlx5dr_action_destroy(struct mlx5dr_action * action)1793 int mlx5dr_action_destroy(struct mlx5dr_action *action)
1794 {
1795 if (refcount_read(&action->refcount) > 1)
1796 return -EBUSY;
1797
1798 switch (action->action_type) {
1799 case DR_ACTION_TYP_FT:
1800 if (action->dest_tbl->is_fw_tbl)
1801 refcount_dec(&action->dest_tbl->fw_tbl.dmn->refcount);
1802 else
1803 refcount_dec(&action->dest_tbl->tbl->refcount);
1804
1805 if (action->dest_tbl->is_fw_tbl &&
1806 action->dest_tbl->fw_tbl.num_of_ref_actions) {
1807 struct mlx5dr_action **ref_actions;
1808 int i;
1809
1810 ref_actions = action->dest_tbl->fw_tbl.ref_actions;
1811 for (i = 0; i < action->dest_tbl->fw_tbl.num_of_ref_actions; i++)
1812 refcount_dec(&ref_actions[i]->refcount);
1813
1814 kfree(ref_actions);
1815
1816 mlx5dr_fw_destroy_md_tbl(action->dest_tbl->fw_tbl.dmn,
1817 action->dest_tbl->fw_tbl.id,
1818 action->dest_tbl->fw_tbl.group_id);
1819 }
1820 break;
1821 case DR_ACTION_TYP_TNL_L2_TO_L2:
1822 case DR_ACTION_TYP_REMOVE_HDR:
1823 refcount_dec(&action->reformat->dmn->refcount);
1824 break;
1825 case DR_ACTION_TYP_TNL_L3_TO_L2:
1826 mlx5dr_icm_free_chunk(action->rewrite->chunk);
1827 refcount_dec(&action->rewrite->dmn->refcount);
1828 break;
1829 case DR_ACTION_TYP_L2_TO_TNL_L2:
1830 case DR_ACTION_TYP_L2_TO_TNL_L3:
1831 case DR_ACTION_TYP_INSERT_HDR:
1832 mlx5dr_cmd_destroy_reformat_ctx((action->reformat->dmn)->mdev,
1833 action->reformat->id);
1834 refcount_dec(&action->reformat->dmn->refcount);
1835 break;
1836 case DR_ACTION_TYP_MODIFY_HDR:
1837 mlx5dr_icm_free_chunk(action->rewrite->chunk);
1838 kfree(action->rewrite->data);
1839 refcount_dec(&action->rewrite->dmn->refcount);
1840 break;
1841 case DR_ACTION_TYP_SAMPLER:
1842 refcount_dec(&action->sampler->dmn->refcount);
1843 break;
1844 default:
1845 break;
1846 }
1847
1848 kfree(action);
1849 return 0;
1850 }
1851