Searched refs:ASID (Results 1 – 14 of 14) sorted by relevance
| /linux/arch/arm/mm/ |
| A D | tlb-v7.S | 38 asid r3, r3 @ mask ASID
47 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
76 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
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| A D | tlb-v6.S | 40 asid r3, r3 @ mask ASID
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| A D | Kconfig | 609 This indicates whether the CPU has the ASID register; used to
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| /linux/arch/arm/include/asm/ |
| A D | mmu.h | 27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro
29 #define ASID(mm) (0) macro
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| A D | tlbflush.h | 363 const int asid = ASID(mm); in __local_flush_tlb_mm()
381 const int asid = ASID(mm); in local_flush_tlb_mm()
405 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm()
418 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page()
439 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page()
456 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
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| /linux/arch/arm64/include/asm/ |
| A D | tlbflush.h | 251 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm()
263 addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm)); in flush_tlb_page_nosync()
308 asid = ASID(vma->vm_mm); in __flush_tlb_range()
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| A D | mmu.h | 55 #define ASID(mm) (atomic64_read(&(mm)->context.id) & 0xffff) macro
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| A D | mmu_context.h | 206 ttbr = phys_to_ttbr(virt_to_phys(mm->pgd)) | ASID(mm) << 48; in update_saved_ttbr0()
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| /linux/Documentation/ABI/testing/ |
| A D | debugfs-driver-habanalabs | 187 Description: Displays the hop values and physical address for a given ASID
188 and virtual address. The user should write the ASID and VA into
190 e.g. to display info about VA 0x1000 for ASID 1 you need to do:
263 address mappings per ASID and all user mappings of HW blocks
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| /linux/arch/arm64/mm/ |
| A D | context.c | 352 unsigned long asid = ASID(mm); in cpu_do_switch_mm()
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| /linux/arch/arm/ |
| A D | Kconfig | 889 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
893 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
898 entries regardless of the ASID.
926 bool "ARM errata: possible faulty MMU translations following an ASID switch"
931 which starts prior to an ASID switch but completes afterwards. This
933 the new ASID. This workaround places two dsb instructions in the mm
934 switching code so that no page table walks can cross the ASID switch.
990 which sends an IPI to the CPUs that are running the same ASID
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| /linux/tools/arch/x86/kcpuid/ |
| A D | cpuid.csv | 399 0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-en…
400 0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabl…
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| /linux/arch/arm64/ |
| A D | Kconfig | 823 contains data for a non-current ASID. The fix is to
886 bool "Falkor E1003: Incorrect translation due to ASID change"
889 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID
890 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID
1331 zeroed area and reserved ASID. The user access routines
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| /linux/Documentation/virt/kvm/ |
| A D | amd-memory-encryption.rst | 44 Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
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