| /linux/arch/arm/mach-omap1/ |
| A D | clock_data.c | 676 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
697 CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
698 CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
703 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
704 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
710 CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX),
712 CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX),
720 CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
722 CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
724 CLK("mmci-omap.0", "fck", &mmc3_ck, CK_7XX),
[all …]
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| A D | clock.h | 26 #define CLK(dev, con, ck, cp) \ macro
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| /linux/arch/arm/boot/dts/ |
| A D | ste-dbx5x0-pinctrl.dtsi | 267 pins = "GPIO23_AA4"; /* CLK */
300 pins = "GPIO23_AA4"; /* CLK */
315 pins = "GPIO23_AA4"; /* CLK */
341 pins = "GPIO23_AA4"; /* CLK */
355 pins = "GPIO208_AH16"; /* CLK */
375 pins = "GPIO208_AH16"; /* CLK */
396 pins = "GPIO208_AH16"; /* CLK */
412 pins = "GPIO208_AH16"; /* CLK */
435 pins = "GPIO128_A5"; /* CLK */
459 pins = "GPIO128_A5"; /* CLK */
[all …]
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| A D | ste-href-family-pinctrl.dtsi | 29 "GPIO217_AH12"; /* CLK */
49 pins = "GPIO217_AH12"; /* CLK */
66 pins = "GPIO217_AH12"; /* CLK */
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| A D | stm32f7-pinctrl.dtsi | 232 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1 CLK */
245 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1 CLK */
263 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
276 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
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| A D | sun8i-h2-plus-bananapi-m2-zero.dts | 233 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
240 "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
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| A D | sun7i-a20-bananapi.dts | 229 "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3",
246 "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",
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| A D | sun6i-a31s-sinovoip-bpi-m2.dts | 281 "", "", "", "", "", "", "WL-SDIO-CMD", "WL-SDIO-CLK",
302 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
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| /linux/Documentation/devicetree/bindings/display/ti/ |
| A D | ti,omap5-dss.txt | 77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
99 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| A D | ti,omap4-dss.txt | 96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
118 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| A D | ti,dra7-dss.txt | 73 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
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| A D | ti,omap3-dss.txt | 86 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | ddc_regs.h | 151 DDC_REG_LIST(CLK,id)\
161 DDC_VGA_REG_LIST(CLK)\
180 DDC_REG_LIST_DCN2(CLK, id)\
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| /linux/drivers/gpu/drm/msm/dsi/ |
| A D | mmss_cc.xml.h | 58 CLK = 0, enumerator
67 case CLK: return 0x0000004c; in __offset_CLK()
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| /linux/Documentation/devicetree/bindings/media/ |
| A D | renesas,drif.yaml | 18 | |-----SCK------->|CLK |
26 CLK & SYNC. Each internal channel has its own dedicated resources like
31 The internal channels sharing the CLK & SYNC are tied together by their
162 # | |-----SCK------->|CLK |
219 # | |-----SCK------->|CLK |
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| /linux/arch/arm64/boot/dts/amlogic/ |
| A D | meson-gxl-s905x-khadas-vim.dts | 187 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
196 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
199 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
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| A D | meson-gxbb-nanopi-k2.dts | 263 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
282 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
285 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
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| /linux/Documentation/devicetree/bindings/hwmon/ |
| A D | g762.txt | 8 on CLK pin of the chip.
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| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt7622-rfb1.dts | 253 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
397 * DAT2, DAT3, CMD, CLK for SD respectively.
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| A D | mt7622-bananapi-bpi-r64.dts | 291 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
440 * DAT2, DAT3, CMD, CLK for SD respectively.
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| A D | hw_factory_dcn20.c | 128 DDC_GPIO_VGA_REG_LIST(CLK),
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| A D | hw_factory_dcn30.c | 136 DDC_GPIO_VGA_REG_LIST(CLK),
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| /linux/Documentation/devicetree/bindings/regulator/ |
| A D | tps6586x.txt | 85 regulator-name = "PCIE CLK";
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| /linux/arch/arm64/boot/dts/marvell/ |
| A D | armada-8040-clearfog-gt-8k.dts | 432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
436 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| A D | toshiba,tc358775.yaml | 15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
|