Searched refs:CLK_MM_DSI0 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/mediatek/
A D	clk-mt6765-mm.c	49 GATE_MM(CLK_MM_DSI0, "mm_dsi0", "mm_ck", 17),
A D	clk-mt8192-mm.c	58 GATE_MM0(CLK_MM_DSI0, "mm_dsi0", "disp_sel", 15),
/linux/include/dt-bindings/clock/
A D	mt6765-clk.h	268 #define CLK_MM_DSI0 17 macro
A D	mt8192-clk.h	439 #define CLK_MM_DSI0 15 macro

Completed in 11 milliseconds

Last Index update Fri Sep 05 17:56:23 CST 2025