Searched refs:CLK_TOP_APLL12_DIV6 (Results 1 – 7 of 7) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 159 #define CLK_TOP_APLL12_DIV6 127 macro
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| A D | mt8192-clk.h | 161 #define CLK_TOP_APLL12_DIV6 149 macro
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| /linux/sound/soc/mediatek/mt8192/ |
| A D | mt8192-afe-clk.h | 213 CLK_TOP_APLL12_DIV6, enumerator
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| A D | mt8192-afe-clk.c | 56 [CLK_TOP_APLL12_DIV6] = "top_apll12_div6",
514 .div_clk_id = CLK_TOP_APLL12_DIV6,
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 674 GATE_TOP5(CLK_TOP_APLL12_DIV6, "apll12_div6", "apll12_ck_div6", 8),
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| A D | clk-mt8167.c | 920 GATE_TOP5(CLK_TOP_APLL12_DIV6, "apll12_div6", "apll12_ck_div6", 8),
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| A D | clk-mt8192.c | 868 DIV_GATE(CLK_TOP_APLL12_DIV6, "apll12_div6", "apll_i2s6_m_sel", 0x320, 7, 0x334, 8, 24),
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