Searched refs:CLK_TOP_CAMTG3_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt6765-clk.h	140 #define CLK_TOP_CAMTG3_SEL 105 macro
A D	mt8192-clk.h	29 #define CLK_TOP_CAMTG3_SEL 17 macro
/linux/drivers/clk/mediatek/
A D	clk-mt6765.c	396 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG3_SEL, "camtg3_sel", camtg_parents,
A D	clk-mt8192.c	749 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG3_SEL, "camtg3_sel",

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