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Searched refs:CLK_TOP_MSDC50_0 (Results 1 – 6 of 6) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6765-clk.h95 #define CLK_TOP_MSDC50_0 60 macro
A Dmt6779-clk.h19 #define CLK_TOP_MSDC50_0 9 macro
A Dmt8195-clk.h42 #define CLK_TOP_MSDC50_0 30 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8195-topckgen.c928 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "top_msdc50_0",
A Dclk-mt6779.c692 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "msdc50_0_sel",
A Dclk-mt6765.c142 FACTOR(CLK_TOP_MSDC50_0, "msdc50_0_ck", "msdc50_0_sel", 1, 1),

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