Searched refs:CPLL_CFG0_SW_CFG (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/mips/include/asm/mach-ralink/ | ||
| A D | mt7620.h | 57 #define CPLL_CFG0_SW_CFG BIT(31) macro |
| /linux/arch/mips/ralink/ | ||
| A D | mt7620.c | 103 if ((reg & CPLL_CFG0_SW_CFG) == 0) in mt7620_get_cpu_pll_rate() |
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