Searched refs:DPLL_VGA_MODE_DIS (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_dpll.c | 814 dpll = DPLL_VGA_MODE_DIS; in i9xx_compute_dpll()
893 dpll = DPLL_VGA_MODE_DIS; in i8xx_compute_dpll()
1140 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_compute_dpll()
1158 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in chv_compute_dpll()
1454 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i9xx_enable_pll()
1805 DPLL_VGA_MODE_DIS) == 0); in chv_enable_pll()
1859 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_disable_pll()
1876 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in chv_disable_pll()
1906 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i9xx_disable_pll()
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| A D | intel_display.c | 11132 DPLL_VGA_MODE_DIS | in i830_enable_pipe()
11154 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i830_enable_pipe()
11208 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i830_disable_pipe()
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| A D | intel_display_power.c | 1421 val |= DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_display_power_well_init()
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| /linux/drivers/gpu/drm/gma500/ |
| A D | cdv_intel_display.c | 226 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv()
659 dpll = DPLL_VGA_MODE_DIS; in cdv_intel_crtc_mode_set()
716 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); in cdv_intel_crtc_mode_set()
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| A D | psb_intel_display.c | 152 dpll = DPLL_VGA_MODE_DIS; in psb_intel_crtc_mode_set()
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| A D | oaktrail_crtc.c | 523 dpll |= DPLL_VGA_MODE_DIS; in oaktrail_crtc_mode_set()
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| A D | psb_intel_reg.h | 232 #define DPLL_VGA_MODE_DIS (1 << 28) macro
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| /linux/drivers/gpu/drm/i915/ |
| A D | i915_reg.h | 3522 #define DPLL_VGA_MODE_DIS (1 << 28) macro
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