Searched refs:GCC_UFS_PHY_BCR (Results 1 – 24 of 24) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| A D | qcom,gcc-sc7180.h | 146 #define GCC_UFS_PHY_BCR 2 macro
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| A D | qcom,gcc-sm6350.h | 163 #define GCC_UFS_PHY_BCR 4 macro
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| A D | qcom,gcc-sm6115.h | 180 #define GCC_UFS_PHY_BCR 3 macro
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| A D | qcom,gcc-sc7280.h | 218 #define GCC_UFS_PHY_BCR 9 macro
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| A D | qcom,gcc-sm6125.h | 233 #define GCC_UFS_PHY_BCR 2 macro
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| A D | qcom,gcc-sdm845.h | 218 #define GCC_UFS_PHY_BCR 14 macro
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| A D | qcom,gcc-sm8150.h | 238 #define GCC_UFS_PHY_BCR 25 macro
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| A D | qcom,gcc-sm8350.h | 240 #define GCC_UFS_PHY_BCR 25 macro
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| A D | qcom,gcc-sm8250.h | 245 #define GCC_UFS_PHY_BCR 33 macro
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| A D | qcom,gcc-sc8180x.h | 286 #define GCC_UFS_PHY_BCR 36 macro
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| /linux/drivers/clk/qcom/ |
| A D | gcc-sc7180.c | 2393 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sm6350.c | 2497 [GCC_UFS_PHY_BCR] = { 0x3a000 },
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| A D | gcc-sc7280.c | 3416 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sdm845.c | 3522 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sm6115.c | 3445 [GCC_UFS_PHY_BCR] = { 0x45000 },
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| A D | gcc-sm8250.c | 3570 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sm8150.c | 3710 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sm8350.c | 3771 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| A D | gcc-sm6125.c | 4088 [GCC_UFS_PHY_BCR] = { 0x45000 },
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| A D | gcc-sc8180x.c | 4527 [GCC_UFS_PHY_BCR] = { 0x77000 },
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| /linux/arch/arm64/boot/dts/qcom/ |
| A D | sm8350.dtsi | 1173 resets = <&gcc GCC_UFS_PHY_BCR>;
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| A D | sm8150.dtsi | 1640 resets = <&gcc GCC_UFS_PHY_BCR>;
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| A D | sm8250.dtsi | 1692 resets = <&gcc GCC_UFS_PHY_BCR>;
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| A D | sdm845.dtsi | 2252 resets = <&gcc GCC_UFS_PHY_BCR>;
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