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Searched refs:GET_BITFIELD (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/edac/
A Dskx_base.c174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc()
225 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4)
300 idx = GET_BITFIELD(addr, 6, 8); in skx_sad_decode()
303 idx = GET_BITFIELD(addr, 8, 10); in skx_sad_decode()
306 idx = GET_BITFIELD(addr, 12, 14); in skx_sad_decode()
309 idx = GET_BITFIELD(addr, 30, 32); in skx_sad_decode()
313 tgt = GET_BITFIELD(ilv, 4 * idx, 4 * idx + 3); in skx_sad_decode()
385 #define SKX_TAD_SKT_GRAN(b) GET_BITFIELD((b), 4, 5)
459 #define SKX_RIR_VALID(b) GET_BITFIELD((b), 31, 31)
543 int ret = GET_BITFIELD(addr, b0, b0) | (GET_BITFIELD(addr, b1, b1) << 1); in skx_bank_bits()
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A Dsb_edac.c51 #define GET_BITFIELD(v, lo, hi) \ macro
246 GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19))
249 GET_BITFIELD(reg, 2, 15) : GET_BITFIELD(reg, 2, 14))
841 return GET_BITFIELD(reg, 1, 1); in interleave_mode()
846 return GET_BITFIELD(reg, 2, 3); in dram_attr()
856 return GET_BITFIELD(reg, 1, 2); in knl_interleave_mode()
873 return GET_BITFIELD(reg, 3, 4); in dram_attr_knl()
885 if (GET_BITFIELD(reg, 11, 11)) in get_memory_type()
908 if (GET_BITFIELD(reg, 16, 16)) in haswell_get_memory_type()
984 return GET_BITFIELD(reg, 0, 2); in get_node_id()
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A Dskx_common.c199 *id = GET_BITFIELD(reg, 12, 14); in skx_get_src_id()
212 *id = GET_BITFIELD(reg, 0, 2); in skx_get_node_id()
218 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width()
260 d->bus[0] = GET_BITFIELD(reg, 0, 7); in skx_get_all_bus_mappings()
261 d->bus[1] = GET_BITFIELD(reg, 8, 15); in skx_get_all_bus_mappings()
264 d->bus[2] = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
265 d->bus[3] = GET_BITFIELD(reg, 24, 31); in skx_get_all_bus_mappings()
267 d->seg = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
323 u32 val = GET_BITFIELD(reg, lobit, hibit); in skx_get_dimm_attr()
539 u32 mscod = GET_BITFIELD(m->status, 16, 31); in skx_mce_output_error()
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A Digen6_edac.c82 #define ECC_ERROR_LOG_ADDR(v) GET_BITFIELD(v, 5, 38)
83 #define ECC_ERROR_LOG_SYND(v) GET_BITFIELD(v, 46, 61)
88 #define MCHBAR_BASE(v) (GET_BITFIELD(v, 16, 38) << 16)
95 #define MAD_INTER_CHANNEL_ECHM(v) GET_BITFIELD(v, 3, 3)
106 #define MAD_DIMM_CH_DLW(v) GET_BITFIELD(v, 7, 8)
108 #define MAD_DIMM_CH_DSW(v) GET_BITFIELD(v, 24, 25)
112 #define MAC_MC_HASH_LSB(v) GET_BITFIELD(v, 1, 3)
120 #define CHANNEL_HASH_MODE(v) GET_BITFIELD(v, 28, 28)
317 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in tgl_err_addr_to_mem_addr()
356 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in adl_err_addr_to_imc_addr()
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A Di10nm_base.c52 #define I10NM_GET_SCK_MMIO_BASE(reg) (GET_BITFIELD(reg, 0, 28) << 23)
53 #define I10NM_GET_IMC_MMIO_OFFSET(reg) (GET_BITFIELD(reg, 0, 10) << 12)
54 #define I10NM_GET_IMC_MMIO_SIZE(reg) ((GET_BITFIELD(reg, 13, 23) - \
55 GET_BITFIELD(reg, 0, 10) + 1) << 12)
57 ((GET_BITFIELD(reg, 0, 10) << 12) + 0x140000)
60 #define I10NM_IS_HBM_PRESENT(reg) GET_BITFIELD(reg, 27, 30)
61 #define I10NM_IS_HBM_IMC(reg) GET_BITFIELD(reg, 29, 29)
64 #define I10NM_SAD_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
65 #define I10NM_SAD_NM_CACHEABLE(reg) GET_BITFIELD(reg, 5, 5)
444 return !!GET_BITFIELD(mcmtr, 2, 2); in i10nm_check_ecc()
A Dskx_common.h28 #define GET_BITFIELD(v, lo, hi) \ macro
52 #define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
53 #define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
A Dpnd2_edac.c123 #define GET_BITFIELD(v, lo, hi) (((v) & GENMASK_ULL(hi, lo)) >> (lo)) macro
1152 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in pnd2_mce_output_error()
1153 u32 mscod = GET_BITFIELD(m->status, 16, 31); in pnd2_mce_output_error()
1154 u32 errcode = GET_BITFIELD(m->status, 0, 15); in pnd2_mce_output_error()
1155 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()

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