Home
last modified time | relevance | path

Searched refs:GICR_CTLR (Results 1 – 5 of 5) sorted by relevance

/linux/tools/testing/selftests/kvm/lib/aarch64/
A Dgic_v3.h38 #define GICR_CTLR 0x000 macro
A Dgic_v3.c47 while (readl(redist_base + GICR_CTLR) & GICR_CTLR_RWP) { in gicv3_gicr_wait_for_rwp()
/linux/drivers/irqchip/
A Dirq-gic-v3-its.c2979 val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); in allocate_lpi_tables()
3050 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3121 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3123 writel_relaxed(val, rbase + GICR_CTLR); in its_cpu_init_lpis()
5130 val = readl_relaxed(rbase + GICR_CTLR); in redist_disable_lpis()
5154 writel_relaxed(val, rbase + GICR_CTLR); in redist_disable_lpis()
5164 while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { in redist_disable_lpis()
5179 if (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_ENABLE_LPIS) { in redist_disable_lpis()
/linux/include/linux/irqchip/
A Darm-gic-v3.h114 #define GICR_CTLR GICD_CTLR macro
/linux/arch/arm64/kvm/vgic/
A Dvgic-mmio-v3.c611 REGISTER_DESC_WITH_LENGTH(GICR_CTLR,

Completed in 30 milliseconds